Revert "rockchip: Add max spl size & spl header configs"
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
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@ -17,21 +17,6 @@ config ROCKCHIP_RK3036
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and video codec support. Peripherals include Gigabit Ethernet,
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and video codec support. Peripherals include Gigabit Ethernet,
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USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
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USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
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config ROCKCHIP_SPL_HDR
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string "Header of rockchip's spl loader"
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help
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Rockchip's bootrom requires the spl loader to start with a 4-bytes
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header. The content of this header depends on the chip type.
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config ROCKCHIP_MAX_SPL_SIZE
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hex "Max size of rockchip's spl loader"
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help
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Different chip may have different sram size. And if we want to jump
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back to the bootrom after spl, we may need to reserve some sram space
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for the bootrom.
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The max spl loader size should be sram size minus reserved
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size(if needed)
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config SYS_MALLOC_F
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config SYS_MALLOC_F
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default y
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default y
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@ -9,12 +9,6 @@ config SYS_SOC
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config SYS_MALLOC_F_LEN
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config SYS_MALLOC_F_LEN
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default 0x400
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default 0x400
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config ROCKCHIP_SPL_HDR
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default "RK30"
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config ROCKCHIP_MAX_SPL_SIZE
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default 0x1000
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config ROCKCHIP_COMMON
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config ROCKCHIP_COMMON
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bool "Support rk common fuction"
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bool "Support rk common fuction"
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@ -16,12 +16,6 @@ config TARGET_CHROMEBOOK_JERRY
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WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
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WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
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the keyboard and battery functions.
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the keyboard and battery functions.
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config ROCKCHIP_SPL_HDR
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default "RK32"
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config ROCKCHIP_MAX_SPL_SIZE
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default 0x8000
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config SYS_SOC
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config SYS_SOC
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default "rockchip"
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default "rockchip"
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@ -64,7 +64,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
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rsa-sign.o rsa-verify.o rsa-checksum.o \
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rsa-sign.o rsa-verify.o rsa-checksum.o \
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rsa-mod-exp.o)
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rsa-mod-exp.o)
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ROCKCHIP_OBS = $(if $(CONFIG_ARCH_ROCKCHIP),lib/rc4.o rkcommon.o rkimage.o rksd.o,)
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ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o
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# common objs for dumpimage and mkimage
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# common objs for dumpimage and mkimage
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dumpimage-mkimage-objs := aisimage.o \
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dumpimage-mkimage-objs := aisimage.o \
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@ -109,12 +109,6 @@ fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o
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# TODO(sjg@chromium.org): Is this correct on Mac OS?
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# TODO(sjg@chromium.org): Is this correct on Mac OS?
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ifneq ($(CONFIG_ARCH_ROCKCHIP),)
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HOST_EXTRACFLAGS += \
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-DCONFIG_ROCKCHIP_MAX_SPL_SIZE=$(CONFIG_ROCKCHIP_MAX_SPL_SIZE) \
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-DCONFIG_ROCKCHIP_SPL_HDR="\"$(CONFIG_ROCKCHIP_SPL_HDR)\""
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endif
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ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
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ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
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# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
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# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
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# the mxsimage support within tools/mxsimage.c .
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# the mxsimage support within tools/mxsimage.c .
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@ -49,7 +49,7 @@ int rkcommon_set_header(void *buf, uint file_size)
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{
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{
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struct header0_info *hdr;
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struct header0_info *hdr;
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if (file_size > CONFIG_ROCKCHIP_MAX_SPL_SIZE)
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if (file_size > RK_MAX_CODE1_SIZE)
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return -ENOSPC;
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return -ENOSPC;
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memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
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memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
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@ -12,6 +12,7 @@ enum {
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RK_BLK_SIZE = 512,
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RK_BLK_SIZE = 512,
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RK_INIT_OFFSET = 4,
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RK_INIT_OFFSET = 4,
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RK_MAX_BOOT_SIZE = 512 << 10,
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RK_MAX_BOOT_SIZE = 512 << 10,
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RK_MAX_CODE1_SIZE = 32 << 10,
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};
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};
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/**
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/**
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@ -30,7 +30,7 @@ static void rkimage_print_header(const void *buf)
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static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd,
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static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd,
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struct image_tool_params *params)
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struct image_tool_params *params)
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{
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{
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memcpy(buf, CONFIG_ROCKCHIP_SPL_HDR, 4);
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memcpy(buf, "RK32", 4);
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}
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}
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static int rkimage_extract_subimage(void *buf, struct image_tool_params *params)
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static int rkimage_extract_subimage(void *buf, struct image_tool_params *params)
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@ -50,7 +50,7 @@ static void rksd_set_header(void *buf, struct stat *sbuf, int ifd,
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size);
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size);
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}
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}
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memcpy(buf + RKSD_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4);
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memcpy(buf + RKSD_SPL_HDR_START, "RK32", 4);
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}
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}
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static int rksd_extract_subimage(void *buf, struct image_tool_params *params)
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static int rksd_extract_subimage(void *buf, struct image_tool_params *params)
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@ -72,7 +72,7 @@ static int rksd_vrec_header(struct image_tool_params *params,
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{
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{
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int pad_size;
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int pad_size;
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pad_size = RKSD_SPL_HDR_START + CONFIG_ROCKCHIP_MAX_SPL_SIZE;
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pad_size = RKSD_SPL_HDR_START + RK_MAX_CODE1_SIZE;
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debug("pad_size %x\n", pad_size);
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debug("pad_size %x\n", pad_size);
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return pad_size - params->file_size;
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return pad_size - params->file_size;
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@ -53,7 +53,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
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size);
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size);
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}
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}
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memcpy(buf + RKSPI_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4);
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memcpy(buf + RKSPI_SPL_HDR_START, "RK32", 4);
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/*
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/*
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* Spread the image out so we only use the first 2KB of each 4KB
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* Spread the image out so we only use the first 2KB of each 4KB
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@ -89,7 +89,7 @@ static int rkspi_vrec_header(struct image_tool_params *params,
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{
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{
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int pad_size;
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int pad_size;
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pad_size = (CONFIG_ROCKCHIP_MAX_SPL_SIZE + 0x7ff) / 0x800 * 0x800;
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pad_size = (RK_MAX_CODE1_SIZE + 0x7ff) / 0x800 * 0x800;
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params->orig_file_size = pad_size;
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params->orig_file_size = pad_size;
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/* We will double the image size due to the SPI format */
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/* We will double the image size due to the SPI format */
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