powerpc/85xx: Convert MPC8568MDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2008, 2010 Freescale Semiconductor, Inc.
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* Copyright 2008, 2010-2011 Freescale Semiconductor, Inc.
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*
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*
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* (C) Copyright 2000
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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@ -50,7 +50,6 @@
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*/
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*/
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struct law_entry law_table[] = {
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struct law_entry law_table[] = {
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SET_LAW(CONFIG_SYS_SRIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
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/* LBC window - maps 256M. That's SDRAM, BCSR, PIBs, and Flash */
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/* LBC window - maps 256M. That's SDRAM, BCSR, PIBs, and Flash */
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SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
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SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
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};
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};
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2004-2007, 2010 Freescale Semiconductor.
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* Copyright 2004-2007, 2010-2011 Freescale Semiconductor.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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@ -35,6 +35,9 @@
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#define CONFIG_SYS_TEXT_BASE 0xfff80000
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#define CONFIG_SYS_TEXT_BASE 0xfff80000
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#define CONFIG_SYS_SRIO
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#define CONFIG_SRIO1 /* SRIO port 1 */
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#define CONFIG_PCI 1 /* Enable PCI/PCIE */
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#define CONFIG_PCI 1 /* Enable PCI/PCIE */
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#define CONFIG_PCI1 1 /* PCI controller */
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#define CONFIG_PCI1 1 /* PCI controller */
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#define CONFIG_PCIE1 1 /* PCIE controller */
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#define CONFIG_PCIE1 1 /* PCIE controller */
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@ -303,9 +306,10 @@ extern unsigned long get_clock_freq(void);
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#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
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#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
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#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */
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#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */
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#define CONFIG_SYS_SRIO_MEM_VIRT 0xc0000000
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#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
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#define CONFIG_SYS_SRIO_MEM_BUS 0xc0000000
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#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
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#define CONFIG_SYS_SRIO_MEM_PHYS 0xc0000000
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#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
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#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
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#ifdef CONFIG_QE
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#ifdef CONFIG_QE
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/*
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/*
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