ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data

Move these fields into arch_global_data and tidy up. This is needed for
both ppc and m68k since they share the i2c driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2012-12-13 20:48:49 +00:00 committed by Tom Rini
parent 67ac13b1b9
commit 609e6ec3f6
12 changed files with 35 additions and 31 deletions

View File

@ -135,7 +135,7 @@ int get_clocks(void)
}
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);

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@ -48,7 +48,7 @@ int get_clocks(void)
gd->cpu_clk = (gd->bus_clk * 2);
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);

View File

@ -91,9 +91,9 @@ int get_clocks (void)
#endif
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#ifdef CONFIG_SYS_I2C2_OFFSET
gd->i2c2_clk = gd->bus_clk;
gd->arch.i2c2_clk = gd->bus_clk;
#endif
#endif

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@ -271,7 +271,7 @@ int get_clocks(void)
gd->cpu_clk = (gd->bus_clk * 3);
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);

View File

@ -274,7 +274,7 @@ void setup_5445x_clocks(void)
}
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#endif
}
#endif
@ -290,7 +290,7 @@ int get_clocks(void)
#endif
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);

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@ -41,7 +41,7 @@ int get_clocks(void)
gd->cpu_clk = (gd->bus_clk * 2);
#ifdef CONFIG_FSL_I2C
gd->i2c1_clk = gd->bus_clk;
gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);

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@ -26,6 +26,10 @@
/* Architecture-specific global data */
struct arch_global_data {
#ifdef CONFIG_FSL_I2C
unsigned long i2c1_clk;
unsigned long i2c2_clk;
#endif
};
/*
@ -49,10 +53,6 @@ typedef struct global_data {
unsigned long inp_clk;
unsigned long vco_clk;
unsigned long flb_clk;
#endif
#ifdef CONFIG_FSL_I2C
unsigned long i2c1_clk;
unsigned long i2c2_clk;
#endif
phys_size_t ram_size; /* RAM size */
unsigned long reloc_off; /* Relocation Offset */

View File

@ -481,9 +481,9 @@ int get_clocks(void)
gd->sdhc_clk = sdhc_clk;
#endif
gd->arch.core_clk = core_clk;
gd->i2c1_clk = i2c1_clk;
gd->arch.i2c1_clk = i2c1_clk;
#if !defined(CONFIG_MPC832x)
gd->i2c2_clk = i2c2_clk;
gd->arch.i2c2_clk = i2c2_clk;
#endif
#if !defined(CONFIG_MPC8309)
gd->arch.enc_clk = enc_clk;
@ -558,9 +558,11 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf(" SEC: %-4s MHz\n",
strmhz(buf, gd->arch.enc_clk));
#endif
printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk));
printf(" I2C1: %-4s MHz\n",
strmhz(buf, gd->arch.i2c1_clk));
#if !defined(CONFIG_MPC832x)
printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk));
printf(" I2C2: %-4s MHz\n",
strmhz(buf, gd->arch.i2c2_clk));
#endif
#if defined(CONFIG_MPC8315)
printf(" TDM: %-4s MHz\n",

View File

@ -406,7 +406,7 @@ int get_clocks (void)
*/
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
gd->i2c1_clk = sys_info.freqSystemBus;
gd->arch.i2c1_clk = sys_info.freqSystemBus;
#elif defined(CONFIG_MPC8544)
/*
* On the 8544, the I2C clock is the same as the SEC clock. This can be
@ -416,14 +416,14 @@ int get_clocks (void)
* PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
*/
if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
gd->i2c1_clk = sys_info.freqSystemBus / 3;
gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
else
gd->i2c1_clk = sys_info.freqSystemBus / 2;
gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#else
/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
gd->i2c1_clk = sys_info.freqSystemBus / 2;
gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#endif
gd->i2c2_clk = gd->i2c1_clk;
gd->arch.i2c2_clk = gd->arch.i2c1_clk;
#if defined(CONFIG_FSL_ESDHC)
#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\

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@ -130,11 +130,11 @@ int get_clocks(void)
* AN2919.
*/
#ifdef CONFIG_MPC8610
gd->i2c1_clk = sys_info.freqSystemBus;
gd->arch.i2c1_clk = sys_info.freqSystemBus;
#else
gd->i2c1_clk = sys_info.freqSystemBus / 2;
gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#endif
gd->i2c2_clk = gd->i2c1_clk;
gd->arch.i2c2_clk = gd->arch.i2c1_clk;
if (gd->cpu_clk != 0)
return 0;

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@ -80,6 +80,11 @@ struct arch_global_data {
u32 lbc_clk;
void *cpu;
#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
defined(CONFIG_MPC86xx)
u32 i2c1_clk;
u32 i2c2_clk;
#endif
};
/*
@ -102,10 +107,6 @@ typedef struct global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
#endif
#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
u32 i2c1_clk;
u32 i2c2_clk;
#endif
#if defined(CONFIG_QE)
u32 qe_clk;
uint mp_alloc_base;

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@ -217,9 +217,9 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
static unsigned int get_i2c_clock(int bus)
{
if (bus)
return gd->i2c2_clk; /* I2C2 clock */
return gd->arch.i2c2_clk; /* I2C2 clock */
else
return gd->i2c1_clk; /* I2C1 clock */
return gd->arch.i2c1_clk; /* I2C1 clock */
}
void
@ -468,7 +468,8 @@ int i2c_set_bus_num(unsigned int bus)
int i2c_set_bus_speed(unsigned int speed)
{
unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
unsigned int i2c_clk = (i2c_bus_num == 1)
? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
writeb(0, &i2c_dev[i2c_bus_num]->cr); /* stop controller */
i2c_bus_speed[i2c_bus_num] =