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omap-common: Common boot code OMAP3 support and cleanup 

This introduces OMAP3 support for the common omap boot code, as well as a
major cleanup of the common omap boot code.

First, the omap_boot_parameters structure becomes platform-specific, since its
definition differs a bit across omap platforms. The offsets are removed as well
since it is U-Boot's coding style to use structures for mapping such kind of
data (in the sense that it is similar to registers). It is correct to assume
that romcode structure encoding is the same as U-Boot, given the description
of these structures in the TRMs.

The original address provided by the bootrom is passed to the U-Boot binary
instead of a duplicate of the structure stored in global data. This allows to
have only the relevant (boot device and mode) information stored in global data.
It is also expected that the address where the bootrom stores that information
is not overridden by the U-Boot SPL or U-Boot.

The save_omap_boot_params is expected to handle all special cases where the data
provided by the bootrom cannot be used as-is, so that spl_boot_device and
spl_boot_mode only return the data from global data.

All of this is only relevant when the U-Boot SPL is used. In cases it is not,
save_boot_params should fallback to its weak (or board-specific) definition.
save_omap_boot_params should not be called in that context either.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
This commit is contained in:
Paul Kocialkowski 2015-07-15 16:02:19 +02:00 committed by Tom Rini
parent a350c6a602
commit 60c7c30aa0
18 changed files with 143 additions and 167 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/cpu/armv7/omap-common/Makefile
View File

@ -26,9 +26,7 @@ ifeq ($(CONFIG_SYS_DCACHE_OFF),)
obj-y += omap-cache.o
endif
ifeq ($(CONFIG_OMAP34XX),)
obj-y += boot-common.o
endif
obj-y += lowlevel_init.o
obj-y += mem-common.o

126
arch/arm/cpu/armv7/omap-common/boot-common.c
View File

@ -17,27 +17,28 @@
#include <asm/arch/sys_proto.h>
#include <watchdog.h>
#include <scsi.h>
#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
void save_omap_boot_params(void)
{
u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
u8 boot_device;
u32 dev_desc, dev_data;
u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
struct omap_boot_parameters *omap_boot_params;
u32 boot_device;
u32 boot_mode;
if ((rom_params < NON_SECURE_SRAM_START) ||
(rom_params > NON_SECURE_SRAM_END))
if ((boot_params < NON_SECURE_SRAM_START) ||
(boot_params > NON_SECURE_SRAM_END))
return;
/*
* rom_params can be type casted to omap_boot_parameters and
* used. But it not correct to assume that romcode structure
* encoding would be same as u-boot. So use the defined offsets.
*/
boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
omap_boot_params = (struct omap_boot_parameters *)boot_params;
#if defined(BOOT_DEVICE_NAND_I2C)
/* Boot device */
boot_device = omap_boot_params->boot_device;
#ifdef BOOT_DEVICE_NAND_I2C
/*
* Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
* Otherwise the SPL boot IF can't handle this device correctly.
@ -47,29 +48,6 @@ void save_omap_boot_params(void)
if (boot_device == BOOT_DEVICE_NAND_I2C)
boot_device = BOOT_DEVICE_NAND;
#endif
gd->arch.omap_boot_params.omap_bootdevice = boot_device;
gd->arch.omap_boot_params.ch_flags =
*((u8 *)(rom_params + CH_FLAGS_OFFSET));
if ((boot_device >= MMC_BOOT_DEVICES_START) &&
(boot_device <= MMC_BOOT_DEVICES_END)) {
#if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
!defined(CONFIG_AM43XX)
if ((omap_hw_init_context() ==
OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
gd->arch.omap_boot_params.omap_bootmode =
*((u8 *)(rom_params + BOOT_MODE_OFFSET));
} else
#endif
{
dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
gd->arch.omap_boot_params.omap_bootmode =
*((u32 *)(dev_data + BOOT_MODE_OFFSET));
}
}
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
/*
* We get different values for QSPI_1 and QSPI_4 being used, but
@ -77,31 +55,70 @@ void save_omap_boot_params(void)
* mangle the later code, if we're coming in as QSPI_4 just
* change to the QSPI_1 value.
*/
if (gd->arch.omap_boot_params.omap_bootdevice == 11)
gd->arch.omap_boot_params.omap_bootdevice = BOOT_DEVICE_SPI;
if (boot_device == 11)
boot_device = BOOT_DEVICE_SPI;
#endif
gd->arch.omap_boot_device = boot_device;
/* Boot mode */
boot_mode = MMCSD_MODE_UNDEFINED;
if ((boot_device >= MMC_BOOT_DEVICES_START) &&
(boot_device <= MMC_BOOT_DEVICES_END)) {
#ifdef CONFIG_OMAP34XX
switch (boot_device) {
case BOOT_DEVICE_MMC1:
boot_mode = MMCSD_MODE_FS;
break;
case BOOT_DEVICE_MMC2:
boot_mode = MMCSD_MODE_RAW;
break;
}
#else
boot_params = omap_boot_params->boot_device_descriptor;
if ((boot_params < NON_SECURE_SRAM_START) ||
(boot_params > NON_SECURE_SRAM_END))
return;
boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
if ((boot_params < NON_SECURE_SRAM_START) ||
(boot_params > NON_SECURE_SRAM_END))
return;
boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
if (boot_mode != MMCSD_MODE_FS &&
boot_mode != MMCSD_MODE_RAW)
#ifdef CONFIG_SUPPORT_EMMC_BOOT
boot_mode = MMCSD_MODE_EMMCBOOT
#else
boot_mode = MMCSD_MODE_UNDEFINED;
#endif
#endif
}
gd->arch.omap_boot_mode = boot_mode;
#if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
!defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
/* CH flags */
gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
#endif
}
#ifdef CONFIG_SPL_BUILD
u32 spl_boot_device(void)
{
return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
return gd->arch.omap_boot_device;
}
u32 spl_boot_mode(void)
{
u32 val = gd->arch.omap_boot_params.omap_bootmode;
if (val == MMCSD_MODE_RAW)
return MMCSD_MODE_RAW;
else if (val == MMCSD_MODE_FS)
return MMCSD_MODE_FS;
else
#ifdef CONFIG_SUPPORT_EMMC_BOOT
return MMCSD_MODE_EMMCBOOT;
#else
return MMCSD_MODE_UNDEFINED;
#endif
return gd->arch.omap_boot_mode;
}
void spl_board_init(void)
@ -116,9 +133,12 @@ void spl_board_init(void)
/* Prepare console output */
preloader_console_init();
#ifdef CONFIG_SPL_NAND_SUPPORT
#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
#ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
arch_misc_init();
#endif
@ -150,9 +170,11 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
image_entry_noargs_t image_entry =
(image_entry_noargs_t) spl_image->entry_point;
u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
debug("image entry point: 0x%X\n", spl_image->entry_point);
/* Pass the saved boot_params from rom code */
image_entry((u32 *)&gd->arch.omap_boot_params);
image_entry((u32 *)boot_params);
}
#endif

2
arch/arm/cpu/armv7/omap-common/hwinit-common.c
View File

@ -90,7 +90,9 @@ void __weak srcomp_enable(void)
*/
int arch_cpu_init(void)
{
#ifdef CONFIG_SPL
save_omap_boot_params();
#endif
return 0;
}
#endif /* CONFIG_ARCH_CPU_INIT */

3
arch/arm/cpu/armv7/omap-common/lowlevel_init.S
View File

@ -16,8 +16,9 @@
#include <asm/arch/spl.h>
#include <linux/linkage.h>
#ifndef CONFIG_OMAP34XX
#ifdef CONFIG_SPL
ENTRY(save_boot_params)
ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS
str r0, [r1]
b save_boot_params_ret

59
arch/arm/cpu/armv7/omap3/board.c
View File

@ -18,7 +18,6 @@
*/
#include <common.h>
#include <dm.h>
#include <mmc.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
@ -27,8 +26,6 @@
#include <asm/armv7.h>
#include <asm/gpio.h>
#include <asm/omap_common.h>
#include <asm/arch/mmc_host_def.h>
#include <i2c.h>
#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
@ -73,62 +70,6 @@ const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
#endif
#ifdef CONFIG_SPL_BUILD
/*
* We use static variables because global data is not ready yet.
* Initialized data is available in SPL right from the beginning.
* We would not typically need to save these parameters in regular
* U-Boot. This is needed only in SPL at the moment.
*/
u32 omap3_boot_device = BOOT_DEVICE_NAND;
/* auto boot mode detection is not possible for OMAP3 - hard code */
u32 spl_boot_mode(void)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC2:
return MMCSD_MODE_RAW;
case BOOT_DEVICE_MMC1:
return MMCSD_MODE_FS;
break;
default:
puts("spl: ERROR: unknown device - can't select boot mode\n");
hang();
}
}
u32 spl_boot_device(void)
{
return omap3_boot_device;
}
int board_mmc_init(bd_t *bis)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
omap_mmc_init(0, 0, 0, -1, -1);
break;
case BOOT_DEVICE_MMC2:
case BOOT_DEVICE_MMC2_2:
omap_mmc_init(1, 0, 0, -1, -1);
break;
}
return 0;
}
void spl_board_init(void)
{
preloader_console_init();
#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
#ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
}
#endif /* CONFIG_SPL_BUILD */
/******************************************************************************
* Routine: secure_unlock
* Description: Setup security registers for access

10
arch/arm/cpu/armv7/omap3/lowlevel_init.S
View File

@ -16,16 +16,6 @@
#include <asm/arch/clocks_omap3.h>
#include <linux/linkage.h>
#ifdef CONFIG_SPL_BUILD
ENTRY(save_boot_params)
ldr r4, =omap3_boot_device
ldr r5, [r0, #0x4]
and r5, r5, #0xff
str r5, [r4]
b save_boot_params_ret
ENDPROC(save_boot_params)
#endif
/*
* Funtion for making PPA HAL API calls in secure devices
* Input:

11
arch/arm/include/asm/arch-am33xx/omap.h
View File

@ -33,4 +33,15 @@
#define AM4372_BOARD_VERSION_END SRAM_SCRATCH_SPACE_ADDR + 0x14
#define QSPI_BASE 0x47900000
#endif
/* Boot parameters */
#ifndef __ASSEMBLY__
struct omap_boot_parameters {
unsigned int reserved;
unsigned int boot_device_descriptor;
unsigned char boot_device;
unsigned char reset_reason;
};
#endif
#endif

1
arch/arm/include/asm/arch-am33xx/sys_proto.h
View File

@ -11,7 +11,6 @@
#ifndef _SYS_PROTO_H_
#define _SYS_PROTO_H_
#include <linux/mtd/omap_gpmc.h>
#include <asm/ti-common/sys_proto.h>
#include <asm/arch/cpu.h>
u32 get_cpu_rev(void);

13
arch/arm/include/asm/arch-omap3/omap.h
View File

@ -142,6 +142,7 @@ struct gpio {
#define NON_SECURE_SRAM_START 0x40208000 /* Works for GP & EMU */
#define NON_SECURE_SRAM_END 0x40210000
#define SRAM_SCRATCH_SPACE_ADDR 0x4020E000
#define LOW_LEVEL_SRAM_STACK 0x4020FFFC
@ -245,4 +246,16 @@ struct gpio {
/* ABB tranxdone mask */
#define OMAP_ABB_MPU_TXDONE_MASK (0x1 << 26)
/* Boot parameters */
#ifndef __ASSEMBLY__
struct omap_boot_parameters {
unsigned int boot_message;
unsigned char boot_device;
unsigned char reserved;
unsigned char reset_reason;
unsigned char ch_flags;
unsigned int boot_device_descriptor;
};
#endif
#endif

2
arch/arm/include/asm/arch-omap3/sys_proto.h
View File

@ -75,4 +75,6 @@ void get_dieid(u32 *id);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_set_aux_cr_secure(u32 acr);
u32 warm_reset(void);
void save_omap_boot_params(void);
#endif

11
arch/arm/include/asm/arch-omap4/omap.h
View File

@ -124,4 +124,15 @@ struct s32ktimer {
/* ABB tranxdone mask */
#define OMAP_ABB_MPU_TXDONE_MASK (0x1 << 7)
/* Boot parameters */
#ifndef __ASSEMBLY__
struct omap_boot_parameters {
unsigned int boot_message;
unsigned int boot_device_descriptor;
unsigned char boot_device;
unsigned char reset_reason;
unsigned char ch_flags;
};
#endif
#endif

12
arch/arm/include/asm/arch-omap5/omap.h
View File

@ -235,4 +235,16 @@ struct ctrl_ioregs {
};
#endif /* __ASSEMBLY__ */
/* Boot parameters */
#ifndef __ASSEMBLY__
struct omap_boot_parameters {
unsigned int boot_message;
unsigned int boot_device_descriptor;
unsigned char boot_device;
unsigned char reset_reason;
unsigned char ch_flags;
};
#endif
#endif

10
arch/arm/include/asm/global_data.h
View File

@ -8,10 +8,6 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
#ifdef CONFIG_OMAP
#include <asm/omap_boot.h>
#endif
/* Architecture-specific global data */
struct arch_global_data {
#if defined(CONFIG_FSL_ESDHC)
@ -45,8 +41,10 @@ struct arch_global_data {
unsigned long tlb_size;
#endif
#ifdef CONFIG_OMAP
struct omap_boot_parameters omap_boot_params;
#ifdef CONFIG_OMAP_COMMON
u32 omap_boot_device;
u32 omap_boot_mode;
u8 omap_ch_flags;
#endif
#ifdef CONFIG_FSL_LSCH3
unsigned long mem2_clk;

34
arch/arm/include/asm/omap_boot.h
View File

@ -1,34 +0,0 @@
/*
* (C) Copyright 2013
* Texas Instruments, <www.ti.com>
*
* Sricharan R <r.sricharan@ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* ROM code defines */
/* Boot device */
#define BOOT_DEVICE_MASK 0xFF
#define BOOT_DEVICE_OFFSET 0x8
#define DEV_DESC_PTR_OFFSET 0x4
#define DEV_DATA_PTR_OFFSET 0x18
#define BOOT_MODE_OFFSET 0x8
#define RESET_REASON_OFFSET 0x9
#define CH_FLAGS_OFFSET 0xA
#define CH_FLAGS_CHSETTINGS (0x1 << 0)
#define CH_FLAGS_CHRAM (0x1 << 1)
#define CH_FLAGS_CHFLASH (0x1 << 2)
#define CH_FLAGS_CHMMCSD (0x1 << 3)
#ifndef __ASSEMBLY__
struct omap_boot_parameters {
char *boot_message;
unsigned int mem_boot_descriptor;
unsigned char omap_bootdevice;
unsigned char reset_reason;
unsigned char ch_flags;
unsigned long omap_bootmode;
};
#endif

9
arch/arm/include/asm/omap_common.h
View File

@ -688,4 +688,13 @@ static inline u8 is_dra72x(void)
#define OMAP_SRAM_SCRATCH_BOOT_PARAMS (SRAM_SCRATCH_SPACE_ADDR + 0x24)
#define OMAP5_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x28)
/* Boot parameters */
#define DEVICE_DATA_OFFSET 0x18
#define BOOT_MODE_OFFSET 0x8
#define CH_FLAGS_CHSETTINGS (1 << 0)
#define CH_FLAGS_CHRAM (1 << 1)
#define CH_FLAGS_CHFLASH (1 << 2)
#define CH_FLAGS_CHMMCSD (1 << 3)
#endif /* _OMAP_COMMON_H_ */

2
arch/arm/include/asm/ti-common/sys_proto.h
View File

@ -36,7 +36,7 @@ static inline u8 uboot_loaded_by_spl(void)
* variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
* mandatory section if CH is present.
*/
if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
if (gd->arch.omap_ch_flags & CH_FLAGS_CHSETTINGS)
return 0;
else
return running_from_sdram();

2
board/compulab/cm_t54/cm_t54.c
View File

@ -82,7 +82,7 @@ static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval)
#ifdef CONFIG_SYS_MMC_ENV_PART
uint mmc_get_env_part(struct mmc *mmc)
{
u32 bootmode = gd->arch.omap_boot_params.omap_bootmode;
u32 bootmode = gd->arch.omap_boot_mode;
uint bootpart = CONFIG_SYS_MMC_ENV_PART;
/*

1
include/configs/ti_omap4_common.h
View File

@ -171,6 +171,7 @@
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
#undef CONFIG_SYS_I2C
#undef CONFIG_SYS_I2C_OMAP24XX
#undef CONFIG_SPL_I2C_SUPPORT
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */