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ARM: non-sec: reset CNTVOFF to zero 

Before switching to non-secure, make sure that CNTVOFF is set
to zero on all CPUs. Otherwise, kernel running in non-secure
without HYP enabled (hence using virtual timers) may observe
timers that are not synchronized, effectively seeing time
going backward...

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This commit is contained in:
Marc Zyngier 2014-07-12 14:24:00 +01:00 committed by Albert ARIBAUD
parent 800c83522c
commit 64fd44dcae
1 changed files with 8 additions and 1 deletions
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9
arch/arm/cpu/armv7/nonsec_virt.S
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@ -38,10 +38,10 @@ _secure_monitor:
bic r1, r1, #0x4e @ clear IRQ, FIQ, EA, nET bits
orr r1, r1, #0x31 @ enable NS, AW, FW bits
#ifdef CONFIG_ARMV7_VIRT
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_VIRT_MASK @ mask virtualization bits
cmp r0, #(1 << CPUID_ARM_VIRT_SHIFT)
#ifdef CONFIG_ARMV7_VIRT
orreq r1, r1, #0x100 @ allow HVC instruction
#endif
@ -52,7 +52,14 @@ _secure_monitor:
mrceq p15, 0, r0, c12, c0, 1 @ get MVBAR value
mcreq p15, 4, r0, c12, c0, 0 @ write HVBAR
#endif
bne 1f
@ Reset CNTVOFF to 0 before leaving monitor mode
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
ands r0, r0, #CPUID_ARM_GENTIMER_MASK @ test arch timer bits
movne r0, #0
mcrrne p15, 4, r0, r0, c14 @ Reset CNTVOFF to zero
1:
movs pc, lr @ return to non-secure SVC
_hyp_trap: