exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices

Add a TPM node to the various Chromebooks so that driver can be converted to
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Simon Glass 2015-08-22 18:31:37 -06:00
parent 5c51d8aa0e
commit 6e474eab44
6 changed files with 33 additions and 6 deletions

View File

@ -206,6 +206,15 @@
};
};
i2c@12C90000 {
clock-frequency = <100000>;
tpm@20 {
reg = <0x20>;
u-boot,i2c-offset-len = <0>;
compatible = "infineon,slb9635tt";
};
};
spi@12d30000 {
spi-max-frequency = <50000000>;
firmware_storage_spi: flash@0 {

View File

@ -59,6 +59,14 @@
<&gpy4 2 0>;
};
i2c@12C90000 {
clock-frequency = <100000>;
tpm@20 {
reg = <0x20>;
compatible = "infineon,slb9645tt";
};
};
mmc@12200000 {
samsung,bus-width = <8>;
samsung,timing = <1 3 3>;

View File

@ -197,9 +197,9 @@
i2c@12E10000 { /* i2c9 */
clock-frequency = <400000>;
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
};

View File

@ -72,9 +72,9 @@
i2c@12E10000 { /* i2c9 */
clock-frequency = <400000>;
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
};

View File

@ -237,6 +237,11 @@
};
};
tpm {
reg = <0xfed40000 0x5000>;
compatible = "infineon,slb9635lpc";
};
microcode {
update@0 {
#include "microcode/m12306a9_0000001b.dtsi"

View File

@ -62,4 +62,9 @@
};
};
tpm {
reg = <0xfed40000 0x5000>;
compatible = "infineon,slb9635lpc";
};
};