arm: Remove support for lpc2292
This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut
Albert ARIBAUD
parent
4c25761337
commit
6f62f42071
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@ -46,7 +46,7 @@ int cleanup_before_linux (void)
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* and we set the CPU-speed to 73 MHz - see start.S for details
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*/
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#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
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#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
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disable_interrupts ();
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/* Nothing more needed */
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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@ -37,11 +37,6 @@
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/* macro to read the 16 bit timer */
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#define READ_TIMER (IO_TC1D & 0xffff)
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#ifdef CONFIG_LPC2292
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#undef READ_TIMER
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#define READ_TIMER (0xFFFFFFFF - GET32(T0TC))
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#endif
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#else
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#define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
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#define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
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@ -73,13 +68,6 @@ void do_irq (struct pt_regs *pt_regs)
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}
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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/* No do_irq() for IntegratorAP/CM720T as yet */
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#elif defined(CONFIG_LPC2292)
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void (*pfnct)(void);
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pfnct = (void (*)(void))VICVectAddr;
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(*pfnct)();
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#else
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#error do_irq() not defined for this CPU type
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#endif
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@ -172,14 +160,6 @@ int timer_init (void)
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/* Start timer */
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SET_REG( REG_TMOD, TM0_RUN);
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#elif defined(CONFIG_LPC2292)
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PUT32(T0IR, 0); /* disable all timer0 interrupts */
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PUT32(T0TCR, 0); /* disable timer0 */
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PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ);
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PUT32(T0MCR, 0);
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PUT32(T0TC, 0);
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PUT32(T0TCR, 1); /* enable timer0 */
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#elif defined(CONFIG_TEGRA)
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/* No timer routines for tegra as yet */
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lastdec = 0;
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@ -198,7 +178,7 @@ int timer_init (void)
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*/
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#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
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#if defined(CONFIG_NETARM)
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ulong get_timer (ulong base)
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{
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@ -216,12 +196,6 @@ void __udelay (unsigned long usec)
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tmo += get_timer (0);
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while (get_timer_masked () < tmo)
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#ifdef CONFIG_LPC2292
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/* GJ - not sure whether this is really needed or a misunderstanding */
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__asm__ __volatile__(" nop");
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#else
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/*NOP*/;
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#endif
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}
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ulong get_timer_masked (void)
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@ -1,50 +0,0 @@
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#
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# (C) Copyright 2000-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(SOC).o
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COBJS = flash.o mmc.o mmc_hw.o spi.o
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SOBJS = $(obj)iap_entry.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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all: $(obj).depend $(LIB)
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$(LIB): $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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# this MUST be compiled as thumb code!
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$(SOBJS):
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$(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,249 +0,0 @@
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/*
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* (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
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*
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* Modified to remove all but the IAP-command related code by
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* Gary Jennejohn <garyj@denx.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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/* IAP commands use 32 bytes at the top of CPU internal sram, we
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use 512 bytes below that */
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#define COPY_BUFFER_LOCATION 0x40003de0
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#define IAP_LOCATION 0x7ffffff1
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#define IAP_CMD_PREPARE 50
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#define IAP_CMD_COPY 51
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#define IAP_CMD_ERASE 52
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#define IAP_CMD_CHECK 53
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#define IAP_CMD_ID 54
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#define IAP_CMD_VERSION 55
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#define IAP_CMD_COMPARE 56
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#define IAP_RET_CMD_SUCCESS 0
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static unsigned long command[5];
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static unsigned long result[2];
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extern void iap_entry(unsigned long * command, unsigned long * result);
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/*-----------------------------------------------------------------------
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*
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*/
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static int get_flash_sector(flash_info_t * info, ulong flash_addr)
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{
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int i;
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for(i = 1; i < (info->sector_count); i++) {
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if (flash_addr < (info->start[i]))
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break;
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}
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return (i-1);
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}
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/*-----------------------------------------------------------------------
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* This function assumes that flash_addr is aligned on 512 bytes boundary
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* in flash. This function also assumes that prepare have been called
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* for the sector in question.
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*/
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int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
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{
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int first_sector;
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int last_sector;
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first_sector = get_flash_sector(info, flash_addr);
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last_sector = get_flash_sector(info, flash_addr + 512 - 1);
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/* prepare sectors for write */
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command[0] = IAP_CMD_PREPARE;
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command[1] = first_sector;
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command[2] = last_sector;
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iap_entry(command, result);
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if (result[0] != IAP_RET_CMD_SUCCESS) {
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printf("IAP prepare failed\n");
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return ERR_PROG_ERROR;
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}
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command[0] = IAP_CMD_COPY;
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command[1] = flash_addr;
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command[2] = COPY_BUFFER_LOCATION;
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command[3] = 512;
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command[4] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
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iap_entry(command, result);
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if (result[0] != IAP_RET_CMD_SUCCESS) {
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printf("IAP copy failed\n");
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return 1;
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}
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return 0;
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}
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/*-----------------------------------------------------------------------
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*/
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int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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int flag;
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int prot;
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int sect;
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot)
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return ERR_PROTECTED;
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flag = disable_interrupts();
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printf ("Erasing %d sectors starting at sector %2d.\n"
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"This make take some time ... ",
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s_last - s_first + 1, s_first);
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command[0] = IAP_CMD_PREPARE;
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command[1] = s_first;
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command[2] = s_last;
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iap_entry(command, result);
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if (result[0] != IAP_RET_CMD_SUCCESS) {
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printf("IAP prepare failed\n");
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return ERR_PROTECTED;
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}
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command[0] = IAP_CMD_ERASE;
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command[1] = s_first;
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command[2] = s_last;
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command[3] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
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iap_entry(command, result);
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if (result[0] != IAP_RET_CMD_SUCCESS) {
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printf("IAP erase failed\n");
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return ERR_PROTECTED;
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}
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if (flag)
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enable_interrupts();
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return ERR_OK;
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}
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int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr,
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ulong cnt)
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{
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int first_copy_size;
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int last_copy_size;
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int first_block;
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int last_block;
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int nbr_mid_blocks;
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uchar memmap_value;
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ulong i;
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uchar* src_org;
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uchar* dst_org;
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int ret = ERR_OK;
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src_org = src;
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dst_org = (uchar*)addr;
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first_block = addr / 512;
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last_block = (addr + cnt) / 512;
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nbr_mid_blocks = last_block - first_block - 1;
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first_copy_size = 512 - (addr % 512);
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last_copy_size = (addr + cnt) % 512;
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debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
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"(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
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(ulong)(first_block * 512),
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(ulong)COPY_BUFFER_LOCATION,
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(ulong)src,
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(ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
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first_copy_size,
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(ulong)COPY_BUFFER_LOCATION,
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(ulong)(first_block * 512));
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/* copy first block */
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memcpy((void*)COPY_BUFFER_LOCATION,
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(void*)(first_block * 512), 512);
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memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
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src, first_copy_size);
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lpc2292_copy_buffer_to_flash(info, first_block * 512);
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src += first_copy_size;
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addr += first_copy_size;
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/* copy middle blocks */
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for (i = 0; i < nbr_mid_blocks; i++) {
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debug("copy middle block: %lX -> %lX 512 bytes, "
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"%lX -> %lX 512 bytes\n",
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(ulong)src,
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(ulong)COPY_BUFFER_LOCATION,
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(ulong)COPY_BUFFER_LOCATION,
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(ulong)addr);
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memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
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lpc2292_copy_buffer_to_flash(info, addr);
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src += 512;
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addr += 512;
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}
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if (last_copy_size > 0) {
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debug("copy last block: (1) %lX -> %lX 0x200 bytes, "
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"(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
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(ulong)(last_block * 512),
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(ulong)COPY_BUFFER_LOCATION,
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(ulong)src,
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(ulong)(COPY_BUFFER_LOCATION),
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last_copy_size,
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(ulong)COPY_BUFFER_LOCATION,
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(ulong)addr);
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/* copy last block */
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memcpy((void*)COPY_BUFFER_LOCATION,
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(void*)(last_block * 512), 512);
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memcpy((void*)COPY_BUFFER_LOCATION,
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src, last_copy_size);
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lpc2292_copy_buffer_to_flash(info, addr);
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}
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/* verify write */
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memmap_value = GET8(MEMMAP);
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disable_interrupts();
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PUT8(MEMMAP, 01); /* we must make sure that initial 64
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bytes are taken from flash when we
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do the compare */
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for (i = 0; i < cnt; i++) {
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if (*dst_org != *src_org){
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printf("Write failed. Byte %lX differs\n", i);
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ret = ERR_PROG_ERROR;
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break;
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}
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dst_org++;
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src_org++;
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}
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PUT8(MEMMAP, memmap_value);
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enable_interrupts();
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return ret;
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}
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@ -1,7 +0,0 @@
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IAP_ADDRESS: .word 0x7FFFFFF1
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.globl iap_entry
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iap_entry:
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ldr r2, IAP_ADDRESS
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bx r2
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mov pc, lr
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@ -1,131 +0,0 @@
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <common.h>
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#include <mmc.h>
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#include <asm/errno.h>
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#include <asm/arch/hardware.h>
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#include <part.h>
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#include <fat.h>
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#include "mmc_hw.h"
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#include <asm/arch/spi.h>
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#ifdef CONFIG_MMC
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#undef MMC_DEBUG
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static block_dev_desc_t mmc_dev;
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/* these are filled out by a call to mmc_hw_get_parameters */
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static int hw_size; /* in kbytes */
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static int hw_nr_sects;
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static int hw_sect_size; /* in bytes */
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block_dev_desc_t * mmc_get_dev(int dev)
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{
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return (block_dev_desc_t *)(&mmc_dev);
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}
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unsigned long mmc_block_read(int dev,
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unsigned long start,
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lbaint_t blkcnt,
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void *buffer)
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{
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unsigned long rc = 0;
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unsigned char *p = (unsigned char *)buffer;
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unsigned long i;
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unsigned long addr = start;
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#ifdef MMC_DEBUG
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printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
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(unsigned long)blkcnt);
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#endif
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for(i = 0; i < (unsigned long)blkcnt; i++) {
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#ifdef MMC_DEBUG
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printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
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#endif
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(void)mmc_read_sector(addr, p);
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rc++;
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addr++;
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p += hw_sect_size;
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}
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return rc;
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}
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/*-----------------------------------------------------------------------------
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* Read hardware paramterers (sector size, size, number of sectors)
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*/
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static int mmc_hw_get_parameters(void)
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{
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unsigned char csddata[16];
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unsigned int sizemult;
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unsigned int size;
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mmc_read_csd(csddata);
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hw_sect_size = 1<<(csddata[5] & 0x0f);
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size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
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sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
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hw_nr_sects = (size+1)*(1<<(sizemult+2));
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hw_size = hw_nr_sects*hw_sect_size/1024;
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#ifdef MMC_DEBUG
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printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
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"hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
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#endif
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return 0;
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}
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int mmc_legacy_init(int verbose)
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{
|
||||
int ret = -ENODEV;
|
||||
|
||||
if (verbose)
|
||||
printf("mmc_legacy_init\n");
|
||||
|
||||
spi_init();
|
||||
/* this meeds to be done twice */
|
||||
mmc_hw_init();
|
||||
udelay(1000);
|
||||
mmc_hw_init();
|
||||
|
||||
mmc_hw_get_parameters();
|
||||
|
||||
mmc_dev.if_type = IF_TYPE_MMC;
|
||||
mmc_dev.part_type = PART_TYPE_DOS;
|
||||
mmc_dev.dev = 0;
|
||||
mmc_dev.lun = 0;
|
||||
mmc_dev.type = 0;
|
||||
mmc_dev.blksz = hw_sect_size;
|
||||
mmc_dev.lba = hw_nr_sects;
|
||||
sprintf((char*)mmc_dev.vendor, "Unknown vendor");
|
||||
sprintf((char*)mmc_dev.product, "Unknown product");
|
||||
sprintf((char*)mmc_dev.revision, "N/A");
|
||||
mmc_dev.removable = 0; /* should be true??? */
|
||||
mmc_dev.block_read = mmc_block_read;
|
||||
|
||||
fat_register_device(&mmc_dev, 1);
|
||||
|
||||
ret = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_MMC */
|
||||
|
|
@ -1,233 +0,0 @@
|
|||
/*
|
||||
This code was original written by Ulrich Radig and modified by
|
||||
Embedded Artists AB (www.embeddedartists.com).
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/spi.h>
|
||||
|
||||
#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
|
||||
#define MMC_Disable() PUT32(IO1SET, 1l << 22)
|
||||
#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
|
||||
|
||||
static unsigned char Write_Command_MMC (unsigned char *CMD);
|
||||
static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
|
||||
unsigned short int Bytes);
|
||||
|
||||
/* initialize the hardware */
|
||||
int mmc_hw_init(void)
|
||||
{
|
||||
unsigned long a;
|
||||
unsigned short int Timeout = 0;
|
||||
unsigned char b;
|
||||
unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
|
||||
|
||||
/* set-up GPIO and SPI */
|
||||
(*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
|
||||
(*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
|
||||
|
||||
MMC_Disable();
|
||||
|
||||
spi_lock();
|
||||
spi_set_clock(248);
|
||||
spi_set_cfg(0, 1, 0);
|
||||
MMC_Enable();
|
||||
|
||||
/* waste some time */
|
||||
for(a=0; a < 20000; a++)
|
||||
asm("nop");
|
||||
|
||||
/* Put the MMC/SD-card into SPI-mode */
|
||||
for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
|
||||
spi_write(0xff);
|
||||
|
||||
/* Sends command CMD0 to MMC/SD-card */
|
||||
while (Write_Command_MMC(CMD) != 1) {
|
||||
if (Timeout++ > 200) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return(1); /* Abort with command 1 (return 1) */
|
||||
}
|
||||
}
|
||||
/* Sends Command CMD1 an MMC/SD-card */
|
||||
Timeout = 0;
|
||||
CMD[0] = 0x41;/* Command 1 */
|
||||
CMD[5] = 0xFF;
|
||||
|
||||
while (Write_Command_MMC(CMD) != 0) {
|
||||
if (Timeout++ > 200) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return (2); /* Abort with command 2 (return 2) */
|
||||
}
|
||||
}
|
||||
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Sends a command to the MMC/SD-card
|
||||
######################################################################### */
|
||||
static unsigned char Write_Command_MMC (unsigned char *CMD)
|
||||
{
|
||||
unsigned char a, tmp = 0xff;
|
||||
unsigned short int Timeout = 0;
|
||||
|
||||
MMC_Disable();
|
||||
spi_write(0xFF);
|
||||
MMC_Enable();
|
||||
|
||||
for (a = 0; a < 0x06; a++)
|
||||
spi_write(*CMD++);
|
||||
|
||||
while (tmp == 0xff) {
|
||||
tmp = spi_read();
|
||||
if (Timeout++ > 5000)
|
||||
break;
|
||||
}
|
||||
|
||||
return (tmp);
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Routine to read the CID register from the MMC/SD-card (16 bytes)
|
||||
######################################################################### */
|
||||
void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
|
||||
int Bytes)
|
||||
{
|
||||
unsigned short int a;
|
||||
|
||||
spi_lock();
|
||||
mmc_spi_cfg();
|
||||
MMC_Enable();
|
||||
|
||||
if (Write_Command_MMC(CMD) != 0) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return;
|
||||
}
|
||||
|
||||
while (spi_read() != 0xfe) {};
|
||||
for (a = 0; a < Bytes; a++)
|
||||
*Buffer++ = spi_read();
|
||||
|
||||
/* Read the CRC-byte */
|
||||
spi_read(); /* CRC - byte is discarded */
|
||||
spi_read(); /* CRC - byte is discarded */
|
||||
/* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Routine to read a block (512 bytes) from the MMC/SD-card
|
||||
######################################################################### */
|
||||
unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
|
||||
{
|
||||
/* Command 16 to read aBlocks from the MMC/SD - caed */
|
||||
unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
|
||||
|
||||
/* The address on the MMC/SD-card is in bytes,
|
||||
addr is transformed from blocks to bytes and the result is
|
||||
placed into the command */
|
||||
|
||||
addr = addr << 9; /* addr = addr * 512 */
|
||||
|
||||
CMD[1] = ((addr & 0xFF000000) >> 24);
|
||||
CMD[2] = ((addr & 0x00FF0000) >> 16);
|
||||
CMD[3] = ((addr & 0x0000FF00) >> 8 );
|
||||
|
||||
MMC_Read_Block(CMD, Buffer, 512);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Routine to write a block (512 byte) to the MMC/SD-card
|
||||
######################################################################### */
|
||||
unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
|
||||
{
|
||||
unsigned char tmp, a;
|
||||
unsigned short int b;
|
||||
/* Command 24 to write a block to the MMC/SD - card */
|
||||
unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
|
||||
|
||||
/* The address on the MMC/SD-card is in bytes,
|
||||
addr is transformed from blocks to bytes and the result is
|
||||
placed into the command */
|
||||
|
||||
addr = addr << 9; /* addr = addr * 512 */
|
||||
|
||||
CMD[1] = ((addr & 0xFF000000) >> 24);
|
||||
CMD[2] = ((addr & 0x00FF0000) >> 16);
|
||||
CMD[3] = ((addr & 0x0000FF00) >> 8 );
|
||||
|
||||
spi_lock();
|
||||
mmc_spi_cfg();
|
||||
MMC_Enable();
|
||||
|
||||
/* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
|
||||
tmp = Write_Command_MMC(CMD);
|
||||
if (tmp != 0) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return(tmp);
|
||||
}
|
||||
|
||||
/* Do a short delay and send a clock-pulse to the MMC/SD-card */
|
||||
for (a = 0; a < 100; a++)
|
||||
spi_read();
|
||||
|
||||
/* Send a start byte to the MMC/SD-card */
|
||||
spi_write(0xFE);
|
||||
|
||||
/* Write the block (512 bytes) to the MMC/SD-card */
|
||||
for (b = 0; b < 512; b++)
|
||||
spi_write(*Buffer++);
|
||||
|
||||
/* write the CRC-Byte */
|
||||
spi_write(0xFF); /* write a dummy CRC */
|
||||
spi_write(0xFF); /* CRC code is not used */
|
||||
|
||||
/* Wait for MMC/SD-card busy */
|
||||
while (spi_read() != 0xff) {};
|
||||
|
||||
/* set MMC_Chip_Select to high (MMC/SD-card inactive) */
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* #########################################################################
|
||||
Routine to read the CSD register from the MMC/SD-card (16 bytes)
|
||||
######################################################################### */
|
||||
unsigned char mmc_read_csd (unsigned char *Buffer)
|
||||
{
|
||||
/* Command to read the CSD register */
|
||||
unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
|
||||
|
||||
MMC_Read_Block(CMD, Buffer, 16);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -1,29 +0,0 @@
|
|||
/*
|
||||
This module implements a linux character device driver for the 24c256 chip.
|
||||
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _MMC_HW_
|
||||
#define _MMC_HW_
|
||||
|
||||
unsigned char mmc_read_csd(unsigned char *Buffer);
|
||||
unsigned char mmc_read_sector (unsigned long addr,
|
||||
unsigned char *Buffer);
|
||||
unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer);
|
||||
int mmc_hw_init(void);
|
||||
|
||||
#endif /* _MMC_HW_ */
|
||||
|
|
@ -1,40 +0,0 @@
|
|||
/*
|
||||
This module implements an interface to the SPI on the lpc22xx.
|
||||
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/spi.h>
|
||||
|
||||
unsigned long spi_flags;
|
||||
unsigned char spi_idle = 0x00;
|
||||
|
||||
int spi_init(void)
|
||||
{
|
||||
unsigned long pinsel0_value;
|
||||
|
||||
/* activate spi pins */
|
||||
pinsel0_value = GET32(PINSEL0);
|
||||
pinsel0_value &= ~(0xFFl << 8);
|
||||
pinsel0_value |= (0x55l << 8);
|
||||
PUT32(PINSEL0, pinsel0_value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -43,11 +43,7 @@ _start: b reset
|
|||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
#ifdef CONFIG_LPC2292
|
||||
.word 0xB4405F76 /* 2's complement of the checksum of the vectors */
|
||||
#else
|
||||
ldr pc, _not_used
|
||||
#endif
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
|
|
@ -151,10 +147,6 @@ reset:
|
|||
bl cpu_init_crit
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LPC2292
|
||||
bl lowlevel_init
|
||||
#endif
|
||||
|
||||
/* Set stackpointer in internal RAM to call board_init_f */
|
||||
call_board_init_f:
|
||||
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
|
||||
|
|
@ -291,16 +283,6 @@ _dynsym_start_ofs:
|
|||
*************************************************************************
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_LPC2292)
|
||||
PLLCFG_ADR: .word PLLCFG
|
||||
PLLFEED_ADR: .word PLLFEED
|
||||
PLLCON_ADR: .word PLLCON
|
||||
PLLSTAT_ADR: .word PLLSTAT
|
||||
VPBDIV_ADR: .word VPBDIV
|
||||
MEMMAP_ADR: .word MEMMAP
|
||||
|
||||
#endif
|
||||
|
||||
cpu_init_crit:
|
||||
#if defined(CONFIG_NETARM)
|
||||
/*
|
||||
|
|
@ -371,50 +353,6 @@ cpu_init_crit:
|
|||
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No specific initialisation for IntegratorAP/CM720T as yet */
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
/* Set-up PLL */
|
||||
mov r3, #0xAA
|
||||
mov r4, #0x55
|
||||
/* First disconnect and disable the PLL */
|
||||
ldr r0, PLLCON_ADR
|
||||
mov r1, #0x00
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Set new M and P values */
|
||||
ldr r0, PLLCFG_ADR
|
||||
mov r1, #0x23 /* M=4 and P=2 */
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Then enable the PLL */
|
||||
ldr r0, PLLCON_ADR
|
||||
mov r1, #0x01 /* PLL enable bit */
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Wait for the lock */
|
||||
ldr r0, PLLSTAT_ADR
|
||||
mov r1, #0x400 /* lock bit */
|
||||
lock_loop:
|
||||
ldr r2, [r0]
|
||||
and r2, r1, r2
|
||||
cmp r2, #0
|
||||
beq lock_loop
|
||||
/* And finally connect the PLL */
|
||||
ldr r0, PLLCON_ADR
|
||||
mov r1, #0x03 /* PLL enable bit and connect bit */
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Set-up VPBDIV register */
|
||||
ldr r0, VPBDIV_ADR
|
||||
mov r1, #0x01 /* VPB clock is same as process clock */
|
||||
str r1, [r0]
|
||||
#elif defined(CONFIG_TEGRA)
|
||||
/* No cpu_init_crit for tegra as yet */
|
||||
#else
|
||||
|
|
@ -432,7 +370,7 @@ lock_loop:
|
|||
str r1, [r0]
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_LPC2292) && !defined(CONFIG_TEGRA)
|
||||
#if !defined(CONFIG_TEGRA)
|
||||
mov ip, lr
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
|
|
@ -636,11 +574,6 @@ reset_cpu:
|
|||
* on external peripherals such as watchdog timers, etc. */
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No specific reset actions for IntegratorAP/CM720T as yet */
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
.align 5
|
||||
.globl reset_cpu
|
||||
reset_cpu:
|
||||
mov pc, r0
|
||||
#elif defined(CONFIG_TEGRA)
|
||||
/* No specific reset actions for tegra as yet */
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -1,33 +0,0 @@
|
|||
#ifndef __ASM_ARCH_HARDWARE_H
|
||||
#define __ASM_ARCH_HARDWARE_H
|
||||
|
||||
/*
|
||||
* Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
|
||||
* Curt Brune <curt@cucy.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_LPC2292)
|
||||
#include <asm/arch-lpc2292/lpc2292_registers.h>
|
||||
#else
|
||||
#error No hardware file defined for this configuration
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ARCH_HARDWARE_H */
|
||||
|
|
@ -1,225 +0,0 @@
|
|||
#ifndef __LPC2292_REGISTERS_H
|
||||
#define __LPC2292_REGISTERS_H
|
||||
|
||||
#include <config.h>
|
||||
|
||||
/* Macros for reading/writing registers */
|
||||
#define PUT8(reg, value) (*(volatile unsigned char*)(reg) = (value))
|
||||
#define PUT16(reg, value) (*(volatile unsigned short*)(reg) = (value))
|
||||
#define PUT32(reg, value) (*(volatile unsigned int*)(reg) = (value))
|
||||
#define GET8(reg) (*(volatile unsigned char*)(reg))
|
||||
#define GET16(reg) (*(volatile unsigned short*)(reg))
|
||||
#define GET32(reg) (*(volatile unsigned int*)(reg))
|
||||
|
||||
/* External Memory Controller */
|
||||
|
||||
#define BCFG0 0xFFE00000 /* 32-bits */
|
||||
#define BCFG1 0xFFE00004 /* 32-bits */
|
||||
#define BCFG2 0xFFE00008 /* 32-bits */
|
||||
#define BCFG3 0xFFE0000c /* 32-bits */
|
||||
|
||||
/* System Control Block */
|
||||
|
||||
#define EXTINT 0xE01FC140
|
||||
#define EXTWAKE 0xE01FC144
|
||||
#define EXTMODE 0xE01FC148
|
||||
#define EXTPOLAR 0xE01FC14C
|
||||
#define MEMMAP 0xE01FC040
|
||||
#define PLLCON 0xE01FC080
|
||||
#define PLLCFG 0xE01FC084
|
||||
#define PLLSTAT 0xE01FC088
|
||||
#define PLLFEED 0xE01FC08C
|
||||
#define PCON 0xE01FC0C0
|
||||
#define PCONP 0xE01FC0C4
|
||||
#define VPBDIV 0xE01FC100
|
||||
|
||||
/* Memory Acceleration Module */
|
||||
|
||||
#define MAMCR 0xE01FC000
|
||||
#define MAMTIM 0xE01FC004
|
||||
|
||||
/* Vectored Interrupt Controller */
|
||||
|
||||
#define VICIRQStatus 0xFFFFF000
|
||||
#define VICFIQStatus 0xFFFFF004
|
||||
#define VICRawIntr 0xFFFFF008
|
||||
#define VICIntSelect 0xFFFFF00C
|
||||
#define VICIntEnable 0xFFFFF010
|
||||
#define VICIntEnClr 0xFFFFF014
|
||||
#define VICSoftInt 0xFFFFF018
|
||||
#define VICSoftIntClear 0xFFFFF01C
|
||||
#define VICProtection 0xFFFFF020
|
||||
#define VICVectAddr 0xFFFFF030
|
||||
#define VICDefVectAddr 0xFFFFF034
|
||||
#define VICVectAddr0 0xFFFFF100
|
||||
#define VICVectAddr1 0xFFFFF104
|
||||
#define VICVectAddr2 0xFFFFF108
|
||||
#define VICVectAddr3 0xFFFFF10C
|
||||
#define VICVectAddr4 0xFFFFF110
|
||||
#define VICVectAddr5 0xFFFFF114
|
||||
#define VICVectAddr6 0xFFFFF118
|
||||
#define VICVectAddr7 0xFFFFF11C
|
||||
#define VICVectAddr8 0xFFFFF120
|
||||
#define VICVectAddr9 0xFFFFF124
|
||||
#define VICVectAddr10 0xFFFFF128
|
||||
#define VICVectAddr11 0xFFFFF12C
|
||||
#define VICVectAddr12 0xFFFFF130
|
||||
#define VICVectAddr13 0xFFFFF134
|
||||
#define VICVectAddr14 0xFFFFF138
|
||||
#define VICVectAddr15 0xFFFFF13C
|
||||
#define VICVectCntl0 0xFFFFF200
|
||||
#define VICVectCntl1 0xFFFFF204
|
||||
#define VICVectCntl2 0xFFFFF208
|
||||
#define VICVectCntl3 0xFFFFF20C
|
||||
#define VICVectCntl4 0xFFFFF210
|
||||
#define VICVectCntl5 0xFFFFF214
|
||||
#define VICVectCntl6 0xFFFFF218
|
||||
#define VICVectCntl7 0xFFFFF21C
|
||||
#define VICVectCntl8 0xFFFFF220
|
||||
#define VICVectCntl9 0xFFFFF224
|
||||
#define VICVectCntl10 0xFFFFF228
|
||||
#define VICVectCntl11 0xFFFFF22C
|
||||
#define VICVectCntl12 0xFFFFF230
|
||||
#define VICVectCntl13 0xFFFFF234
|
||||
#define VICVectCntl14 0xFFFFF238
|
||||
#define VICVectCntl15 0xFFFFF23C
|
||||
|
||||
/* Pin connect block */
|
||||
|
||||
#define PINSEL0 0xE002C000 /* 32 bits */
|
||||
#define PINSEL1 0xE002C004 /* 32 bits */
|
||||
#define PINSEL2 0xE002C014 /* 32 bits */
|
||||
|
||||
/* GPIO */
|
||||
|
||||
#define IO0PIN 0xE0028000
|
||||
#define IO0SET 0xE0028004
|
||||
#define IO0DIR 0xE0028008
|
||||
#define IO0CLR 0xE002800C
|
||||
#define IO1PIN 0xE0028010
|
||||
#define IO1SET 0xE0028014
|
||||
#define IO1DIR 0xE0028018
|
||||
#define IO1CLR 0xE002801C
|
||||
#define IO2PIN 0xE0028020
|
||||
#define IO2SET 0xE0028024
|
||||
#define IO2DIR 0xE0028028
|
||||
#define IO2CLR 0xE002802C
|
||||
#define IO3PIN 0xE0028030
|
||||
#define IO3SET 0xE0028034
|
||||
#define IO3DIR 0xE0028038
|
||||
#define IO3CLR 0xE002803C
|
||||
|
||||
/* Uarts */
|
||||
|
||||
#define U0RBR 0xE000C000
|
||||
#define U0THR 0xE000C000
|
||||
#define U0IER 0xE000C004
|
||||
#define U0IIR 0xE000C008
|
||||
#define U0FCR 0xE000C008
|
||||
#define U0LCR 0xE000C00C
|
||||
#define U0LSR 0xE000C014
|
||||
#define U0SCR 0xE000C01C
|
||||
#define U0DLL 0xE000C000
|
||||
#define U0DLM 0xE000C004
|
||||
|
||||
#define U1RBR 0xE0010000
|
||||
#define U1THR 0xE0010000
|
||||
#define U1IER 0xE0010004
|
||||
#define U1IIR 0xE0010008
|
||||
#define U1FCR 0xE0010008
|
||||
#define U1LCR 0xE001000C
|
||||
#define U1MCR 0xE0010010
|
||||
#define U1LSR 0xE0010014
|
||||
#define U1MSR 0xE0010018
|
||||
#define U1SCR 0xE001001C
|
||||
#define U1DLL 0xE0010000
|
||||
#define U1DLM 0xE0010004
|
||||
|
||||
/* I2C */
|
||||
|
||||
#define I2CONSET 0xE001C000
|
||||
#define I2STAT 0xE001C004
|
||||
#define I2DAT 0xE001C008
|
||||
#define I2ADR 0xE001C00C
|
||||
#define I2SCLH 0xE001C010
|
||||
#define I2SCLL 0xE001C014
|
||||
#define I2CONCLR 0xE001C018
|
||||
|
||||
/* SPI */
|
||||
|
||||
#define S0SPCR 0xE0020000
|
||||
#define S0SPSR 0xE0020004
|
||||
#define S0SPDR 0xE0020008
|
||||
#define S0SPCCR 0xE002000C
|
||||
#define S0SPINT 0xE002001C
|
||||
|
||||
#define S1SPCR 0xE0030000
|
||||
#define S1SPSR 0xE0030004
|
||||
#define S1SPDR 0xE0030008
|
||||
#define S1SPCCR 0xE003000C
|
||||
#define S1SPINT 0xE003001C
|
||||
|
||||
/* CAN controller */
|
||||
|
||||
/* skip for now */
|
||||
|
||||
/* Timers */
|
||||
|
||||
#define T0IR 0xE0004000
|
||||
#define T0TCR 0xE0004004
|
||||
#define T0TC 0xE0004008
|
||||
#define T0PR 0xE000400C
|
||||
#define T0PC 0xE0004010
|
||||
#define T0MCR 0xE0004014
|
||||
#define T0MR0 0xE0004018
|
||||
#define T0MR1 0xE000401C
|
||||
#define T0MR2 0xE0004020
|
||||
#define T0MR3 0xE0004024
|
||||
#define T0CCR 0xE0004028
|
||||
#define T0CR0 0xE000402C
|
||||
#define T0CR1 0xE0004030
|
||||
#define T0CR2 0xE0004034
|
||||
#define T0CR3 0xE0004038
|
||||
#define T0EMR 0xE000403C
|
||||
|
||||
#define T1IR 0xE0008000
|
||||
#define T1TCR 0xE0008004
|
||||
#define T1TC 0xE0008008
|
||||
#define T1PR 0xE000800C
|
||||
#define T1PC 0xE0008010
|
||||
#define T1MCR 0xE0008014
|
||||
#define T1MR0 0xE0008018
|
||||
#define T1MR1 0xE000801C
|
||||
#define T1MR2 0xE0008020
|
||||
#define T1MR3 0xE0008024
|
||||
#define T1CCR 0xE0008028
|
||||
#define T1CR0 0xE000802C
|
||||
#define T1CR1 0xE0008030
|
||||
#define T1CR2 0xE0008034
|
||||
#define T1CR3 0xE0008038
|
||||
#define T1EMR 0xE000803C
|
||||
|
||||
/* PWM */
|
||||
|
||||
/* skip for now */
|
||||
|
||||
/* A/D converter */
|
||||
|
||||
/* skip for now */
|
||||
|
||||
/* Real Time Clock */
|
||||
|
||||
/* skip for now */
|
||||
|
||||
/* Watchdog */
|
||||
|
||||
#define WDMOD 0xE0000000
|
||||
#define WDTC 0xE0000004
|
||||
#define WDFEED 0xE0000008
|
||||
#define WDTV 0xE000000C
|
||||
|
||||
/* EmbeddedICE LOGIC */
|
||||
|
||||
/* skip for now */
|
||||
|
||||
#endif
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
/*
|
||||
This file defines the interface to the lpc22xx SPI module.
|
||||
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
|
||||
|
||||
This file may be included in software not adhering to the GPL.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef SPI_H
|
||||
#define SPI_H
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
#define SPIF 0x80
|
||||
|
||||
#define spi_lock() disable_interrupts();
|
||||
#define spi_unlock() enable_interrupts();
|
||||
|
||||
extern unsigned long spi_flags;
|
||||
extern unsigned char spi_idle;
|
||||
|
||||
int spi_init(void);
|
||||
|
||||
static inline unsigned char spi_read(void)
|
||||
{
|
||||
unsigned char b;
|
||||
|
||||
PUT8(S0SPDR, spi_idle);
|
||||
while (!(GET8(S0SPSR) & SPIF));
|
||||
b = GET8(S0SPDR);
|
||||
|
||||
return b;
|
||||
}
|
||||
|
||||
static inline void spi_write(unsigned char b)
|
||||
{
|
||||
PUT8(S0SPDR, b);
|
||||
while (!(GET8(S0SPSR) & SPIF));
|
||||
GET8(S0SPDR); /* this will clear the SPIF bit */
|
||||
}
|
||||
|
||||
static inline void spi_set_clock(unsigned char clk_value)
|
||||
{
|
||||
PUT8(S0SPCCR, clk_value);
|
||||
}
|
||||
|
||||
static inline void spi_set_cfg(unsigned char phase,
|
||||
unsigned char polarity,
|
||||
unsigned char lsbf)
|
||||
{
|
||||
unsigned char v = 0x20; /* master bit set */
|
||||
|
||||
if (phase)
|
||||
v |= 0x08; /* set phase bit */
|
||||
if (polarity) {
|
||||
v |= 0x10; /* set polarity bit */
|
||||
spi_idle = 0xFF;
|
||||
} else {
|
||||
spi_idle = 0x00;
|
||||
}
|
||||
if (lsbf)
|
||||
v |= 0x40; /* set lsbf bit */
|
||||
|
||||
PUT8(S0SPCR, v);
|
||||
}
|
||||
#endif /* SPI_H */
|
||||
|
|
@ -125,63 +125,59 @@ III) Analysis of in-tree drivers
|
|||
-------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
17) serial_lpc2292.c
|
||||
17) serial_max3100.c
|
||||
--------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
18) serial_max3100.c
|
||||
--------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
19) serial_mxc.c
|
||||
18) serial_mxc.c
|
||||
----------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
20) serial_netarm.c
|
||||
19) serial_netarm.c
|
||||
-------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
21) serial_pl01x.c
|
||||
20) serial_pl01x.c
|
||||
------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible, though this
|
||||
driver in fact contains two drivers in total.
|
||||
|
||||
22) serial_pxa.c
|
||||
21) serial_pxa.c
|
||||
----------------
|
||||
This driver is a bit complicated, but due to clean support for
|
||||
CONFIG_SERIAL_MULTI, there are no expected obstructions throughout the
|
||||
conversion process.
|
||||
|
||||
23) serial_s3c24x0.c
|
||||
22) serial_s3c24x0.c
|
||||
--------------------
|
||||
This driver, being quite ad-hoc might need some work to bring back to shape.
|
||||
|
||||
24) serial_s3c44b0.c
|
||||
23) serial_s3c44b0.c
|
||||
--------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
25) serial_s5p.c
|
||||
24) serial_s5p.c
|
||||
----------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
26) serial_sa1100.c
|
||||
25) serial_sa1100.c
|
||||
-------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
27) serial_sh.c
|
||||
26) serial_sh.c
|
||||
---------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
28) serial_xuartlite.c
|
||||
27) serial_xuartlite.c
|
||||
----------------------
|
||||
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
|
||||
|
||||
29) usbtty.c
|
||||
28) usbtty.c
|
||||
------------
|
||||
This driver seems very complicated and entangled with USB framework. The
|
||||
conversion might be complicated here.
|
||||
|
||||
30) arch/powerpc/cpu/mpc512x/serial.c
|
||||
29) arch/powerpc/cpu/mpc512x/serial.c
|
||||
-------------------------------------
|
||||
This driver supports CONFIG_SERIAL_MULTI. This driver will need to be moved to
|
||||
proper place.
|
||||
|
|
|
|||
|
|
@ -41,9 +41,6 @@
|
|||
#ifdef CONFIG_IXP425 /* only valid for IXP425 */
|
||||
#include <asm/arch/ixp425.h>
|
||||
#endif
|
||||
#ifdef CONFIG_LPC2292
|
||||
#include <asm/arch/hardware.h>
|
||||
#endif
|
||||
#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
|
||||
#include <asm/io.h>
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -44,7 +44,6 @@ COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o
|
|||
COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o
|
||||
COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o
|
||||
COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o
|
||||
COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o
|
||||
COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
|
||||
COBJS-$(CONFIG_MXC_UART) += serial_mxc.o
|
||||
COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o
|
||||
|
|
|
|||
|
|
@ -104,7 +104,6 @@ serial_initfunc(imx_serial_initialize);
|
|||
serial_initfunc(ixp_serial_initialize);
|
||||
serial_initfunc(ks8695_serial_initialize);
|
||||
serial_initfunc(lh7a40x_serial_initialize);
|
||||
serial_initfunc(lpc2292_serial_initialize);
|
||||
serial_initfunc(max3100_serial_initialize);
|
||||
serial_initfunc(mxc_serial_initialize);
|
||||
serial_initfunc(netarm_serial_initialize);
|
||||
|
|
@ -202,7 +201,6 @@ void serial_initialize(void)
|
|||
ixp_serial_initialize();
|
||||
ks8695_serial_initialize();
|
||||
lh7a40x_serial_initialize();
|
||||
lpc2292_serial_initialize();
|
||||
max3100_serial_initialize();
|
||||
mxc_serial_initialize();
|
||||
netarm_serial_initialize();
|
||||
|
|
|
|||
|
|
@ -1,117 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2002-2004
|
||||
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static void lpc2292_serial_setbrg(void)
|
||||
{
|
||||
unsigned short divisor = 0;
|
||||
|
||||
switch (gd->baudrate) {
|
||||
case 1200: divisor = 3072; break;
|
||||
case 9600: divisor = 384; break;
|
||||
case 19200: divisor = 192; break;
|
||||
case 38400: divisor = 96; break;
|
||||
case 57600: divisor = 64; break;
|
||||
case 115200: divisor = 32; break;
|
||||
default: hang (); break;
|
||||
}
|
||||
|
||||
/* init serial UART0 */
|
||||
PUT8(U0LCR, 0);
|
||||
PUT8(U0IER, 0);
|
||||
PUT8(U0LCR, 0x80); /* DLAB=1 */
|
||||
PUT8(U0DLL, (unsigned char)(divisor & 0x00FF));
|
||||
PUT8(U0DLM, (unsigned char)(divisor >> 8));
|
||||
PUT8(U0LCR, 0x03); /* 8N1, DLAB=0 */
|
||||
PUT8(U0FCR, 1); /* Enable RX and TX FIFOs */
|
||||
}
|
||||
|
||||
static int lpc2292_serial_init(void)
|
||||
{
|
||||
unsigned long pinsel0;
|
||||
|
||||
serial_setbrg ();
|
||||
|
||||
pinsel0 = GET32(PINSEL0);
|
||||
pinsel0 &= ~(0x00000003);
|
||||
pinsel0 |= 5;
|
||||
PUT32(PINSEL0, pinsel0);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void lpc2292_serial_putc(const char c)
|
||||
{
|
||||
if (c == '\n')
|
||||
{
|
||||
while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */
|
||||
PUT8(U0THR, '\r');
|
||||
}
|
||||
|
||||
while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */
|
||||
PUT8(U0THR, c);
|
||||
}
|
||||
|
||||
static int lpc2292_serial_getc(void)
|
||||
{
|
||||
while((GET8(U0LSR) & 1) == 0);
|
||||
return GET8(U0RBR);
|
||||
}
|
||||
|
||||
/* Test if there is a byte to read */
|
||||
static int lpc2292_serial_tstc(void)
|
||||
{
|
||||
return (GET8(U0LSR) & 1);
|
||||
}
|
||||
|
||||
static struct serial_device lpc2292_serial_drv = {
|
||||
.name = "lpc2292_serial",
|
||||
.start = lpc2292_serial_init,
|
||||
.stop = NULL,
|
||||
.setbrg = lpc2292_serial_setbrg,
|
||||
.putc = lpc2292_serial_putc,
|
||||
.puts = default_serial_puts,
|
||||
.getc = lpc2292_serial_getc,
|
||||
.tstc = lpc2292_serial_tstc,
|
||||
};
|
||||
|
||||
void lpc2292_serial_initialize(void)
|
||||
{
|
||||
serial_register(&lpc2292_serial_drv);
|
||||
}
|
||||
|
||||
__weak struct serial_device *default_serial_console(void)
|
||||
{
|
||||
return &lpc2292_serial_drv;
|
||||
}
|
||||
|
|
@ -348,7 +348,6 @@ extern flash_info_t *flash_get_info(ulong base);
|
|||
|
||||
#define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */
|
||||
#define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */
|
||||
#define PHILIPS_LPC2292 0x0401FF13 /* LPC2292 internal FLASH */
|
||||
#define NUMONYX_256MBIT 0x8922 /* Numonyx P33/30 256MBit 65nm */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
|
|
|
|||
Loading…
Reference in New Issue