Remove kirkwood-specifics from marvell EHCI driver
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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a14bd41738
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74d3442111
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@ -65,6 +65,18 @@
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#define MVGBE0_BASE KW_EGIGA0_BASE
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#define MVGBE0_BASE KW_EGIGA0_BASE
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#define MVGBE1_BASE KW_EGIGA1_BASE
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#define MVGBE1_BASE KW_EGIGA1_BASE
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/* Kirkwood USB Host controller */
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#define MVUSB0_BASE KW_USB20_BASE
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#define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0
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#define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1
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#define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2
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#define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3
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/* Kirkwood CPU memory windows */
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#define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA
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#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
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#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
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#if defined (CONFIG_KW88F6281)
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#if defined (CONFIG_KW88F6281)
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#include <asm/arch/kw88f6281.h>
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#include <asm/arch/kw88f6281.h>
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#elif defined (CONFIG_KW88F6192)
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#elif defined (CONFIG_KW88F6192)
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@ -30,8 +30,10 @@
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#include <asm/arch/cpu.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/kirkwood.h>
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#include <asm/arch/kirkwood.h>
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#define rdl(off) readl(KW_USB20_BASE + (off))
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DECLARE_GLOBAL_DATA_PTR;
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#define wrl(off, val) writel((val), KW_USB20_BASE + (off))
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#define rdl(off) readl(MVUSB0_BASE + (off))
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#define wrl(off, val) writel((val), MVUSB0_BASE + (off))
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#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
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#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
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#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
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#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
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@ -43,23 +45,23 @@
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static void usb_brg_adrdec_setup(void)
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static void usb_brg_adrdec_setup(void)
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{
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{
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int i;
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int i;
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u32 size, attrib;
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u32 size, base, attrib;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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/* Enable DRAM bank */
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/* Enable DRAM bank */
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switch (i) {
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switch (i) {
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case 0:
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case 0:
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attrib = KWCPU_ATTR_DRAM_CS0;
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attrib = MVUSB0_CPU_ATTR_DRAM_CS0;
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break;
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break;
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case 1:
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case 1:
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attrib = KWCPU_ATTR_DRAM_CS1;
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attrib = MVUSB0_CPU_ATTR_DRAM_CS1;
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break;
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break;
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case 2:
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case 2:
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attrib = KWCPU_ATTR_DRAM_CS2;
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attrib = MVUSB0_CPU_ATTR_DRAM_CS2;
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break;
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break;
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case 3:
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case 3:
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attrib = KWCPU_ATTR_DRAM_CS3;
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attrib = MVUSB0_CPU_ATTR_DRAM_CS3;
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break;
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break;
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default:
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default:
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/* invalide bank, disable access */
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/* invalide bank, disable access */
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@ -67,15 +69,16 @@ static void usb_brg_adrdec_setup(void)
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break;
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break;
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}
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}
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size = kw_sdram_bs(i);
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size = gd->bd->bi_dram[i].size;
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base = gd->bd->bi_dram[i].start;
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if ((size) && (attrib))
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if ((size) && (attrib))
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wrl(USB_WINDOW_CTRL(i),
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wrl(USB_WINDOW_CTRL(i),
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KWCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM,
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MVCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM,
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attrib, KWCPU_WIN_ENABLE));
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attrib, MVCPU_WIN_ENABLE));
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else
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else
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wrl(USB_WINDOW_CTRL(i), KWCPU_WIN_DISABLE);
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wrl(USB_WINDOW_CTRL(i), MVCPU_WIN_DISABLE);
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wrl(USB_WINDOW_BASE(i), kw_sdram_bar(i));
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wrl(USB_WINDOW_BASE(i), base);
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}
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}
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}
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}
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@ -87,11 +90,11 @@ int ehci_hcd_init(void)
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{
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{
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usb_brg_adrdec_setup();
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usb_brg_adrdec_setup();
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hccr = (struct ehci_hccr *)(KW_USB20_BASE + 0x100);
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hccr = (struct ehci_hccr *)(MVUSB0_BASE + 0x100);
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hcor = (struct ehci_hcor *)((uint32_t) hccr
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hcor = (struct ehci_hcor *)((uint32_t) hccr
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+ HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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+ HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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debug("Kirkwood-ehci: init hccr %x and hcor %x hc_length %d\n",
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debug("ehci-marvell: init hccr %x and hcor %x hc_length %d\n",
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(uint32_t)hccr, (uint32_t)hcor,
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(uint32_t)hccr, (uint32_t)hcor,
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(uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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(uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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