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TI DaVinci: DM646x: Initial Support for DM646x SOC 

DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Sandeep Paulraj 2009-09-08 11:37:39 -04:00 committed by Tom Rix
parent 5d0f53624c
commit 7908c97a10
3 changed files with 53 additions and 0 deletions
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1
cpu/arm926ejs/davinci/Makefile
View File

@ -31,6 +31,7 @@ COBJS-y += cpu.o timer.o psc.o
COBJS-$(CONFIG_SOC_DM355) += dm355.o
COBJS-$(CONFIG_SOC_DM365) += dm365.o
COBJS-$(CONFIG_SOC_DM644X) += dm644x.o
COBJS-$(CONFIG_SOC_DM646X) += dm646x.o
COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o
SOBJS = reset.o

41
cpu/arm926ejs/davinci/dm646x.c Normal file
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@ -0,0 +1,41 @@
/*
* SoC-specific code for TMS320DM646x chips
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <asm/arch/hardware.h>
void davinci_enable_uart0(void)
{
lpsc_on(DAVINCI_DM646X_LPSC_UART0);
}
#ifdef CONFIG_DRIVER_TI_EMAC
void davinci_enable_emac(void)
{
lpsc_on(DAVINCI_DM646X_LPSC_EMAC);
}
#endif
#ifdef CONFIG_DRIVER_DAVINCI_I2C
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_DM646X_LPSC_I2C);
}
#endif

11
include/asm-arm/arch-davinci/hardware.h
View File

@ -105,6 +105,13 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000
#define DAVINCI_MMC_SD0_BASE 0x01d11000
#elif defined(CONFIG_SOC_DM646X)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x44000000
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x46000000
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x48000000
#endif
/* Power and Sleep Controller (PSC) Domains */
@ -153,6 +160,10 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_LPSC_GEM 39
#define DAVINCI_LPSC_IMCOP 40
#define DAVINCI_DM646X_LPSC_EMAC 14
#define DAVINCI_DM646X_LPSC_UART0 26
#define DAVINCI_DM646X_LPSC_I2C 31
void lpsc_on(unsigned int id);
void dsp_on(void);