mtd: nand: omap: add support for BCH16_ECC - NAND driver updates
With increase in NAND flash densities occurence of bit-flips has increased. Thus stronger ECC schemes are required for detecting and correcting multiple simultaneous bit-flips in same NAND page. But stronger ECC schemes have large ECC syndrome which require more space in OOB/Spare. This patch add support for BCH16_ECC: (a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data. (b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B. Due to (b) this scheme can only be used with NAND devices which have enough OOB to satisfy following equation: OOBsize per page >= 26 * (page-size / 512) Signed-off-by: Pekon Gupta <pekon@ti.com>
This commit is contained in:
Pekon Gupta
parent
a72c2ee835
commit
7a0845728b
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@ -153,21 +153,10 @@ static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat,
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struct nand_bch_priv {
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uint8_t mode;
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uint8_t type;
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uint8_t nibbles;
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struct bch_control *control;
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enum omap_ecc ecc_scheme;
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};
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/* bch types */
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#define ECC_BCH4 0
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#define ECC_BCH8 1
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#define ECC_BCH16 2
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/* BCH nibbles for diff bch levels */
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#define ECC_BCH4_NIBBLES 13
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#define ECC_BCH8_NIBBLES 26
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#define ECC_BCH16_NIBBLES 52
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/*
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* This can be a single instance cause all current users have only one NAND
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* with nearly the same setup (BCH8, some with ELM and others with sw BCH
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@ -176,7 +165,6 @@ struct nand_bch_priv {
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*/
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static __maybe_unused struct nand_bch_priv bch_priv = {
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.type = ECC_BCH8,
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.nibbles = ECC_BCH8_NIBBLES,
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.control = NULL
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};
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@ -239,6 +227,19 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
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eccsize1 = 2; /* non-ECC bits in nibbles per sector */
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}
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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ecc_algo = 0x1;
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bch_type = 0x2;
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if (mode == NAND_ECC_WRITE) {
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bch_wrapmode = 0x01;
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eccsize0 = 0; /* extra bits in nibbles per sector */
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eccsize1 = 52; /* OOB bits in nibbles per sector */
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} else {
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bch_wrapmode = 0x01;
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eccsize0 = 52; /* ECC bits in nibbles per sector */
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eccsize1 = 0; /* non-ECC bits in nibbles per sector */
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}
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break;
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default:
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return;
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}
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@ -292,7 +293,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
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#endif
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case OMAP_ECC_BCH8_CODE_HW:
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ptr = &gpmc_cfg->bch_result_0_3[0].bch_result_x[3];
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ptr = &gpmc_cfg->bch_result_0_3[0].bch_result3;
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val = readl(ptr);
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ecc_code[i++] = (val >> 0) & 0xFF;
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ptr--;
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@ -305,6 +306,27 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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ptr--;
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}
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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ptr = &gpmc_cfg->bch_result_4_6[0].bch_result6;
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ecc_code[i++] = (readl(ptr) >> 8) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 0) & 0xFF;
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ptr--;
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for (j = 0; j < 2; j++) {
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ecc_code[i++] = (readl(ptr) >> 24) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 16) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 8) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 0) & 0xFF;
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ptr--;
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}
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ptr = &gpmc_cfg->bch_result_0_3[0].bch_result3;
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for (j = 0; j < 4; j++) {
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ecc_code[i++] = (readl(ptr) >> 24) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 16) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 8) & 0xFF;
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ecc_code[i++] = (readl(ptr) >> 0) & 0xFF;
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ptr--;
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}
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break;
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default:
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return -EINVAL;
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}
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@ -323,6 +345,8 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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case OMAP_ECC_BCH8_CODE_HW:
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ecc_code[chip->ecc.bytes - 1] = 0x00;
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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break;
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default:
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return -EINVAL;
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}
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@ -378,6 +402,9 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
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case OMAP_ECC_BCH8_CODE_HW:
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omap_reverse_list(calc_ecc, eccbytes - 1);
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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omap_reverse_list(calc_ecc, eccbytes);
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break;
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default:
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return -EINVAL;
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}
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@ -394,6 +421,9 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
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/* 14th byte in ECC is reserved to match ROM layout */
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error_max = SECTOR_BYTES + (eccbytes - 1);
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break;
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case ECC_BCH16:
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error_max = SECTOR_BYTES + eccbytes;
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break;
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default:
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return -EINVAL;
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}
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@ -683,6 +713,40 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
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return -EINVAL;
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#endif
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case OMAP_ECC_BCH16_CODE_HW:
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#ifdef CONFIG_NAND_OMAP_ELM
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debug("nand: using OMAP_ECC_BCH16_CODE_HW\n");
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/* check ecc-scheme requirements before updating ecc info */
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if ((26 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
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printf("nand: error: insufficient OOB: require=%d\n", (
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(26 * eccsteps) + BADBLOCK_MARKER_LENGTH));
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return -EINVAL;
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}
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/* intialize ELM for ECC error detection */
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elm_init();
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bch_priv.type = ECC_BCH16;
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/* populate ecc specific fields */
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nand->ecc.mode = NAND_ECC_HW;
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nand->ecc.size = SECTOR_BYTES;
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nand->ecc.bytes = 26;
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nand->ecc.strength = 16;
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nand->ecc.hwctl = omap_enable_hwecc;
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nand->ecc.correct = omap_correct_data_bch;
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nand->ecc.calculate = omap_calculate_ecc;
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nand->ecc.read_page = omap_read_page_bch;
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/* define ecc-layout */
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ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
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for (i = 0; i < ecclayout->eccbytes; i++)
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ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH;
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ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
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ecclayout->oobfree[0].length = oobsize - nand->ecc.bytes -
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BADBLOCK_MARKER_LENGTH;
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bch->ecc_scheme = OMAP_ECC_BCH16_CODE_HW;
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break;
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#else
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printf("nand: error: CONFIG_NAND_OMAP_ELM required for ECC\n");
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return -EINVAL;
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#endif
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default:
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debug("nand: error: ecc scheme not enabled or supported\n");
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return -EINVAL;
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@ -26,6 +26,8 @@ enum omap_ecc {
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OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
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/* 8-bit ECC calculation by GPMC, Error detection by ELM */
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OMAP_ECC_BCH8_CODE_HW,
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/* 16-bit ECC calculation by GPMC, Error detection by ELM */
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OMAP_ECC_BCH16_CODE_HW,
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};
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struct gpmc_cs {
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@ -43,7 +45,16 @@ struct gpmc_cs {
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};
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struct bch_res_0_3 {
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u32 bch_result_x[4];
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u32 bch_result0;
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u32 bch_result1;
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u32 bch_result2;
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u32 bch_result3;
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};
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struct bch_res_4_6 {
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u32 bch_result4;
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u32 bch_result5;
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u32 bch_result6;
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};
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struct gpmc {
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@ -75,7 +86,9 @@ struct gpmc {
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u8 res7[12]; /* 0x224 */
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u32 testmomde_ctrl; /* 0x230 */
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u8 res8[12]; /* 0x234 */
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struct bch_res_0_3 bch_result_0_3[2]; /* 0x240 */
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struct bch_res_0_3 bch_result_0_3[8]; /* 0x240 - 0x2BF */
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u8 res9[16 * 4]; /* 0x2C0 - 0x2FF */
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struct bch_res_4_6 bch_result_4_6[8]; /* 0x300 - 0x37F */
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};
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/* Used for board specific gpmc initialization */
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@ -156,13 +156,14 @@ struct nand_oobfree {
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};
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#define MTD_MAX_OOBFREE_ENTRIES 8
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#define MTD_MAX_ECCPOS_ENTRIES 256
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/*
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* ECC layout control structure. Exported to userspace for
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* diagnosis and to allow creation of raw images
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*/
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struct nand_ecclayout {
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uint32_t eccbytes;
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uint32_t eccpos[128];
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uint32_t eccpos[MTD_MAX_ECCPOS_ENTRIES];
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uint32_t oobavail;
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struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
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};
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