x86: ivybridge: bd82x6x: Support FSP enabled configuration
Wrap initialization codes with #ifndef CONFIG_HAVE_FSP #endif, and enable the build for both FSP and non-FSP configurations. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -7,7 +7,6 @@
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ifdef CONFIG_HAVE_FSP
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ifdef CONFIG_HAVE_FSP
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obj-y += fsp_configs.o ivybridge.o
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obj-y += fsp_configs.o ivybridge.o
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else
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else
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obj-y += bd82x6x.o
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obj-y += car.o
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obj-y += car.o
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obj-y += cpu.o
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obj-y += cpu.o
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obj-y += early_me.o
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obj-y += early_me.o
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@ -21,3 +20,4 @@ obj-y += report_platform.o
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obj-y += sata.o
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obj-y += sata.o
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obj-y += sdram.o
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obj-y += sdram.o
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endif
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endif
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obj-y += bd82x6x.o
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@ -22,6 +22,7 @@
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#define GPIO_BASE 0x48
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#define GPIO_BASE 0x48
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#define BIOS_CTRL 0xdc
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#define BIOS_CTRL 0xdc
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#ifndef CONFIG_HAVE_FSP
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static int pch_revision_id = -1;
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static int pch_revision_id = -1;
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static int pch_type = -1;
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static int pch_type = -1;
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@ -170,6 +171,7 @@ static int bd82x6x_probe(struct udevice *dev)
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return 0;
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return 0;
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}
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}
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#endif /* CONFIG_HAVE_FSP */
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static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep)
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static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep)
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{
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{
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@ -247,6 +249,8 @@ U_BOOT_DRIVER(bd82x6x_drv) = {
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.name = "bd82x6x",
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.name = "bd82x6x",
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.id = UCLASS_PCH,
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.id = UCLASS_PCH,
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.of_match = bd82x6x_ids,
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.of_match = bd82x6x_ids,
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#ifndef CONFIG_HAVE_FSP
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.probe = bd82x6x_probe,
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.probe = bd82x6x_probe,
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#endif
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.ops = &bd82x6x_pch_ops,
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.ops = &bd82x6x_pch_ops,
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};
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};
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