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OMAP: use {read,write}l to access timer registers 

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
This commit is contained in:
Ladislav Michl 2009-03-30 18:58:41 +02:00 committed by Jean-Christophe PLAGNIOL-VILLARD
parent 81472d893f
commit 89c00fb158
1 changed files with 9 additions and 12 deletions
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21
cpu/arm925t/interrupts.c
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@ -35,24 +35,21 @@
#include <common.h>
#include <arm925t.h>
#include <configs/omap1510.h>
#include <asm/io.h>
#define TIMER_LOAD_VAL 0xffffffff
/* macro to read the 32 bit timer */
#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
static ulong timestamp;
static ulong lastdec;
static uint32_t timestamp;
static uint32_t lastdec;
/* nothing really to do with interrupts, just starts up a counter. */
int interrupt_init (void)
{
int32_t val;
/* Start the decrementer ticking down from 0xffffffff */
*((int32_t *) (CONFIG_SYS_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PTV << MPUTIM_PTV_BIT);
*((int32_t *) (CONFIG_SYS_TIMERBASE + CNTL_TIMER)) = val;
__raw_writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + LOAD_TIM);
__raw_writel(MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE |
(CONFIG_SYS_PTV << MPUTIM_PTV_BIT),
CONFIG_SYS_TIMERBASE + CNTL_TIMER);
/* init the timestamp and lastdec value */
reset_timer_masked();
@ -106,13 +103,13 @@ void udelay (unsigned long usec)
void reset_timer_masked (void)
{
/* reset time */
lastdec = READ_TIMER; /* capure current decrementer value time */
lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current tick value */
uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM);
if (lastdec >= now) { /* normal mode (non roll) */
/* normal mode */