x86: crownbay: Add MP initialization
Intel Crown Bay board has a TunnelCreek processor which supports hyper-threading. Add /cpus node in the crownbay.dts and enable the MP initialization. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (modified to remove error: overriding the value of OF_CONTROL. Old value: "y", new value: "y")
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@ -23,6 +23,26 @@
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silent_console = <0>;
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silent_console = <0>;
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "cpu-x86";
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reg = <0>;
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intel,apic-id = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "cpu-x86";
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reg = <1>;
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intel,apic-id = <1>;
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};
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};
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gpioa {
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gpioa {
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compatible = "intel,ich6-gpio";
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compatible = "intel,ich6-gpio";
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u-boot,dm-pre-reloc;
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u-boot,dm-pre-reloc;
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@ -2,7 +2,10 @@ CONFIG_X86=y
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CONFIG_VENDOR_INTEL=y
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CONFIG_VENDOR_INTEL=y
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CONFIG_DEFAULT_DEVICE_TREE="crownbay"
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CONFIG_DEFAULT_DEVICE_TREE="crownbay"
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CONFIG_TARGET_CROWNBAY=y
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CONFIG_TARGET_CROWNBAY=y
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CONFIG_SMP=y
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CONFIG_MAX_CPUS=2
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CONFIG_GENERATE_PIRQ_TABLE=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_SETEXPR is not set
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@ -11,6 +14,7 @@ CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_CMD_BOOTSTAGE=y
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CONFIG_CMD_BOOTSTAGE=y
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CONFIG_OF_CONTROL=y
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CONFIG_OF_CONTROL=y
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CONFIG_CPU=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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CONFIG_SYS_VSNPRINTF=y
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CONFIG_SYS_VSNPRINTF=y
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