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arm: mxs: Adjust the load address of U-Boot and SPL for HAB 

When using HAB, there are additional special requirements on the placement of
U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the
U-Boot binary a little further from the begining of the DRAM, so the HAB CST
and IVT can be placed in front of the U-Boot binary. This is necessary, since
both the U-Boot and the IVT must be contained in single CST signature. To
make things worse, the IVT must be concatenated with one more entry at it's
end, that is the length of the entire CST signature, IVT and U-Boot binary
in memory. By placing the blocks in this order -- CST, IVT, U-Boot, we can
easily align them all and then produce the length field as needed.

As for the SPL, on i.MX23/i.MX28, the SPL size is limited to 32 KiB, thus
we place the IVT at 0x8000 offset, CST right past IVT and claim the size
is correct. The HAB library accepts this setup.

Finally, to make sure the vectoring in SPL still works even after moving
the SPL from 0x0 to 0x1000, we add a small function which copies the
vectoring code and tables to 0x0. This is fine, since the vectoring code
is position independent.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Marek Vasut 2014-03-05 20:01:13 +01:00 committed by Stefano Babic
parent 81a1d6173c
commit 9c2c8a3129
5 changed files with 33 additions and 10 deletions
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8
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
View File

@ -1,6 +1,6 @@
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x0 OBJTREE/spl/u-boot-spl.bin
CALL 0x14 0x0
LOAD 0x40000100 OBJTREE/u-boot.bin
CALL 0x40000100 0x0
LOAD 0x1000 OBJTREE/spl/u-boot-spl.bin
CALL 0x1000 0x0
LOAD 0x40002000 OBJTREE/u-boot.bin
CALL 0x40002000 0x0

8
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
View File

@ -1,8 +1,8 @@
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x0 OBJTREE/spl/u-boot-spl.bin
LOAD IVT 0x8000 0x14
LOAD 0x1000 OBJTREE/spl/u-boot-spl.bin
LOAD IVT 0x8000 0x1000
CALL HAB 0x8000 0x0
LOAD 0x40000100 OBJTREE/u-boot.bin
LOAD IVT 0x8000 0x40000100
LOAD 0x40002000 OBJTREE/u-boot.bin
LOAD IVT 0x8000 0x40002000
CALL HAB 0x8000 0x0

15
arch/arm/cpu/arm926ejs/mxs/spl_boot.c
View File

@ -102,6 +102,18 @@ static uint8_t mxs_get_bootmode_index(void)
return i;
}
static void mxs_spl_fixup_vectors(void)
{
/*
* Copy our vector table to 0x0, since due to HAB, we cannot
* be loaded to 0x0. We want to have working vectoring though,
* thus this fixup. Our vectoring table is PIC, so copying is
* fine.
*/
extern uint32_t _start;
memcpy(0x0, &_start, 0x60);
}
void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
@ -110,7 +122,10 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
uint8_t bootmode = mxs_get_bootmode_index();
mxs_spl_fixup_vectors();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mxs_power_init();
mxs_mem_init();

2
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
View File

@ -16,7 +16,7 @@ OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = CONFIG_SPL_TEXT_BASE;
. = ALIGN(4);
.text :

10
include/configs/mxs.h
View File

@ -80,8 +80,16 @@
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*
* In case of a HAB boot, we cannot for some weird reason use the first 4KiB
* of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
* blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
*
* As for the SPL, we must avoid the first 4 KiB as well, but we load the
* IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
#define CONFIG_SYS_TEXT_BASE 0x40002000
#define CONFIG_SPL_TEXT_BASE 0x00001000
/* U-Boot general configuration */
#define CONFIG_SYS_LONGHELP