diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index e743796a09..cf2a7b0866 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -77,7 +77,7 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
 	.oobfree = { {2, 4}, {11, 11}, {27, 11}, {43, 11}, {59, 5} },
 };
 #endif
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
 #ifndef CONFIG_SYS_NAND_LARGEPAGE
 static struct nand_ecclayout nand_hw_eccoob = {
 	.eccbytes = 9,
@@ -213,7 +213,7 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 	if (spare_only)
 		MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
 
-	if (is_mxc_nfc_11()) {
+	if (is_mxc_nfc_21()) {
 		int i;
 		/*
 		 *  The controller copies the 64 bytes of spare data from
@@ -273,7 +273,7 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, spare_only);
 
-	if (is_mxc_nfc_11()) {
+	if (is_mxc_nfc_21()) {
 		int i;
 
 		/*
@@ -377,7 +377,7 @@ static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)
 	 */
 }
 
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
 static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
 				      struct nand_chip *chip,
 				      int page, int sndcmd)
@@ -1061,7 +1061,7 @@ void mxc_nand_command(struct mtd_info *mtd, unsigned command,
 	case NAND_CMD_PAGEPROG:
 		send_prog_page(host, 0, host->spare_only);
 
-		if (host->pagesize_2k && !is_mxc_nfc_11()) {
+		if (host->pagesize_2k && is_mxc_nfc_1()) {
 			/* data in 4 areas */
 			send_prog_page(host, 1, host->spare_only);
 			send_prog_page(host, 2, host->spare_only);
@@ -1111,7 +1111,7 @@ void mxc_nand_command(struct mtd_info *mtd, unsigned command,
 			send_cmd(host, NAND_CMD_READSTART);
 			/* read for each AREA */
 			send_read_page(host, 0, host->spare_only);
-			if (!is_mxc_nfc_11()) {
+			if (is_mxc_nfc_1()) {
 				send_read_page(host, 1, host->spare_only);
 				send_read_page(host, 2, host->spare_only);
 				send_read_page(host, 3, host->spare_only);
@@ -1200,7 +1200,7 @@ int board_nand_init(struct nand_chip *this)
 	this->ecc.calculate = mxc_nand_calculate_ecc;
 	this->ecc.hwctl = mxc_nand_enable_hwecc;
 	this->ecc.correct = mxc_nand_correct_data;
-	if (is_mxc_nfc_11()) {
+	if (is_mxc_nfc_21()) {
 		this->ecc.mode = NAND_ECC_HW_SYNDROME;
 		this->ecc.read_page = mxc_nand_read_page_syndrome;
 		this->ecc.read_page_raw = mxc_nand_read_page_raw_syndrome;
@@ -1238,7 +1238,7 @@ int board_nand_init(struct nand_chip *this)
 	this->ecc.layout = &nand_hw_eccoob;
 #endif
 
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
 	tmp = readw(&host->regs->config1);
 	tmp |= NFC_ONE_CYCLE;
 	tmp |= NFC_4_8N_ECC;
diff --git a/include/fsl_nfc.h b/include/fsl_nfc.h
index 6618089290..ff537b49a9 100644
--- a/include/fsl_nfc.h
+++ b/include/fsl_nfc.h
@@ -33,7 +33,7 @@
  *	to support up to 2K byte pagesize nand.
  *	Reading or writing a 2K page requires 4 FDI/FDO cycles.
  *
- * MX25 and MX35 have version 1.1, which has:
+ * MX25 and MX35 have version 2.1, which has:
  *	8 512-byte main buffers and
  *	8 64-byte spare buffers
  *	to support up to 4K byte pagesize nand.
@@ -42,10 +42,12 @@
  */
 #if defined(CONFIG_MX27) || defined(CONFIG_MX31)
 #define MXC_NFC_V1
-#define is_mxc_nfc_11()		0
+#define is_mxc_nfc_1()		1
+#define is_mxc_nfc_21()		0
 #elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
-#define MXC_NFC_V1_1
-#define is_mxc_nfc_11()		1
+#define MXC_NFC_V2_1
+#define is_mxc_nfc_1()		0
+#define is_mxc_nfc_21()		1
 #else
 #error "MXC NFC implementation not supported"
 #endif
@@ -55,7 +57,7 @@
 #define NAND_MXC_SPARE_BUF_SIZE		16
 #define NAND_MXC_REG_OFFSET		0xe00
 #define NAND_MXC_2K_MULTI_CYCLE
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
 #define NAND_MXC_NR_BUFS		8
 #define NAND_MXC_SPARE_BUF_SIZE		64
 #define NAND_MXC_REG_OFFSET		0x1e00
@@ -86,7 +88,7 @@ struct fsl_nfc_regs {
 	u16 nf_wrprst;
 	u16 config1;
 	u16 config2;
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
 	u16 reserved2[2];
 	u16 buf_addr;
 	u16 flash_addr;
@@ -153,7 +155,7 @@ struct fsl_nfc_regs {
  */
 #define NFC_INT		0x8000
 
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
 #define NFC_4_8N_ECC	(1 << 0)
 #endif
 #define NFC_SP_EN	(1 << 2)
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index ea05952eb5..a40c99877c 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -47,7 +47,7 @@ static void nfc_wait_ready(void)
 
 static void nfc_nand_init(void)
 {
-#if defined(MXC_NFC_V1_1)
+#if defined(MXC_NFC_V2_1)
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int config1;
 
@@ -142,7 +142,7 @@ static int nfc_nand_check_ecc(void)
 #if defined(MXC_NFC_V1)
 	u16 ecc_status = readw(&nfc->ecc_status_result);
 	return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
 	u32 ecc_status = readl(&nfc->ecc_status_result);
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;