sysmo-bts
/
u-boot
9
0
Fork 0
Code Pull Requests Releases Activity

arm: mvebu: Fix SAR1_CPU_CORE_MASK 

SAR1_CPU_CORE_MASK was wrong, probably copy/paste
from another architecture.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dirk Eibach 2015-10-28 16:44:14 +01:00 committed by Luka Perkov
parent ea8b6877a8
commit a21b4f0f99
1 changed files with 2 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
View File

@ -23,8 +23,8 @@
#define CPU_CONFIGURATION_REG(id) (0x21800 + (id * 0x100))
#define CPU_MRVL_ID_OFFSET 0x10
#define SAR1_CPU_CORE_MASK 0x00000018
#define SAR1_CPU_CORE_OFFSET 3
#define SAR1_CPU_CORE_MASK 0x38000000
#define SAR1_CPU_CORE_OFFSET 27
#define NEW_FABRIC_TWSI_ADDR 0x4e
#ifdef DB_784MP_GP
@ -461,7 +461,4 @@
#define CLK_CPU_2200 13
#define CLK_CPU_2400 14
#define SAR1_CPU_CORE_MASK 0x00000018
#define SAR1_CPU_CORE_OFFSET 3
#endif /* _DDR3_HWS_HW_TRAINING_DEF_H */