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at91sam9/at91cap: spi init add hardware chip select support 

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2009-03-27 13:14:52 +01:00
parent 42f9ebff2f
commit a47492ac60
5 changed files with 136 additions and 27 deletions
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37
cpu/arm926ejs/at91/at91cap9_spi.c
View File

@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PA5, 1);
at91_set_B_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
at91_set_B_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PD0, 1);
at91_set_B_periph(AT91_PIN_PD0, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_B_periph(AT91_PIN_PD1, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PD0, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PD1, 1);
}
}
@ -61,15 +73,28 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PB15, 1);
at91_set_A_periph(AT91_PIN_PB15, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PB16, 1);
at91_set_A_periph(AT91_PIN_PB16, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PB17, 1);
at91_set_A_periph(AT91_PIN_PB17, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_A_periph(AT91_PIN_PB18, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PB15, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PB16, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PB17, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PB18, 1);
}
}

36
cpu/arm926ejs/at91/at91sam9260_spi.c
View File

@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
at91_set_A_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PC11, 1);
at91_set_B_periph(AT91_PIN_PC11, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PC16, 1);
at91_set_B_periph(AT91_PIN_PC16, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_B_periph(AT91_PIN_PC17, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PC11, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PC16, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PC17, 1);
}
}
@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PB3, 1);
at91_set_A_periph(AT91_PIN_PB3, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PC5, 1);
at91_set_B_periph(AT91_PIN_PC5, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PC4, 1);
at91_set_B_periph(AT91_PIN_PC4, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_gpio_output(AT91_PIN_PC3, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PB3, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PC5, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PC4, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PC3, 1);
}
}

36
cpu/arm926ejs/at91/at91sam9261_spi.c
View File

@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
at91_set_A_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PA4, 1);
at91_set_A_periph(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PA5, 1);
at91_set_A_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_A_periph(AT91_PIN_PA6, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PA6, 1);
}
}
@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PB28, 1);
at91_set_A_periph(AT91_PIN_PB28, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PA24, 1);
at91_set_B_periph(AT91_PIN_PA24, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PA25, 1);
at91_set_B_periph(AT91_PIN_PA25, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_A_periph(AT91_PIN_PA26, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PB28, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PA24, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PA25, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PA26, 1);
}
}

36
cpu/arm926ejs/at91/at91sam9263_spi.c
View File

@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PA5, 1);
at91_set_B_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
at91_set_B_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PA4, 1);
at91_set_B_periph(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_B_periph(AT91_PIN_PB11, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PB11, 1);
}
}
@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PB15, 1);
at91_set_A_periph(AT91_PIN_PB15, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PB16, 1);
at91_set_A_periph(AT91_PIN_PB16, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PB17, 1);
at91_set_A_periph(AT91_PIN_PB17, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_A_periph(AT91_PIN_PB18, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PB15, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PB16, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PB17, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PB18, 1);
}
}

18
cpu/arm926ejs/at91/at91sam9rl_spi.c
View File

@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
if (cs_mask & (1 << 0)) {
at91_set_gpio_output(AT91_PIN_PA28, 1);
at91_set_A_periph(AT91_PIN_PA28, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_gpio_output(AT91_PIN_PB7, 1);
at91_set_B_periph(AT91_PIN_PB7, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_gpio_output(AT91_PIN_PD8, 1);
at91_set_A_periph(AT91_PIN_PD8, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_B_periph(AT91_PIN_PD9, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PA28, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PB7, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PD8, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PD9, 1);
}
}