keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initialization. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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68e80fdda1
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@ -15,21 +15,21 @@ static int soc_type =
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k2hk;
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k2hk;
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#endif
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#endif
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struct qm_config k2hk_qm_memmap = {
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struct qm_config qm_memmap = {
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.stat_cfg = 0x02a40000,
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.stat_cfg = KS2_QM_QUEUE_STATUS_BASE,
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.queue = (struct qm_reg_queue *)0x02a80000,
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.queue = (void *)KS2_QM_MANAGER_QUEUES_BASE,
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.mngr_vbusm = 0x23a80000,
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.mngr_vbusm = KS2_QM_BASE_ADDRESS,
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.i_lram = 0x00100000,
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.i_lram = KS2_QM_LINK_RAM_BASE,
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.proxy = (struct qm_reg_queue *)0x02ac0000,
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.proxy = (void *)KS2_QM_MANAGER_Q_PROXY_BASE,
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.status_ram = 0x02a06000,
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.status_ram = KS2_QM_STATUS_RAM_BASE,
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.mngr_cfg = (struct qm_cfg_reg *)0x02a02000,
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.mngr_cfg = (void *)KS2_QM_CONF_BASE,
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.intd_cfg = 0x02a0c000,
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.intd_cfg = KS2_QM_INTD_CONF_BASE,
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.desc_mem = (struct descr_mem_setup_reg *)0x02a03000,
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.desc_mem = (void *)KS2_QM_DESC_SETUP_BASE,
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.region_num = 64,
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.region_num = KS2_QM_REGION_NUM,
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.pdsp_cmd = 0x02a20000,
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.pdsp_cmd = KS2_QM_PDSP1_CMD_BASE,
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.pdsp_ctl = 0x02a0f000,
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.pdsp_ctl = KS2_QM_PDSP1_CTRL_BASE,
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.pdsp_iram = 0x02a10000,
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.pdsp_iram = KS2_QM_PDSP1_IRAM_BASE,
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.qpool_num = 4000,
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.qpool_num = KS2_QM_QPOOL_NUM,
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};
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};
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/*
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/*
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@ -52,12 +52,9 @@ inline int num_of_desc_to_reg(int num_descr)
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return 15;
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return 15;
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}
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}
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static int _qm_init(struct qm_config *cfg)
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int _qm_init(struct qm_config *cfg)
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{
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{
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u32 j;
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u32 j;
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if (cfg == NULL)
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return QM_ERR;
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qm_cfg = cfg;
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qm_cfg = cfg;
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@ -82,12 +79,7 @@ static int _qm_init(struct qm_config *cfg)
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int qm_init(void)
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int qm_init(void)
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{
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{
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switch (soc_type) {
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return _qm_init(&qm_memmap);
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case k2hk:
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return _qm_init(&k2hk_qm_memmap);
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}
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return QM_ERR;
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}
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}
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void qm_close(void)
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void qm_close(void)
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@ -294,11 +286,8 @@ static int _netcp_init(struct pktdma_cfg *netcp_cfg,
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/* Disable loopback in the tx direction */
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/* Disable loopback in the tx direction */
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writel(0, &netcp->global->emulation_control);
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writel(0, &netcp->global->emulation_control);
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/* TODO: make it dependend on a soc type variable */
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#ifdef CONFIG_SOC_K2HK
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/* Set QM base address, only for K2x devices */
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/* Set QM base address, only for K2x devices */
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writel(0x23a80000, &netcp->global->qm_base_addr[0]);
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writel(KS2_QM_BASE_ADDRESS, &netcp->global->qm_base_addr[0]);
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#endif
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/* Enable all channels. The current state isn't important */
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/* Enable all channels. The current state isn't important */
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for (j = 0; j < netcp->tx_ch_num; j++) {
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for (j = 0; j < netcp->tx_ch_num; j++) {
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@ -145,11 +145,20 @@ typedef volatile unsigned int *dv_reg_p;
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#define KS2_EFUSE_BOOTROM (KS2_DEVICE_STATE_CTRL_BASE + 0xc90)
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#define KS2_EFUSE_BOOTROM (KS2_DEVICE_STATE_CTRL_BASE + 0xc90)
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/* Queue manager */
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/* Queue manager */
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#define KS2_QM_MANAGER_BASE 0x02a02000
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#define KS2_QM_BASE_ADDRESS 0x23a80000
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#define KS2_QM_CONF_BASE 0x02a02000
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#define KS2_QM_DESC_SETUP_BASE 0x02a03000
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#define KS2_QM_DESC_SETUP_BASE 0x02a03000
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#define KS2_QM_MANAGER_QUEUES_BASEi 0x02a80000
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#define KS2_QM_STATUS_RAM_BASE 0x02a06000
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#define KS2_QM_INTD_CONF_BASE 0x02a0c000
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#define KS2_QM_PDSP1_CMD_BASE 0x02a20000
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#define KS2_QM_PDSP1_CTRL_BASE 0x02a0f000
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#define KS2_QM_PDSP1_IRAM_BASE 0x02a10000
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#define KS2_QM_MANAGER_QUEUES_BASE 0x02a80000
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#define KS2_QM_MANAGER_Q_PROXY_BASE 0x02ac0000
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#define KS2_QM_MANAGER_Q_PROXY_BASE 0x02ac0000
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#define KS2_QM_QUEUE_STATUS_BASE 0x02a40000
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#define KS2_QM_QUEUE_STATUS_BASE 0x02a40000
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#define KS2_QM_LINK_RAM_BASE 0x00100000
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#define KS2_QM_REGION_NUM 64
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#define KS2_QM_QPOOL_NUM 4000
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/* MSMC control */
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/* MSMC control */
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#define KS2_MSMC_CTRL_BASE 0x0bc00000
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#define KS2_MSMC_CTRL_BASE 0x0bc00000
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