sysmo-bts
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u-boot
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Merge branch 'u-boot/master'

This commit is contained in:
Albert ARIBAUD 2015-04-10 14:22:23 +02:00
parent 79d75d7527 385a08a60f
commit b491d9757d
394 changed files with 5152 additions and 4303 deletions
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79
Kbuild
View File

@ -4,6 +4,32 @@
# 1) Generate generic-asm-offsets.h
# 2) Generate asm-offsets.h
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
# Use filechk to avoid rebuilds when a header changes, but the resulting file
# does not
define filechk_offsets
(set -e; \
echo "#ifndef $2"; \
echo "#define $2"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y); \
echo ""; \
echo "#endif" )
endef
#####
# 1) Generate generic-asm-offsets.h
@ -12,31 +38,13 @@ generic-offsets-file := include/generated/generic-asm-offsets.h
always := $(generic-offsets-file)
targets := $(generic-offsets-file) lib/asm-offsets.s
quiet_cmd_generic-offsets = GEN $@
define cmd_generic-offsets
(set -e; \
echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; \
echo "#define __GENERIC_ASM_OFFSETS_H__"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " *"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y) $<; \
echo ""; \
echo "#endif" ) > $@
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
lib/asm-offsets.s: lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s Kbuild
$(Q)mkdir -p $(dir $@)
$(call cmd,generic-offsets)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s FORCE
$(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__)
#####
# 2) Generate asm-offsets.h
@ -50,39 +58,12 @@ always += $(offsets-file)
targets += $(offsets-file)
targets += arch/$(ARCH)/lib/asm-offsets.s
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
quiet_cmd_offsets = GEN $@
define cmd_offsets
(set -e; \
echo "#ifndef __ASM_OFFSETS_H__"; \
echo "#define __ASM_OFFSETS_H__"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " *"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y) $<; \
echo ""; \
echo "#endif" ) > $@
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s Kbuild
$(call cmd,offsets)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__ASM_OFFSETS_H__)

4
Kconfig
View File

@ -54,7 +54,7 @@ config CC_OPTIMIZE_FOR_SIZE
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default 0x400
default y if DM
help
Before relocation memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
@ -184,7 +184,7 @@ config SYS_TEXT_BASE
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
config SYS_CLK_FREQ
depends on ARC
depends on ARC || ARCH_SUNXI
int "CPU clock frequency"
help
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture

8
MAKEALL
View File

@ -551,13 +551,7 @@ get_target_maintainers() {
get_target_arch() {
local target=$1
# Automatic mode
local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ] ; then echo "" ; return ; fi
set ${line}
echo "$2"
awk '$7 == "'$target'" { print $2 }' boards.cfg
}
list_target() {

27
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 2015
PATCHLEVEL = 04
SUBLEVEL =
EXTRAVERSION = -rc4
EXTRAVERSION = -rc5
NAME =
# *DOCUMENTATION*
@ -469,10 +469,10 @@ KBUILD_DEFCONFIG := sandbox_defconfig
export KBUILD_DEFCONFIG KBUILD_KCONFIG
config: scripts_basic outputmakefile FORCE
+$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@
$(Q)$(MAKE) $(build)=scripts/kconfig $@
%config: scripts_basic outputmakefile FORCE
+$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@
$(Q)$(MAKE) $(build)=scripts/kconfig $@
else
# ===========================================================================
@ -496,6 +496,15 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
# we execute the config step to be sure to catch updated Kconfig files
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
@# If the following part fails, include/config/auto.conf should be
@# deleted so "make silentoldconfig" will be re-run on the next build.
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf || \
{ rm -f include/config/auto.conf; false; }
@# include/config.h has been updated after "make silentoldconfig".
@# We need to touch include/config/auto.conf so it gets newer
@# than include/config.h.
@# Otherwise, 'make silentoldconfig' would be invoked twice.
$(Q)touch include/config/auto.conf
-include include/autoconf.mk
-include include/autoconf.mk.dep
@ -504,12 +513,16 @@ include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
# is up-to-date. When we switch to a different board configuration, old CONFIG
# macros are still remaining in include/config/auto.conf. Without the following
# gimmick, wrong config.mk would be included leading nasty warnings/errors.
autoconf_is_current := $(if $(wildcard $(KCONFIG_CONFIG)),$(shell find . \
-path ./include/config/auto.conf -newer $(KCONFIG_CONFIG)))
ifneq ($(autoconf_is_current),)
ifneq ($(wildcard $(KCONFIG_CONFIG)),)
ifneq ($(wildcard include/config/auto.conf),)
autoconf_is_old := $(shell find . -path ./$(KCONFIG_CONFIG) -newer \
include/config/auto.conf)
ifeq ($(autoconf_is_old),)
include $(srctree)/config.mk
include $(srctree)/arch/$(ARCH)/Makefile
endif
endif
endif
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
# that (or fail if absent). Otherwise, search for a linker script in a
@ -1154,7 +1167,7 @@ prepare2: prepare3 outputmakefile
prepare1: prepare2 $(version_h) $(timestamp_h) \
include/config/auto.conf
ifeq ($(__HAVE_ARCH_GENERIC_BOARD),)
ifeq ($(CONFIG_HAVE_GENERIC_BOARD),)
ifeq ($(CONFIG_SYS_GENERIC_BOARD),y)
@echo >&2 " Your architecture does not support generic board."
@echo >&2 " Please undefine CONFIG_SYS_GENERIC_BOARD in your board config file."

9
README
View File

@ -3483,9 +3483,6 @@ FIT uImage format:
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
CONFIG_MTD_NAND_VERIFY_WRITE
verify if the written data is correct reread.
- UBI support
CONFIG_CMD_UBI
@ -4190,9 +4187,9 @@ Configuration Settings:
to this new framework over time. Defining this will disable the
arch/foo/lib/board.c file and use common/board_f.c and
common/board_r.c instead. To use this option your architecture
must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in
its config.mk file). If you find problems enabling this option on
your board please report the problem and send patches!
must support it (i.e. must select HAVE_GENERIC_BOARD in arch/Kconfig).
If you find problems enabling this option on your board please report
the problem and send patches!
- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
This is set by OMAP boards for the max time that reset should

27
arch/Kconfig
View File

@ -1,3 +1,10 @@
config HAVE_GENERIC_BOARD
bool
config SYS_GENERIC_BOARD
bool
depends on HAVE_GENERIC_BOARD
choice
prompt "Architecture select"
default SANDBOX
@ -5,34 +12,49 @@ choice
config ARC
bool "ARC architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config ARM
bool "ARM architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config AVR32
bool "AVR32 architecture"
select HAVE_GENERIC_BOARD
config BLACKFIN
bool "Blackfin architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config M68K
bool "M68000 architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config MICROBLAZE
bool "MicroBlaze architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config MIPS
bool "MIPS architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config NDS32
bool "NDS32 architecture"
config NIOS2
bool "Nios II architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config OPENRISC
bool "OpenRISC architecture"
@ -40,10 +62,13 @@ config OPENRISC
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config SANDBOX
bool "Sandbox"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config SH
@ -56,6 +81,8 @@ config SPARC
config X86
bool "x86 architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
endchoice

10
arch/arc/Kconfig
View File

@ -123,7 +123,7 @@ config ARC_CACHE_LINE_SHIFT
int "Cache Line Length (as power of 2)"
range 5 7
default "6"
depends on !SYS_DCACHE_OFF || !SYS_DCACHE_OFF
depends on !SYS_DCACHE_OFF || !SYS_ICACHE_OFF
help
Starting with ARC700 4.9, Cache line length is configurable,
This option specifies "N", with Line-len = 2 power N
@ -133,6 +133,14 @@ config ARC_CACHE_LINE_SHIFT
choice
prompt "Target select"
config TARGET_DUMMY
bool "Dummy target"
help
Please select one of real target boards below!
This target is only meant to force "makedefconfig" to put
TARGET_xxx in defconfig even this is the first target from the list
below.
config TARGET_TB100
bool "Support tb100"

3
arch/arc/config.mk
View File

@ -57,6 +57,3 @@ LDFLAGS_FINAL += -pie
# Load address for standalone apps
CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000
# Support generic board on ARC
__HAVE_ARCH_GENERIC_BOARD := y

2
arch/arc/cpu/arcv1/Makefile
View File

@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += start.o
obj-y += ivt.o

27
arch/arc/cpu/arcv1/ivt.S Normal file
View File

@ -0,0 +1,27 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "ax",@progbits
.align 4
_ivt:
/* Critical system events */
j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */

254
arch/arc/cpu/arcv1/start.S
View File

@ -1,254 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <asm/arcregs.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since we read %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
.section .ivt, "ax",@progbits
.align 4
_ivt:
/* Critical system events */
j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
.text
.globl _start
_start:
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack pointer */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Clear bss */
mov %r0, __bss_start
mov %r1, __bss_end
clear_bss:
st.ab 0, [%r0, 4]
brlt %r0, %r1, clear_bss
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
memory_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
interrupt_handler:
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
EV_MachineCheck:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
EV_TLBMissI:
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
EV_TLBMissD:
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
EV_TLBProtV:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
EV_PrivilegeV:
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
EV_Trap:
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
EV_Extension:
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = start_addr_sp
* r1 = new__gd
* r2 = relocaddr
*/
.align 4
.globl relocate_code
relocate_code:
/*
* r0-r12 might be clobbered by C functions
* so we use r13-r16 for storage here
*/
mov %r13, %r0 /* save addr_sp */
mov %r14, %r1 /* save addr of gd */
mov %r15, %r2 /* save addr of destination */
mov %r16, %r2 /* %r9 - relocation offset */
sub %r16, %r16, __image_copy_start
/* Set up the stack */
stack_setup:
mov %sp, %r13
mov %fp, %sp
/* Check if monitor is loaded right in place for relocation */
mov %r0, __image_copy_start
cmp %r0, %r15 /* skip relocation if code loaded */
bz do_board_init_r /* in target location already */
/* Copy data (__image_copy_start - __image_copy_end) to new location */
mov %r1, %r15
mov %r2, __image_copy_end
sub %r2, %r2, %r0 /* r3 <- amount of bytes to copy */
asr %r2, %r2, 2 /* r3 <- amount of words to copy */
mov %lp_count, %r2
lp copy_end
ld.ab %r2,[%r0,4]
st.ab %r2,[%r1,4]
copy_end:
/* Fix relocations related issues */
bl do_elf_reloc_fixups
#ifndef CONFIG_SYS_ICACHE_OFF
bl invalidate_icache_all
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
bl flush_dcache_all
#endif
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE] /* Read current position */
add %r0, %r0, %r16 /* Update address */
sr %r0, [ARC_AUX_INTR_VEC_BASE] /* Write new position */
do_board_init_r:
/* Prepare for exection of "board_init_r" in relocated monitor */
mov %r2, board_init_r /* old address of "board_init_r()" */
add %r2, %r2, %r16 /* new address of "board_init_r()" */
mov %r0, %r14 /* 1-st parameter: gd_t */
mov %r1, %r15 /* 2-nd parameter: dest_addr */
j [%r2]

2
arch/arc/cpu/arcv2/Makefile
View File

@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += start.o
obj-y += ivt.o

27
arch/arc/cpu/arcv2/ivt.S Normal file
View File

@ -0,0 +1,27 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "a",@progbits
.align 4
/* Critical system events */
.word _start /* 0 - 0x000 */
.word memory_error /* 1 - 0x008 */
.word instruction_error /* 2 - 0x010 */
/* Exceptions */
.word EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
.word EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
.word EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
.word EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
.word EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
.word EV_Trap /* 0x128, Trap exception (0x25) */
.word EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr

254
arch/arc/cpu/arcv2/start.S
View File

@ -1,254 +0,0 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <asm/arcregs.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since weread %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
.section .ivt, "a",@progbits
.align 4
/* Critical system events */
.word _start /* 0 - 0x000 */
.word memory_error /* 1 - 0x008 */
.word instruction_error /* 2 - 0x010 */
/* Exceptions */
.word EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
.word EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
.word EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
.word EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
.word EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
.word EV_Trap /* 0x128, Trap exception (0x25) */
.word EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
.text
.globl _start
_start:
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack pointer */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Clear bss */
mov %r0, __bss_start
mov %r1, __bss_end
clear_bss:
st.ab 0, [%r0, 4]
brlt %r0, %r1, clear_bss
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
memory_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
interrupt_handler:
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
EV_MachineCheck:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
EV_TLBMissI:
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
EV_TLBMissD:
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
EV_TLBProtV:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
EV_PrivilegeV:
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
EV_Trap:
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
EV_Extension:
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = start_addr_sp
* r1 = new__gd
* r2 = relocaddr
*/
.align 4
.globl relocate_code
relocate_code:
/*
* r0-r12 might be clobbered by C functions
* so we use r13-r16 for storage here
*/
mov %r13, %r0 /* save addr_sp */
mov %r14, %r1 /* save addr of gd */
mov %r15, %r2 /* save addr of destination */
mov %r16, %r2 /* %r9 - relocation offset */
sub %r16, %r16, __image_copy_start
/* Set up the stack */
stack_setup:
mov %sp, %r13
mov %fp, %sp
/* Check if monitor is loaded right in place for relocation */
mov %r0, __image_copy_start
cmp %r0, %r15 /* skip relocation if code loaded */
bz do_board_init_r /* in target location already */
/* Copy data (__image_copy_start - __image_copy_end) to new location */
mov %r1, %r15
mov %r2, __image_copy_end
sub %r2, %r2, %r0 /* r3 <- amount of bytes to copy */
asr %r2, %r2, 2 /* r3 <- amount of words to copy */
mov %lp_count, %r2
lp copy_end
ld.ab %r2,[%r0,4]
st.ab %r2,[%r1,4]
copy_end:
/* Fix relocations related issues */
bl do_elf_reloc_fixups
#ifndef CONFIG_SYS_ICACHE_OFF
bl invalidate_icache_all
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
bl flush_dcache_all
#endif
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE] /* Read current position */
add %r0, %r0, %r16 /* Update address */
sr %r0, [ARC_AUX_INTR_VEC_BASE] /* Write new position */
do_board_init_r:
/* Prepare for exection of "board_init_r" in relocated monitor */
mov %r2, board_init_r /* old address of "board_init_r()" */
add %r2, %r2, %r16 /* new address of "board_init_r()" */
mov %r0, %r14 /* 1-st parameter: gd_t */
mov %r1, %r15 /* 2-nd parameter: dest_addr */
j [%r2]

12
arch/arc/dts/Makefile Normal file
View File

@ -0,0 +1,12 @@
dtb-$(CONFIG_TARGET_ARCANGEL4) += arcangel4.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
targets += $(dtb-y)
DTC_FLAGS += -R 4 -p 0x1000
PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
clean-files := *.dtb

24
arch/arc/dts/abilis_tb100.dts Normal file
View File

@ -0,0 +1,24 @@
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
uart0: serial@ff100000 {
compatible = "snps,dw-apb-uart";
reg = <0xff100000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
};

24
arch/arc/dts/arcangel4.dts Normal file
View File

@ -0,0 +1,24 @@
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &arcuart0;
};
arcuart0: serial@0xc0fc1000 {
compatible = "snps,arc-uart";
reg = <0xc0fc1000 0x100>;
clock-frequency = <80000000>;
};
};

13
arch/arc/dts/skeleton.dtsi Normal file
View File

@ -0,0 +1,13 @@
/*
* Skeleton device tree; the bare minimum needed to boot; just include and
* add a compatible value. The bootloader will typically populate the memory
* node.
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
memory { device_type = "memory"; reg = <0 0>; };
};

4
arch/arc/include/asm/arcregs.h
View File

@ -46,6 +46,10 @@
#define ARC_AUX_DC_PTAG 0x5C
#endif
#define ARC_BCR_DC_BUILD 0x72
#define ARC_BCR_SLC 0xce
#define ARC_AUX_SLC_CONTROL 0x903
#define ARC_AUX_SLC_FLUSH 0x904
#define ARC_AUX_SLC_INVALIDATE 0x905
#ifndef __ASSEMBLY__
/* Accessors for auxiliary registers */

11
arch/arc/include/asm/cache.h
View File

@ -27,4 +27,15 @@
#define CONFIG_ARC_MMU_VER 4
#endif
#ifndef __ASSEMBLY__
#ifdef CONFIG_ISA_ARCV2
void slc_enable(void);
void slc_disable(void);
void slc_flush(void);
void slc_invalidate(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARC_CACHE_H */

2
arch/arc/include/asm/config.h
View File

@ -7,8 +7,6 @@
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_ARCH_EARLY_INIT_R

12
arch/arc/include/asm/init_helpers.h Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_INIT_HELPERS_H
#define _ASM_ARC_INIT_HELPERS_H
int init_cache_f_r(void);
#endif /* _ASM_ARC_INIT_HELPERS_H */

16
arch/arc/include/asm/relocate.h Normal file
View File

@ -0,0 +1,16 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_RELOCATE_H
#define _ASM_ARC_RELOCATE_H
#include <common.h>
int copy_uboot_to_ram(void);
int clear_bss(void);
int do_elf_reloc_fixups(void);
#endif /* _ASM_ARC_RELOCATE_H */

3
arch/arc/include/asm/u-boot-arc.h
View File

@ -9,4 +9,7 @@
int arch_early_init_r(void);
void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
void board_init_f_r(void) __attribute__ ((noreturn));
#endif /* __ASM_ARC_U_BOOT_ARC_H__ */

3
arch/arc/lib/Makefile
View File

@ -18,6 +18,9 @@ obj-y += memcpy-700.o
obj-y += memset.o
obj-y += reset.o
obj-y += timer.o
obj-y += start.o
obj-y += ints_low.o
obj-y += init_helpers.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o

58
arch/arc/lib/cache.c
View File

@ -16,6 +16,7 @@
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
#define CACHE_VER_NUM_MASK 0xF
#define SLC_CTRL_SB (1 << 2)
int icache_status(void)
{
@ -49,10 +50,12 @@ void icache_disable(void)
void invalidate_icache_all(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
/* If no cache in CPU exit immediately */
if (!(read_aux_reg(ARC_BCR_IC_BUILD) & CACHE_VER_NUM_MASK))
return;
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
write_aux_reg(ARC_AUX_IC_IVIC, 1);
#endif /* CONFIG_SYS_ICACHE_OFF */
}
int dcache_status(void)
@ -156,13 +159,60 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
void invalidate_dcache_all(void)
{
#ifndef CONFIG_SYS_DCACHE_OFF
/* If no cache in CPU exit immediately */
if (!(read_aux_reg(ARC_BCR_DC_BUILD) & CACHE_VER_NUM_MASK))
return;
/* Write 1 to DC_IVDC register triggers invalidation of entire D$ */
write_aux_reg(ARC_AUX_DC_IVDC, 1);
#endif /* CONFIG_SYS_DCACHE_OFF */
}
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}
#ifdef CONFIG_ISA_ARCV2
void slc_enable(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_CONTROL,
read_aux_reg(ARC_AUX_SLC_CONTROL) & ~1);
}
void slc_disable(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_CONTROL,
read_aux_reg(ARC_AUX_SLC_CONTROL) | 1);
}
void slc_flush(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_FLUSH, 1);
/* Wait flush end */
while (read_aux_reg(ARC_AUX_SLC_CONTROL) & SLC_CTRL_SB)
;
}
void slc_invalidate(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 1);
}
#endif /* CONFIG_ISA_ARCV2 */

13
arch/arc/lib/cpu.c
View File

@ -12,19 +12,6 @@ DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
#ifdef CONFIG_SYS_ICACHE_OFF
icache_disable();
#else
icache_enable();
invalidate_icache_all();
#endif
flush_dcache_all();
#ifdef CONFIG_SYS_DCACHE_OFF
dcache_disable();
#else
dcache_enable();
#endif
timer_init();
/* In simulation (ISS) "CHIPID" and "ARCNUM" are all "ff" */

25
arch/arc/lib/init_helpers.c Normal file
View File

@ -0,0 +1,25 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
int init_cache_f_r(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
icache_enable();
/* Make sure no stale entries persist from before we disabled cache */
invalidate_icache_all();
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
/* Make sure no stale entries persist from before we disabled cache */
invalidate_dcache_all();
#endif
return 0;
}

151
arch/arc/lib/ints_low.S Normal file
View File

@ -0,0 +1,151 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since we read %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
ENTRY(memory_error)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
ENDPROC(memory_error)
ENTRY(instruction_error)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
ENDPROC(instruction_error)
ENTRY(interrupt_handler)
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
ENDPROC(interrupt_handler)
ENTRY(EV_MachineCheck)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
ENDPROC(EV_MachineCheck)
ENTRY(EV_TLBMissI)
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
ENDPROC(EV_TLBMissI)
ENTRY(EV_TLBMissD)
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
ENDPROC(EV_TLBMissD)
ENTRY(EV_TLBProtV)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
ENDPROC(EV_TLBProtV)
ENTRY(EV_PrivilegeV)
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
ENDPROC(EV_PrivilegeV)
ENTRY(EV_Trap)
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
ENDPROC(EV_Trap)
ENTRY(EV_Extension)
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
ENDPROC(EV_Extension)

19
arch/arc/lib/relocate.c
View File

@ -10,6 +10,25 @@
DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
return 0;
}
int clear_bss(void)
{
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
memset((void *)dst_addr, 0x00, len);
return 0;
}
/*
* Base functionality is taken from x86 version with added ARC-specifics
*/

63
arch/arc/lib/start.S Normal file
View File

@ -0,0 +1,63 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <linux/linkage.h>
#include <asm/arcregs.h>
ENTRY(_start)
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack- and frame-pointers */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Unconditionally disable caches */
#ifdef CONFIG_ISA_ARCV2
bl slc_flush
bl slc_disable
#endif
bl flush_dcache_all
bl dcache_disable
bl icache_disable
/* Allocate and zero GD, update SP */
mov %r0, %sp
bl board_init_f_mem
/* Update stack- and frame-pointers */
mov %sp, %r0
mov %fp, %sp
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
ENDPROC(_start)
/*
* void board_init_f_r_trampoline(stack-pointer address)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = new stack-pointer
*/
ENTRY(board_init_f_r_trampoline)
/* Set up the stack- and frame-pointers */
mov %sp, %r0
mov %fp, %sp
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE]
ld %r1, [%r25, GD_RELOC_OFF]
add %r0, %r0, %r1
sr %r0, [ARC_AUX_INTR_VEC_BASE]
/* Re-enter U-Boot by calling board_init_f_r */
j board_init_f_r
ENDPROC(board_init_f_r_trampoline)

23
arch/arm/Kconfig
View File

@ -286,13 +286,8 @@ config TARGET_MX35PDK
bool "Support mx35pdk"
select CPU_ARM1136
config TARGET_RPI
bool "Support rpi"
select CPU_ARM1176
config TARGET_RPI_2
bool "Support rpi_2"
select CPU_V7
config ARCH_BCM283X
bool "Broadcom BCM283X family"
config TARGET_INTEGRATORAP_CM946ES
bool "Support integratorap_cm946es"
@ -433,6 +428,10 @@ config ARCH_KEYSTONE
select CPU_V7
select SUPPORT_SPL
config ARCH_MX6
bool "Freescale MX6"
select CPU_V7
config TARGET_M53EVK
bool "Support m53evk"
select CPU_V7
@ -723,9 +722,9 @@ endchoice
source "arch/arm/mach-at91/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
source "arch/arm/mach-bcm283x/Kconfig"
source "arch/arm/cpu/arm1176/bcm2835/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
source "arch/arm/cpu/armv7/exynos/Kconfig"
@ -735,6 +734,8 @@ source "arch/arm/mach-keystone/Kconfig"
source "arch/arm/mach-kirkwood/Kconfig"
source "arch/arm/cpu/armv7/mx6/Kconfig"
source "arch/arm/mach-nomadik/Kconfig"
source "arch/arm/cpu/armv7/omap3/Kconfig"
@ -761,6 +762,8 @@ source "arch/arm/cpu/armv7/Kconfig"
source "arch/arm/cpu/armv8/Kconfig"
source "arch/arm/imx-common/Kconfig"
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
@ -834,8 +837,6 @@ source "board/palmtreo680/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/pxa255_idp/Kconfig"
source "board/raspberrypi/rpi/Kconfig"
source "board/raspberrypi/rpi_2/Kconfig"
source "board/samsung/smdk2410/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/scb9328/Kconfig"

1
arch/arm/Makefile
View File

@ -37,6 +37,7 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM283X) += bcm283x
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_KEYSTONE) += keystone

3
arch/arm/config.mk
View File

@ -19,9 +19,6 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_CPPFLAGS += -D__ARM__
# Choose between ARM/Thumb instruction sets

2
arch/arm/cpu/arm1176/Makefile
View File

@ -10,5 +10,3 @@
extra-y = start.o
obj-y = cpu.o
obj-$(CONFIG_BCM2835) += bcm2835/

12
arch/arm/cpu/arm1176/bcm2835/Kconfig
View File

@ -1,12 +0,0 @@
if TARGET_RPI || TARGET_RPI_2
config DM
default y
config DM_SERIAL
default y
config DM_GPIO
default y
endif

1
arch/arm/cpu/armv7/Makefile
View File

@ -39,7 +39,6 @@ endif
obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
obj-$(CONFIG_BCM2835) += bcm2835/
obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/

2
arch/arm/cpu/armv7/am33xx/ddr.c
View File

@ -164,9 +164,9 @@ void config_sdram(const struct emif_regs *regs, int nr)
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
}
writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
}
/**

13
arch/arm/cpu/armv7/bcm2835/Makefile
View File

@ -1,13 +0,0 @@
#
# (C) Copyright 2012 Stephen Warren
#
# SPDX-License-Identifier: GPL-2.0+
#
src_dir := ../../arm1176/bcm2835/
obj-y :=
obj-y += $(src_dir)/init.o
obj-y += $(src_dir)/reset.o
obj-y += $(src_dir)/timer.o
obj-y += $(src_dir)/mbox.o

6
arch/arm/cpu/armv7/exynos/Kconfig
View File

@ -80,12 +80,6 @@ config DM_SPI_FLASH
config DM_GPIO
default y
config SYS_MALLOC_F
default y
config SYS_MALLOC_F_LEN
default 0x400
source "board/samsung/smdkv310/Kconfig"
source "board/samsung/trats/Kconfig"
source "board/samsung/universal_c210/Kconfig"

69
arch/arm/cpu/armv7/exynos/clock.c
View File

@ -14,7 +14,6 @@
#define PLL_DIV_1024 1024
#define PLL_DIV_65535 65535
#define PLL_DIV_65536 65536
/* *
* This structure is to store the src bit, div bit and prediv bit
* positions of the peripheral clocks of the src and div registers
@ -423,8 +422,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
case PERIPH_ID_I2C6:
case PERIPH_ID_I2C7:
src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);
sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);
sub_div = readl(&clk->div_top0);
break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
@ -1028,6 +1027,40 @@ static unsigned long exynos5420_get_lcd_clk(void)
return pclk;
}
static unsigned long exynos5800_get_lcd_clk(void)
{
struct exynos5420_clock *clk =
(struct exynos5420_clock *)samsung_get_base_clock();
unsigned long sclk;
unsigned int sel;
unsigned int ratio;
/*
* CLK_SRC_DISP10
* CLKMUX_FIMD1 [6:4]
*/
sel = (readl(&clk->src_disp10) >> 4) & 0x7;
if (sel) {
/*
* Mapping of CLK_SRC_DISP10 CLKMUX_FIMD1 [6:4] values into
* PLLs. The first element is a placeholder to bypass the
* default settig.
*/
const int reg_map[] = {0, CPLL, DPLL, MPLL, SPLL, IPLL, EPLL,
RPLL};
sclk = get_pll_clk(reg_map[sel]);
} else
sclk = CONFIG_SYS_CLK_FREQ;
/*
* CLK_DIV_DISP10
* FIMD1_RATIO [3:0]
*/
ratio = readl(&clk->div_disp10) & 0xf;
return sclk / (ratio + 1);
}
void exynos4_set_lcd_clk(void)
{
struct exynos4_clock *clk =
@ -1159,6 +1192,28 @@ void exynos5420_set_lcd_clk(void)
writel(cfg, &clk->div_disp10);
}
void exynos5800_set_lcd_clk(void)
{
struct exynos5420_clock *clk =
(struct exynos5420_clock *)samsung_get_base_clock();
unsigned int cfg;
/*
* Use RPLL for pixel clock
* CLK_SRC_DISP10 CLKMUX_FIMD1 [6:4]
* ==================
* 111: SCLK_RPLL
*/
cfg = readl(&clk->src_disp10) | (0x7 << 4);
writel(cfg, &clk->src_disp10);
/*
* CLK_DIV_DISP10
* FIMD1_RATIO [3:0]
*/
clrsetbits_le32(&clk->div_disp10, 0xf << 0, 0x0 << 0);
}
void exynos4_set_mipi_clk(void)
{
struct exynos4_clock *clk =
@ -1646,8 +1701,10 @@ unsigned long get_lcd_clk(void)
if (cpu_is_exynos4())
return exynos4_get_lcd_clk();
else {
if (proid_is_exynos5420() || proid_is_exynos5800())
if (proid_is_exynos5420())
return exynos5420_get_lcd_clk();
else if (proid_is_exynos5800())
return exynos5800_get_lcd_clk();
else
return exynos5_get_lcd_clk();
}
@ -1660,8 +1717,10 @@ void set_lcd_clk(void)
else {
if (proid_is_exynos5250())
exynos5_set_lcd_clk();
else if (proid_is_exynos5420() || proid_is_exynos5800())
else if (proid_is_exynos5420())
exynos5420_set_lcd_clk();
else
exynos5800_set_lcd_clk();
}
}

4
arch/arm/cpu/armv7/exynos/clock_init_exynos5.c
View File

@ -179,10 +179,10 @@ struct mem_timings mem_timings[] = {
.spll_mdiv = 0xc8,
.spll_pdiv = 0x3,
.spll_sdiv = 0x2,
/* RPLL @70.5Mhz */
/* RPLL @141Mhz */
.rpll_mdiv = 0x5E,
.rpll_pdiv = 0x2,
.rpll_sdiv = 0x4,
.rpll_sdiv = 0x3,
.direct_cmd_msr = {
0x00020018, 0x00030000, 0x00010046, 0x00000d70,

42
arch/arm/cpu/armv7/mx6/Kconfig Normal file
View File

@ -0,0 +1,42 @@
if ARCH_MX6
config MX6
bool
default y
config MX6D
bool
config MX6DL
bool
config MX6Q
bool
config MX6QDL
bool
config MX6S
bool
config MX6SL
bool
config MX6SX
bool
choice
prompt "MX6 board select"
config TARGET_SECOMX6
bool "Support secomx6 boards"
select CPU_V7
endchoice
config SYS_SOC
default "mx6"
source "board/seco/Kconfig"
endif

6
arch/arm/cpu/armv7/omap3/Kconfig
View File

@ -106,12 +106,6 @@ config DM_GPIO
config DM_SERIAL
default y if DM
config SYS_MALLOC_F
default y if DM
config SYS_MALLOC_F_LEN
default 0x400 if DM
config SYS_SOC
default "omap3"

35
arch/arm/cpu/armv7/sunxi/clock_sun4i.c
View File

@ -100,22 +100,23 @@ static struct {
unsigned int freq;
} pll1_para[] = {
/* This array must be ordered by frequency. */
{ PLL1_CFG(16, 0, 0, 0), 384000000 },
{ PLL1_CFG(16, 1, 0, 0), 768000000 },
{ PLL1_CFG(20, 1, 0, 0), 960000000 },
{ PLL1_CFG(21, 1, 0, 0), 1008000000},
{ PLL1_CFG(22, 1, 0, 0), 1056000000},
{ PLL1_CFG(23, 1, 0, 0), 1104000000},
{ PLL1_CFG(24, 1, 0, 0), 1152000000},
{ PLL1_CFG(25, 1, 0, 0), 1200000000},
{ PLL1_CFG(26, 1, 0, 0), 1248000000},
{ PLL1_CFG(27, 1, 0, 0), 1296000000},
{ PLL1_CFG(28, 1, 0, 0), 1344000000},
{ PLL1_CFG(29, 1, 0, 0), 1392000000},
{ PLL1_CFG(30, 1, 0, 0), 1440000000},
{ PLL1_CFG(31, 1, 0, 0), 1488000000},
/* Final catchall entry */
{ PLL1_CFG(31, 1, 0, 0), ~0},
{ PLL1_CFG(30, 1, 0, 0), 1440000000},
{ PLL1_CFG(29, 1, 0, 0), 1392000000},
{ PLL1_CFG(28, 1, 0, 0), 1344000000},
{ PLL1_CFG(27, 1, 0, 0), 1296000000},
{ PLL1_CFG(26, 1, 0, 0), 1248000000},
{ PLL1_CFG(25, 1, 0, 0), 1200000000},
{ PLL1_CFG(24, 1, 0, 0), 1152000000},
{ PLL1_CFG(23, 1, 0, 0), 1104000000},
{ PLL1_CFG(22, 1, 0, 0), 1056000000},
{ PLL1_CFG(21, 1, 0, 0), 1008000000},
{ PLL1_CFG(20, 1, 0, 0), 960000000 },
{ PLL1_CFG(19, 1, 0, 0), 912000000 },
{ PLL1_CFG(16, 1, 0, 0), 768000000 },
/* Final catchall entry 384MHz*/
{ PLL1_CFG(16, 0, 0, 0), 0 },
};
void clock_set_pll1(unsigned int hz)
@ -126,10 +127,12 @@ void clock_set_pll1(unsigned int hz)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
/* Find target frequency */
while (pll1_para[i].freq < hz)
while (pll1_para[i].freq > hz)
i++;
hz = pll1_para[i].freq;
if (! hz)
hz = 384000000;
/* Calculate system clock divisors */
axi = DIV_ROUND_UP(hz, 432000000); /* Max 450MHz */

2
arch/arm/cpu/armv7/sunxi/psci.S
View File

@ -37,7 +37,7 @@
.arch_extension sec
#define ONE_MS (CONFIG_SYS_CLK_FREQ / 1000)
#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000)
#define TEN_MS (10 * ONE_MS)
#define GICD_BASE 0x1c81000
#define GICC_BASE 0x1c82000

7
arch/arm/cpu/armv7/sunxi/usbc.c
View File

@ -182,6 +182,13 @@ static void sunxi_usb_passby(struct sunxi_usbc_hcd *sunxi_usbc, int enable)
return;
}
void sunxi_usbc_enable_squelch_detect(int index, int enable)
{
struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index];
usb_phy_write(sunxi_usbc, 0x3c, enable ? 0 : 2, 2);
}
int sunxi_usbc_request_resources(int index)
{
struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index];

2
arch/arm/dts/Makefile
View File

@ -24,7 +24,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-trimslice.dtb \
tegra20-ventana.dtb \
tegra20-whistler.dtb \
tegra20-colibri_t20_iris.dtb \
tegra20-colibri.dtb \
tegra30-apalis.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \

2
arch/arm/dts/exynos5420-peach-pit.dts
View File

@ -67,6 +67,8 @@
edp-lvds-bridge@48 {
compatible = "parade,ps8625";
reg = <0x48>;
sleep-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpy7 7 GPIO_ACTIVE_HIGH>;
};
};

1
arch/arm/dts/exynos54xx.dtsi
View File

@ -168,6 +168,7 @@
fimd@14400000 {
/* sysmmu is not used in U-Boot */
samsung,disable-sysmmu;
samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
};
dp@145b0000 {

3
arch/arm/dts/exynos5800-peach-pi.dts
View File

@ -144,10 +144,13 @@
samsung,vl-vfpd = <10>;
samsung,vl-cmd-allow-len = <0xf>;
samsung,power-on-delay = <30000>;
samsung,winid = <3>;
samsung,interface-mode = <1>;
samsung,dp-enabled = <1>;
samsung,dual-lcd-enabled = <0>;
samsung,bl-en-gpio = <&gpx2 2 GPIO_ACTIVE_HIGH>;
};
};

0
arch/arm/dts/tegra20-colibri_t20_iris.dts → arch/arm/dts/tegra20-colibri.dts
View File

2
arch/arm/imx-common/Kconfig Normal file
View File

@ -0,0 +1,2 @@
config IMX_CONFIG
string

3
arch/arm/include/asm/arch-exynos/clk.h
View File

@ -16,6 +16,9 @@
#define BPLL 5
#define RPLL 6
#define SPLL 7
#define CPLL 8
#define DPLL 9
#define IPLL 10
#define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8))
#define MASK_RATIO(x) (0xf << (x << 4))

1
arch/arm/include/asm/arch-sunxi/usbc.h
View File

@ -20,3 +20,4 @@ void sunxi_usbc_enable(int index);
void sunxi_usbc_disable(int index);
void sunxi_usbc_vbus_enable(int index);
void sunxi_usbc_vbus_disable(int index);
void sunxi_usbc_enable_squelch_detect(int index, int enable);

30
arch/arm/include/asm/arch-tegra/pinmux.h
View File

@ -170,6 +170,16 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
int len);
struct pmux_pingrp_desc {
u8 funcs[4];
#if defined(CONFIG_TEGRA20)
u8 ctl_id;
u8 pull_id;
#endif /* CONFIG_TEGRA20 */
};
extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
#ifdef TEGRA_PMX_SOC_HAS_DRVGRPS
#define PMUX_SLWF_MIN 0
@ -219,14 +229,20 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
#endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
struct pmux_pingrp_desc {
u8 funcs[4];
#if defined(CONFIG_TEGRA20)
u8 ctl_id;
u8 pull_id;
#endif /* CONFIG_TEGRA20 */
#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
struct pmux_mipipadctrlgrp_config {
u32 grp:16; /* pin group PMUX_MIPIPADCTRLGRP_x */
u32 func:8; /* function to assign PMUX_FUNC_... */
};
extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
void pinmux_config_mipipadctrlgrp_table(
const struct pmux_mipipadctrlgrp_config *config, int len);
struct pmux_mipipadctrlgrp_desc {
u8 funcs[2];
};
extern const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups;
#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */
#endif /* _TEGRA_PINMUX_H_ */

9
arch/arm/include/asm/arch-tegra124/pinmux.h
View File

@ -246,6 +246,11 @@ enum pmux_drvgrp {
PMUX_DRVGRP_COUNT,
};
enum pmux_mipipadctrlgrp {
PMUX_MIPIPADCTRLGRP_DSI_B,
PMUX_MIPIPADCTRLGRP_COUNT,
};
enum pmux_func {
PMUX_FUNC_DEFAULT,
PMUX_FUNC_BLINK,
@ -255,6 +260,7 @@ enum pmux_func {
PMUX_FUNC_CLK,
PMUX_FUNC_CLK12,
PMUX_FUNC_CPU,
PMUX_FUNC_CSI,
PMUX_FUNC_DAP,
PMUX_FUNC_DAP1,
PMUX_FUNC_DAP2,
@ -263,6 +269,7 @@ enum pmux_func {
PMUX_FUNC_DISPLAYA_ALT,
PMUX_FUNC_DISPLAYB,
PMUX_FUNC_DP,
PMUX_FUNC_DSI_B,
PMUX_FUNC_DTV,
PMUX_FUNC_EXTPERIPH1,
PMUX_FUNC_EXTPERIPH2,
@ -336,8 +343,10 @@ enum pmux_func {
};
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
#define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x820
#define TEGRA_PMX_SOC_HAS_IO_CLAMPING
#define TEGRA_PMX_SOC_HAS_DRVGRPS
#define TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
#define TEGRA_PMX_GRPS_HAVE_LPMD
#define TEGRA_PMX_GRPS_HAVE_SCHMT
#define TEGRA_PMX_GRPS_HAVE_HSM

10
arch/arm/include/asm/mach-types.h
View File

@ -936,7 +936,7 @@ extern unsigned int __machine_arch_type;
#define MACH_TYPE_CWME9210 3320
#define MACH_TYPE_CWME9210JS 3321
#define MACH_TYPE_PGS_SITARA 3322
#define MACH_TYPE_COLIBRI_TEGRA2 3323
#define MACH_TYPE_COLIBRI_T20 3323
#define MACH_TYPE_W21 3324
#define MACH_TYPE_POLYSAT1 3325
#define MACH_TYPE_DATAWAY 3326
@ -12197,16 +12197,16 @@ extern unsigned int __machine_arch_type;
# define machine_is_pgs_v1() (0)
#endif
#ifdef CONFIG_MACH_COLIBRI_TEGRA2
#ifdef CONFIG_MACH_COLIBRI_T20
# ifdef machine_arch_type
# undef machine_arch_type
# define machine_arch_type __machine_arch_type
# else
# define machine_arch_type MACH_TYPE_COLIBRI_TEGRA2
# define machine_arch_type MACH_TYPE_COLIBRI_T20
# endif
# define machine_is_colibri_tegra2() (machine_arch_type == MACH_TYPE_COLIBRI_TEGRA2)
# define machine_is_colibri_t20() (machine_arch_type == MACH_TYPE_COLIBRI_T20)
#else
# define machine_is_colibri_tegra2() (0)
# define machine_is_colibri_t20() (0)
#endif
#ifdef CONFIG_MACH_W21

17
arch/arm/include/asm/semihosting.h
View File

@ -1,17 +0,0 @@
/*
* Copyright 2014 Broadcom Corporation
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SEMIHOSTING_H__
#define __SEMIHOSTING_H__
/*
* ARM semihosting functions for loading images to memory. See the source
* code for more information.
*/
int smh_load(const char *fname, void *memp, int avail, int verbose);
long smh_len(const char *fname);
#endif /* __SEMIHOSTING_H__ */

134
arch/arm/lib/semihosting.c
View File

@ -13,7 +13,7 @@
* for them.
*/
#include <common.h>
#include <asm/semihosting.h>
#include <command.h>
#define SYSOPEN 0x01
#define SYSCLOSE 0x02
@ -26,7 +26,7 @@
/*
* Call the handler
*/
static long smh_trap(unsigned int sysnum, void *addr)
static noinline long smh_trap(unsigned int sysnum, void *addr)
{
register long result asm("r0");
#if defined(CONFIG_ARM64)
@ -144,93 +144,71 @@ static long smh_len_fd(long fd)
return ret;
}
/*
* Open, load a file into memory, and close it. Check that the available space
* is sufficient to store the entire file. Return the bytes actually read from
* the file as seen by the read function. The verbose flag enables some extra
* printing of successful read status.
*/
int smh_load(const char *fname, void *memp, int avail, int verbose)
static int smh_load_file(const char * const name, ulong load_addr,
ulong *end_addr)
{
long ret;
long fd;
size_t len;
long len;
long ret;
ret = -1;
debug("%s: fname \'%s\', avail %u, memp %p\n", __func__, fname,
avail, memp);
/* Open the file */
fd = smh_open(fname, "rb");
fd = smh_open(name, "rb");
if (fd == -1)
return -1;
/* Get the file length */
ret = smh_len_fd(fd);
if (ret == -1) {
smh_close(fd);
return -1;
}
/* Check that the file will fit in the supplied buffer */
if (ret > avail) {
printf("%s: ERROR ret %ld, avail %u\n", __func__, ret,
avail);
smh_close(fd);
return -1;
}
len = ret;
/* Read the file into the buffer */
ret = smh_read(fd, memp, len);
if (ret == 0) {
/* Print successful load information if requested */
if (verbose) {
printf("\n%s\n", fname);
printf(" 0x%8p dest\n", memp);
printf(" 0x%08lx size\n", len);
printf(" 0x%08x avail\n", avail);
}
}
/* Close the file */
smh_close(fd);
return ret;
}
/*
* Get the file length from the filename
*/
long smh_len(const char *fname)
{
long ret;
long fd;
long len;
debug("%s: file \'%s\'\n", __func__, fname);
/* Open the file */
fd = smh_open(fname, "rb");
if (fd < 0)
return fd;
/* Get the file length */
len = smh_len_fd(fd);
if (len < 0) {
smh_close(fd);
return len;
return -1;
}
/* Close the file */
ret = smh_close(fd);
if (ret < 0)
return ret;
ret = smh_read(fd, (void *)load_addr, len);
smh_close(fd);
debug("%s: returning len %ld\n", __func__, len);
if (ret == 0) {
*end_addr = load_addr + len - 1;
printf("loaded file %s from %08lX to %08lX, %08lX bytes\n",
name,
load_addr,
*end_addr,
len);
} else {
printf("read failed\n");
return 0;
}
/* Return the file length (or -1 error indication) */
return len;
return 0;
}
static int do_smhload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc == 3 || argc == 4) {
ulong load_addr;
ulong end_addr = 0;
ulong ret;
char end_str[64];
load_addr = simple_strtoul(argv[2], NULL, 16);
if (!load_addr)
return -1;
ret = smh_load_file(argv[1], load_addr, &end_addr);
if (ret < 0)
return 1;
/* Optionally save returned end to the environment */
if (argc == 4) {
sprintf(end_str, "0x%08lx", end_addr);
setenv(argv[3], end_str);
}
} else {
return CMD_RET_USAGE;
}
return 0;
}
U_BOOT_CMD(smhload, 4, 0, do_smhload, "load a file using semihosting",
"<file> 0x<address> [end var]\n"
" - load a semihosted file to the address specified\n"
" if the optional [end var] is specified, the end\n"
" address of the file will be stored in this environment\n"
" variable.\n");

3
arch/arm/mach-at91/Kconfig
View File

@ -66,6 +66,7 @@ config TARGET_STAMP9G20
config TARGET_AT91SAM9M10G45EK
bool "Atmel AT91SAM9M10G45-EK board"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_PM9G45
bool "Ronetix pm9g45 board"
@ -74,6 +75,7 @@ config TARGET_PM9G45
config TARGET_AT91SAM9N12EK
bool "Atmel AT91SAM9N12-EK board"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_AT91SAM9RLEK
bool "Atmel at91sam9rl reference board"
@ -82,6 +84,7 @@ config TARGET_AT91SAM9RLEK
config TARGET_AT91SAM9X5EK
bool "Atmel AT91SAM9X5-EK board"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_SAMA5D3_XPLAINED
bool "SAMA5D3 Xplained board"

2
arch/arm/mach-at91/Makefile
View File

@ -2,6 +2,8 @@ obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
ifneq ($(CONFIG_SPL_BUILD),)
obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
obj-y += spl.o

54
arch/arm/mach-at91/arm926ejs/clock.c
View File

@ -195,50 +195,52 @@ int at91_clock_init(unsigned long main_clock)
void at91_plla_init(u32 pllar)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
int timeout = AT91_PLL_LOCK_TIMEOUT;
writel(pllar, &pmc->pllar);
while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) {
timeout--;
if (timeout == 0)
break;
}
while (!(readl(&pmc->sr) & AT91_PMC_LOCKA))
;
}
void at91_pllb_init(u32 pllbr)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
int timeout = AT91_PLL_LOCK_TIMEOUT;
writel(pllbr, &pmc->pllbr);
while (!(readl(&pmc->sr) & (AT91_PMC_LOCKB | AT91_PMC_MCKRDY))) {
timeout--;
if (timeout == 0)
break;
}
while (!(readl(&pmc->sr) & AT91_PMC_LOCKB))
;
}
void at91_mck_init(u32 mckr)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
int timeout = AT91_PLL_LOCK_TIMEOUT;
u32 tmp;
tmp = readl(&pmc->mckr);
tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
AT91_PMC_MCKR_MDIV_MASK |
AT91_PMC_MCKR_PLLADIV_MASK |
AT91_PMC_MCKR_CSS_MASK);
tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
AT91_PMC_MCKR_MDIV_MASK |
AT91_PMC_MCKR_PLLADIV_MASK |
AT91_PMC_MCKR_CSS_MASK);
tmp &= ~AT91_PMC_MCKR_PRES_MASK;
tmp |= mckr & AT91_PMC_MCKR_PRES_MASK;
writel(tmp, &pmc->mckr);
while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
;
while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) {
timeout--;
if (timeout == 0)
break;
}
tmp = readl(&pmc->mckr);
tmp &= ~AT91_PMC_MCKR_MDIV_MASK;
tmp |= mckr & AT91_PMC_MCKR_MDIV_MASK;
writel(tmp, &pmc->mckr);
while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
;
tmp = readl(&pmc->mckr);
tmp &= ~AT91_PMC_MCKR_PLLADIV_MASK;
tmp |= mckr & AT91_PMC_MCKR_PLLADIV_MASK;
writel(tmp, &pmc->mckr);
while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
;
tmp = readl(&pmc->mckr);
tmp &= ~AT91_PMC_MCKR_CSS_MASK;
tmp |= mckr & AT91_PMC_MCKR_CSS_MASK;
writel(tmp, &pmc->mckr);
while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
;
}
void at91_periph_clk_enable(int id)

59
arch/arm/mach-at91/arm926ejs/timer.c
View File

@ -33,22 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define TIMER_LOAD_VAL 0xfffff
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
do_div(tick, gd->arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);
return usec;
}
/*
* Use the PITC in full 32 bit incrementing mode
*/
@ -64,53 +48,10 @@ int timer_init(void)
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
gd->arch.tbu = gd->arch.tbl = 0;
return 0;
}
/*
* Get the current 64 bit timer tick count
*/
unsigned long long get_ticks(void)
{
at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
ulong now = readl(&pit->piir);
/* increment tbu if tbl has rolled over */
if (now < gd->arch.tbl)
gd->arch.tbu++;
gd->arch.tbl = now;
return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
}
void __udelay(unsigned long usec)
{
unsigned long long start;
ulong tmo;
start = get_ticks(); /* get current timestamp */
tmo = usec_to_tick(usec); /* convert usecs to ticks */
while ((get_ticks() - start) < tmo)
; /* loop till time has passed */
}
/*
* get_timer(base) can be used to check for timeouts or
* to measure elasped time relative to an event:
*
* ulong start_time = get_timer(0) sets start_time to the current
* time value.
* get_timer(start_time) returns the time elapsed since then.
*
* The time is used in CONFIG_SYS_HZ units!
*/
ulong get_timer(ulong base)
{
return tick_to_time(get_ticks()) - base;
}
/*
* Return the number of timer ticks per second.
*/

48
arch/arm/mach-at91/arm926ejs/u-boot-spl.lds Normal file
View File

@ -0,0 +1,48 @@
/*
* Copyright (C) 2015 Atmel Corporation
* Bo Shen <voice.shen@atmel.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
LENGTH = CONFIG_SPL_MAX_SIZE }
MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.text :
{
__start = .;
*(.vectors)
arch/arm/cpu/arm926ejs/start.o (.text*)
*(.text*)
} >.sram
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
. = ALIGN(4);
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
__image_copy_end = .;
.end :
{
*(.__end)
} >.sram
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.bss*)
. = ALIGN(4);
__bss_end = .;
} >.sdram
}

61
arch/arm/mach-at91/armv7/timer.c
View File

@ -36,22 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define TIMER_LOAD_VAL 0xfffff
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
do_div(tick, gd->arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);
return usec;
}
/*
* Use the PITC in full 32 bit incrementing mode
*/
@ -67,54 +51,9 @@ int timer_init(void)
gd->arch.timer_rate_hz = get_pit_clk_rate() / 16;
gd->arch.tbu = 0;
gd->arch.tbl = 0;
return 0;
}
/*
* Get the current 64 bit timer tick count
*/
unsigned long long get_ticks(void)
{
at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
ulong now = readl(&pit->piir);
/* increment tbu if tbl has rolled over */
if (now < gd->arch.tbl)
gd->arch.tbu++;
gd->arch.tbl = now;
return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
}
void __udelay(unsigned long usec)
{
unsigned long long start;
ulong tmo;
start = get_ticks(); /* get current timestamp */
tmo = usec_to_tick(usec); /* convert usecs to ticks */
while ((get_ticks() - start) < tmo)
; /* loop till time has passed */
}
/*
* get_timer(base) can be used to check for timeouts or
* to measure elasped time relative to an event:
*
* ulong start_time = get_timer(0) sets start_time to the current
* time value.
* get_timer(start_time) returns the time elapsed since then.
*
* The time is used in CONFIG_SYS_HZ units!
*/
ulong get_timer(ulong base)
{
return tick_to_time(get_ticks()) - base;
}
/*
* Return the number of timer ticks per second.
*/

6
arch/arm/mach-at91/include/mach/at91_pmc.h
View File

@ -97,7 +97,8 @@ typedef struct at91_pmc {
#define AT91_PMC_MCKR_CSS_PLLB 0x00000003
#define AT91_PMC_MCKR_CSS_MASK 0x00000003
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
#define AT91_PMC_MCKR_PRES_1 0x00000000
#define AT91_PMC_MCKR_PRES_2 0x00000010
#define AT91_PMC_MCKR_PRES_4 0x00000020
@ -126,7 +127,8 @@ typedef struct at91_pmc {
#else
#define AT91_PMC_MCKR_MDIV_1 0x00000000
#define AT91_PMC_MCKR_MDIV_2 0x00000100
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
#define AT91_PMC_MCKR_MDIV_3 0x00000300
#endif
#define AT91_PMC_MCKR_MDIV_4 0x00000200

3
arch/arm/mach-at91/include/mach/at91sam9260.h
View File

@ -133,6 +133,9 @@
#define ATMEL_BASE_CS6 0x70000000
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
*/

3
arch/arm/mach-at91/include/mach/at91sam9261.h
View File

@ -117,6 +117,9 @@
#define ATMEL_BASE_CS6 0x70000000
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
*/

3
arch/arm/mach-at91/include/mach/at91sam9263.h
View File

@ -132,6 +132,9 @@
#define ATMEL_BASE_CS6 0x70000000
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
*/

3
arch/arm/mach-at91/include/mach/at91sam9g45.h
View File

@ -136,6 +136,9 @@
#define ATMEL_BASE_CS6 0x70000000
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
*/

3
arch/arm/mach-at91/include/mach/at91sam9rl.h
View File

@ -116,6 +116,9 @@
#define ATMEL_BASE_CS4 0x50000000 /* Compact Flash Slot 0 */
#define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
*/

13
arch/arm/mach-at91/include/mach/at91sam9x5.h
View File

@ -124,6 +124,16 @@
#define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */
#endif
/*
* External memory
*/
#define ATMEL_BASE_CS0 0x10000000
#define ATMEL_BASE_CS1 0x20000000
#define ATMEL_BASE_CS2 0x30000000
#define ATMEL_BASE_CS3 0x40000000
#define ATMEL_BASE_CS4 0x50000000
#define ATMEL_BASE_CS5 0x60000000
/* 9x5 series chip id definitions */
#define ARCH_ID_AT91SAM9X5 0x819a05a0
#define ARCH_ID_VERSION_MASK 0x1f
@ -154,6 +164,9 @@
#define ATMEL_CPU_NAME get_cpu_name()
#endif
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
/*
* Other misc defines
*/

3
arch/arm/mach-at91/include/mach/sama5d3.h
View File

@ -189,6 +189,9 @@
#define PIO_SCDR_DIV 0x3fff
#define CPU_HAS_PCR
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
/*
* PMECC table in ROM
*/

3
arch/arm/mach-at91/include/mach/sama5d4.h
View File

@ -193,6 +193,9 @@
#define cpu_is_sama5d44() (cpu_is_sama5d4() && \
(get_extension_chip_id() == ARCH_EXID_SAMA5D44))
/* Timer */
#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
/*
* No PMECC Galois table in ROM
*/

3
arch/arm/mach-at91/mpddrc.c
View File

@ -19,7 +19,8 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
static int ddr2_decodtype_is_seq(u32 cr)
{
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
return 0;
#endif

2
arch/arm/mach-at91/spl.c
View File

@ -29,7 +29,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_MMC1;
#elif CONFIG_SYS_USE_NANDFLASH
return BOOT_DEVICE_NAND;
#elif CONFIG_SYS_USE_SERIALFLASH
#elif CONFIG_SYS_USE_SERIALFLASH || CONFIG_SYS_USE_SPIFLASH
return BOOT_DEVICE_SPI;
#endif
return BOOT_DEVICE_NONE;

11
arch/arm/mach-at91/spl_at91.c
View File

@ -71,7 +71,11 @@ void __weak at91_spl_board_init(void)
{
}
void spl_board_init(void)
void __weak spl_board_init(void)
{
}
void board_init_f(ulong dummy)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
@ -111,9 +115,14 @@ void spl_board_init(void)
timer_init();
/* enable clocks for all PIOs */
#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
at91_periph_clk_enable(ATMEL_ID_PIOAB);
at91_periph_clk_enable(ATMEL_ID_PIOCD);
#else
at91_periph_clk_enable(ATMEL_ID_PIOA);
at91_periph_clk_enable(ATMEL_ID_PIOB);
at91_periph_clk_enable(ATMEL_ID_PIOC);
#endif
/* init console */
at91_seriald_hw_init();
preloader_console_init();

10
arch/arm/mach-at91/spl_atmel.c
View File

@ -70,7 +70,12 @@ __weak void redirect_int_from_saic_to_aic(void)
/* This only be used for sama5d4 soc now */
}
/* empty stub to satisfy current lowlevel_init, can be removed any time */
void s_init(void)
{
}
void board_init_f(ulong dummy)
{
switch_to_main_crystal_osc();
@ -93,4 +98,9 @@ void s_init(void)
preloader_console_init();
mem_init();
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
board_init_r(NULL, 0);
}

40
arch/arm/mach-bcm283x/Kconfig Normal file
View File

@ -0,0 +1,40 @@
menu "Broadcom BCM283X family"
depends on ARCH_BCM283X
choice
prompt "Broadcom BCM283X board select"
config TARGET_RPI
bool "Raspberry Pi"
select CPU_ARM1176
config TARGET_RPI_2
bool "Raspberry Pi 2"
select CPU_V7
endchoice
config DM
default y
config DM_SERIAL
default y
config DM_GPIO
default y
config SYS_BOARD
default "rpi" if TARGET_RPI
default "rpi_2" if TARGET_RPI_2
config SYS_VENDOR
default "raspberrypi"
config SYS_SOC
default "bcm283x"
config SYS_CONFIG_NAME
default "rpi" if TARGET_RPI
default "rpi_2" if TARGET_RPI_2
endmenu

2
arch/arm/cpu/arm1176/bcm2835/Makefile → arch/arm/mach-bcm283x/Makefile
View File

@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0
#
obj-y := lowlevel_init.o
obj-$(CONFIG_TARGET_RPI) += lowlevel_init.o
obj-y += init.o reset.o timer.o mbox.o

0
arch/arm/include/asm/arch-bcm2835/gpio.h → arch/arm/mach-bcm283x/include/mach/gpio.h
View File

0
arch/arm/include/asm/arch-bcm2835/mbox.h → arch/arm/mach-bcm283x/include/mach/mbox.h
View File

0
arch/arm/include/asm/arch-bcm2835/sdhci.h → arch/arm/mach-bcm283x/include/mach/sdhci.h
View File

0
arch/arm/include/asm/arch-bcm2835/timer.h → arch/arm/mach-bcm283x/include/mach/timer.h
View File

0
arch/arm/include/asm/arch-bcm2835/wdog.h → arch/arm/mach-bcm283x/include/mach/wdog.h
View File

0
arch/arm/cpu/arm1176/bcm2835/init.c → arch/arm/mach-bcm283x/init.c
View File

0
arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S → arch/arm/mach-bcm283x/lowlevel_init.S
View File

0
arch/arm/cpu/arm1176/bcm2835/mbox.c → arch/arm/mach-bcm283x/mbox.c
View File

0
arch/arm/cpu/arm1176/bcm2835/reset.c → arch/arm/mach-bcm283x/reset.c
View File

0
arch/arm/cpu/arm1176/bcm2835/timer.c → arch/arm/mach-bcm283x/timer.c
View File

3
arch/arm/mach-tegra/Kconfig
View File

@ -17,9 +17,6 @@ config TEGRA124
endchoice
config SYS_MALLOC_F
default y
config SYS_MALLOC_F_LEN
default 0x1800

59
arch/arm/mach-tegra/pinmux-common.c
View File

@ -108,6 +108,8 @@
#define DRV_REG(group) _R(TEGRA_PMX_SOC_DRV_GROUP_BASE_REG + ((group) * 4))
#define MIPIPADCTRL_REG(group) _R(TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG + ((group) * 4))
/*
* We could force arch-tegraNN/pinmux.h to define all of these. However,
* that's a lot of defines, and for now it's manageable to just put a
@ -695,4 +697,59 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
for (i = 0; i < len; i++)
pinmux_config_drvgrp(&config[i]);
}
#endif /* TEGRA_PMX_HAS_DRVGRPS */
#endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
#define pmux_mipipadctrlgrp_isvalid(pd) (((pd) >= 0) && ((pd) < PMUX_MIPIPADCTRLGRP_COUNT))
static void pinmux_mipipadctrl_set_func(enum pmux_mipipadctrlgrp grp,
enum pmux_func func)
{
u32 *reg = MIPIPADCTRL_REG(grp);
int i, mux = -1;
u32 val;
if (func == PMUX_FUNC_DEFAULT)
return;
/* Error check grp and func */
assert(pmux_mipipadctrlgrp_isvalid(grp));
assert(pmux_func_isvalid(func));
if (func >= PMUX_FUNC_RSVD1) {
mux = (func - PMUX_FUNC_RSVD1) & 1;
} else {
/* Search for the appropriate function */
for (i = 0; i < 2; i++) {
if (tegra_soc_mipipadctrl_groups[grp].funcs[i]
== func) {
mux = i;
break;
}
}
}
assert(mux != -1);
val = readl(reg);
val &= ~(1 << 1);
val |= (mux << 1);
writel(val, reg);
}
static void pinmux_config_mipipadctrlgrp(const struct pmux_mipipadctrlgrp_config *config)
{
enum pmux_mipipadctrlgrp grp = config->grp;
pinmux_mipipadctrl_set_func(grp, config->func);
}
void pinmux_config_mipipadctrlgrp_table(
const struct pmux_mipipadctrlgrp_config *config, int len)
{
int i;
for (i = 0; i < len; i++)
pinmux_config_mipipadctrlgrp(&config[i]);
}
#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */

17
arch/arm/mach-tegra/tegra124/pinmux.c
View File

@ -304,3 +304,20 @@ static const struct pmux_pingrp_desc tegra124_pingroups[] = {
PIN(DP_HPD_PFF0, DP, RSVD2, RSVD3, RSVD4),
};
const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;
#define MIPIPADCTRL_GRP(grp, f0, f1) \
{ \
.funcs = { \
PMUX_FUNC_##f0, \
PMUX_FUNC_##f1, \
}, \
}
#define MIPIPADCTRL_RESERVED {}
static const struct pmux_mipipadctrlgrp_desc tegra124_mipipadctrl_groups[] = {
/* pin, f0, f1 */
/* Offset 0x820 */
MIPIPADCTRL_GRP(DSI_B, CSI, DSI_B),
};
const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = tegra124_mipipadctrl_groups;

4
arch/arm/mach-tegra/tegra20/Kconfig
View File

@ -30,7 +30,7 @@ config TARGET_VENTANA
config TARGET_WHISTLER
bool "NVIDIA Tegra20 Whistler evaluation board"
config TARGET_COLIBRI_T20_IRIS
config TARGET_COLIBRI_T20
bool "Toradex Colibri T20 board"
endchoice
@ -47,6 +47,6 @@ source "board/avionic-design/tec/Kconfig"
source "board/compulab/trimslice/Kconfig"
source "board/nvidia/ventana/Kconfig"
source "board/nvidia/whistler/Kconfig"
source "board/toradex/colibri_t20_iris/Kconfig"
source "board/toradex/colibri_t20/Kconfig"
endif

2
arch/arm/mach-tegra/tegra20/funcmux.c
View File

@ -252,12 +252,14 @@ int funcmux_select(enum periph_id id, int config)
break;
case FUNCMUX_NDFLASH_KBC_8_BIT:
pinmux_set_func(PMUX_PINGRP_KBCA, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCB, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCC, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCD, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCE, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCF, PMUX_FUNC_NAND);
pinmux_tristate_disable(PMUX_PINGRP_KBCA);
pinmux_tristate_disable(PMUX_PINGRP_KBCB);
pinmux_tristate_disable(PMUX_PINGRP_KBCC);
pinmux_tristate_disable(PMUX_PINGRP_KBCD);
pinmux_tristate_disable(PMUX_PINGRP_KBCE);

0
arch/arm/cpu/tegra210-common/pinmux.c → arch/arm/mach-tegra/tegra210/pinmux.c
View File

6
arch/arm/mach-uniphier/Kconfig
View File

@ -45,12 +45,6 @@ config DCC_MICRO_SUPPORT_CARD
endchoice
config SYS_MALLOC_F
default y
config SYS_MALLOC_F_LEN
default 0x400
config CMD_PINMON
bool "Enable boot mode pins monitor command"
default y

3
arch/avr32/config.mk
View File

@ -9,9 +9,6 @@ ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := avr32-linux-
endif
# avr32 has generic board support
__HAVE_ARCH_GENERIC_BOARD := y
CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000
PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got -mrelax

3
arch/blackfin/config.mk
View File

@ -20,9 +20,6 @@ CONFIG_BFIN_CPU := $(strip $(CONFIG_BFIN_CPU:"%"=%))
endif
CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%))
# Support generic board on Blackfin
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic
LDFLAGS_FINAL += --gc-sections

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