diff --git a/cpu/at32ap/at32ap7000/gpio.c b/cpu/at32ap/at32ap7000/gpio.c
index a5d3ea65d9..cab5bf0dd1 100644
--- a/cpu/at32ap/at32ap7000/gpio.c
+++ b/cpu/at32ap/at32ap7000/gpio.c
@@ -75,3 +75,53 @@ void gpio_enable_usart3(void)
 	gpio_select_periph_B(GPIO_PIN_PB18, 0);
 	gpio_select_periph_B(GPIO_PIN_PB19, 0);
 }
+
+void gpio_enable_macb0(void)
+{
+	gpio_select_periph_A(GPIO_PIN_PC3,  0);	/* TXD0	*/
+	gpio_select_periph_A(GPIO_PIN_PC4,  0);	/* TXD1	*/
+	gpio_select_periph_A(GPIO_PIN_PC7,  0);	/* TXEN	*/
+	gpio_select_periph_A(GPIO_PIN_PC8,  0);	/* TXCK */
+	gpio_select_periph_A(GPIO_PIN_PC9,  0);	/* RXD0	*/
+	gpio_select_periph_A(GPIO_PIN_PC10, 0);	/* RXD1	*/
+	gpio_select_periph_A(GPIO_PIN_PC13, 0);	/* RXER	*/
+	gpio_select_periph_A(GPIO_PIN_PC15, 0);	/* RXDV	*/
+	gpio_select_periph_A(GPIO_PIN_PC16, 0);	/* MDC	*/
+	gpio_select_periph_A(GPIO_PIN_PC17, 0);	/* MDIO	*/
+#if !defined(CONFIG_RMII)
+	gpio_select_periph_A(GPIO_PIN_PC0,  0);	/* COL	*/
+	gpio_select_periph_A(GPIO_PIN_PC1,  0);	/* CRS	*/
+	gpio_select_periph_A(GPIO_PIN_PC2,  0);	/* TXER	*/
+	gpio_select_periph_A(GPIO_PIN_PC5,  0);	/* TXD2	*/
+	gpio_select_periph_A(GPIO_PIN_PC6,  0);	/* TXD3 */
+	gpio_select_periph_A(GPIO_PIN_PC11, 0);	/* RXD2	*/
+	gpio_select_periph_A(GPIO_PIN_PC12, 0);	/* RXD3	*/
+	gpio_select_periph_A(GPIO_PIN_PC14, 0);	/* RXCK	*/
+	gpio_select_periph_A(GPIO_PIN_PC18, 0);	/* SPD	*/
+#endif
+}
+
+void gpio_enable_macb1(void)
+{
+	gpio_select_periph_B(GPIO_PIN_PD13, 0);	/* TXD0	*/
+	gpio_select_periph_B(GPIO_PIN_PD14, 0);	/* TXD1	*/
+	gpio_select_periph_B(GPIO_PIN_PD11, 0);	/* TXEN	*/
+	gpio_select_periph_B(GPIO_PIN_PD12, 0);	/* TXCK */
+	gpio_select_periph_B(GPIO_PIN_PD10, 0);	/* RXD0	*/
+	gpio_select_periph_B(GPIO_PIN_PD6,  0);	/* RXD1	*/
+	gpio_select_periph_B(GPIO_PIN_PD5,  0);	/* RXER	*/
+	gpio_select_periph_B(GPIO_PIN_PD4,  0);	/* RXDV	*/
+	gpio_select_periph_B(GPIO_PIN_PD3,  0);	/* MDC	*/
+	gpio_select_periph_B(GPIO_PIN_PD2,  0);	/* MDIO	*/
+#if !defined(CONFIG_RMII)
+	gpio_select_periph_B(GPIO_PIN_PC19, 0);	/* COL	*/
+	gpio_select_periph_B(GPIO_PIN_PC23, 0);	/* CRS	*/
+	gpio_select_periph_B(GPIO_PIN_PC26, 0);	/* TXER	*/
+	gpio_select_periph_B(GPIO_PIN_PC27, 0);	/* TXD2	*/
+	gpio_select_periph_B(GPIO_PIN_PC28, 0);	/* TXD3 */
+	gpio_select_periph_B(GPIO_PIN_PC29, 0);	/* RXD2	*/
+	gpio_select_periph_B(GPIO_PIN_PC30, 0);	/* RXD3	*/
+	gpio_select_periph_B(GPIO_PIN_PC24, 0);	/* RXCK	*/
+	gpio_select_periph_B(GPIO_PIN_PD15, 0);	/* SPD	*/
+#endif
+}
diff --git a/include/asm-avr32/arch-at32ap7000/clk.h b/include/asm-avr32/arch-at32ap7000/clk.h
index 4a25b17ad4..1ca5b48955 100644
--- a/include/asm-avr32/arch-at32ap7000/clk.h
+++ b/include/asm-avr32/arch-at32ap7000/clk.h
@@ -54,5 +54,13 @@ static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
 {
 	return get_pba_clk_rate();
 }
+static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
+{
+	return get_pbb_clk_rate();
+}
+static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)
+{
+	return get_hsb_clk_rate();
+}
 
 #endif /* __ASM_AVR32_ARCH_CLK_H__ */
diff --git a/include/asm-avr32/arch-at32ap7000/gpio.h b/include/asm-avr32/arch-at32ap7000/gpio.h
index adec2083f2..ca966e1342 100644
--- a/include/asm-avr32/arch-at32ap7000/gpio.h
+++ b/include/asm-avr32/arch-at32ap7000/gpio.h
@@ -205,6 +205,8 @@ void gpio_enable_usart0(void);
 void gpio_enable_usart1(void);
 void gpio_enable_usart2(void);
 void gpio_enable_usart3(void);
+void gpio_enable_macb0(void);
+void gpio_enable_macb1(void);
 
 #endif /* __ASM_AVR32_ARCH_GPIO_H__ */