* Patch by Rahul Shanbhag, 28 Jan 2004:
Fix flash protection/locking handling for OMAP1610 innovator board. * Patch by Rolf Peukert, 28 Jan 2004: fix flash write problems on CSB226 board (write with 32 bit bus width) * Patches by Mark Jonas, 16 Jan 2004: - fix rounding error when calculating baudrates for MPC5200 PSCs - make sure CFG_RAMBOOT and CFG_LOWBOOT are not enabled at the same time which is not supported
This commit is contained in:
parent
5653fc335a
commit
b98fff1d6a
11
CHANGELOG
11
CHANGELOG
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@ -2,6 +2,17 @@
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Changes since U-Boot 1.0.1:
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Changes since U-Boot 1.0.1:
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======================================================================
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======================================================================
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* Patch by Rahul Shanbhag, 28 Jan 2004:
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Fix flash protection/locking handling for OMAP1610 innovator board.
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* Patch by Rolf Peukert, 28 Jan 2004:
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fix flash write problems on CSB226 board (write with 32 bit bus width)
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* Patches by Mark Jonas, 16 Jan 2004:
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- fix rounding error when calculating baudrates for MPC5200 PSCs
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- make sure CFG_RAMBOOT and CFG_LOWBOOT are not enabled at the same
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time which is not supported
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* Patch by Yuli Barcohen, 26 Jan 2004:
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* Patch by Yuli Barcohen, 26 Jan 2004:
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Allow bzip2 compression for small memory footprint boards
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Allow bzip2 compression for small memory footprint boards
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@ -9,6 +9,9 @@
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* (C) Copyright 2002
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* (C) Copyright 2002
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* Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
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* Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
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*
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*
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* (C) Copyright 2003 (2 x 16 bit Flash bank patches)
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* Rolf Peukert, IMMS gGmbH, <rolf.peukert@imms.de>
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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*
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*
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@ -19,7 +22,7 @@
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*
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*
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* This program is distributed in the hope that it will be useful,
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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@ -32,9 +35,9 @@
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa-regs.h>
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#define FLASH_BANK_SIZE 0x02000000
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#define FLASH_BANK_SIZE 0x02000000
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#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */
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#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
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/**
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/**
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@ -51,19 +54,19 @@ ulong flash_init(void)
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
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ulong flashbase = 0;
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ulong flashbase = 0;
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flash_info[i].flash_id =
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flash_info[i].flash_id =
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(INTEL_MANUFACT & FLASH_VENDMASK) |
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(INTEL_MANUFACT & FLASH_VENDMASK) |
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(INTEL_ID_28F128J3 & FLASH_TYPEMASK);
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(INTEL_ID_28F128J3 & FLASH_TYPEMASK);
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flash_info[i].size = FLASH_BANK_SIZE;
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flash_info[i].size = FLASH_BANK_SIZE;
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flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
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flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
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memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
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memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
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switch (i) {
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switch (i) {
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case 0:
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case 0:
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flashbase = PHYS_FLASH_1;
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flashbase = PHYS_FLASH_1;
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break;
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break;
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default:
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default:
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panic("configured too many flash banks!\n");
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panic("configured too many flash banks!\n");
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break;
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break;
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}
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}
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for (j = 0; j < flash_info[i].sector_count; j++) {
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for (j = 0; j < flash_info[i].sector_count; j++) {
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flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
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flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
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@ -88,8 +91,6 @@ ulong flash_init(void)
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/**
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/**
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* flash_print_info: - print information about the flash situation
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* flash_print_info: - print information about the flash situation
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*
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* @param info:
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*/
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*/
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void flash_print_info (flash_info_t *info)
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void flash_print_info (flash_info_t *info)
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@ -99,23 +100,21 @@ void flash_print_info (flash_info_t *info)
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for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
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for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
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switch (info->flash_id & FLASH_VENDMASK) {
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switch (info->flash_id & FLASH_VENDMASK) {
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case (INTEL_MANUFACT & FLASH_VENDMASK):
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case (INTEL_MANUFACT & FLASH_VENDMASK):
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printf ("Intel: ");
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printf("Intel: ");
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break;
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break;
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default:
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default:
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printf ("Unknown Vendor ");
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printf("Unknown Vendor ");
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break;
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break;
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}
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
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case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
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printf("28F128J3 (128Mbit)\n");
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printf("28F128J3 (128Mbit)\n");
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break;
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break;
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default:
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default:
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printf("Unknown Chip Type\n");
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printf("Unknown Chip Type\n");
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return;
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return;
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}
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}
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printf(" Size: %ld MB in %d Sectors\n",
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printf(" Size: %ld MB in %d Sectors\n",
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@ -123,10 +122,10 @@ void flash_print_info (flash_info_t *info)
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printf(" Sector Start Addresses:");
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printf(" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 5) == 0) printf ("\n ");
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if ((i % 5) == 0) printf ("\n ");
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printf (" %08lX%s", info->start[i],
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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info->protect[i] ? " (RO)" : " ");
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}
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}
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printf ("\n");
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printf ("\n");
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info++;
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info++;
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@ -136,7 +135,6 @@ void flash_print_info (flash_info_t *info)
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/**
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/**
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* flash_erase: - erase flash sectors
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* flash_erase: - erase flash sectors
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*
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*/
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*/
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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@ -179,13 +177,13 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
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/* arm simple, non interrupt dependent timer */
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/* arm simple, non interrupt dependent timer */
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reset_timer_masked();
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reset_timer_masked();
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if (info->protect[sect] == 0) { /* not protected */
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if (info->protect[sect] == 0) { /* not protected */
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u32 * volatile addr = (u32 * volatile)(info->start[sect]);
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u32 * volatile addr = (u32 * volatile)(info->start[sect]);
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/* erase sector: */
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/* erase sector: */
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/* The strata flashs are aligned side by side on */
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/* The strata flashs are aligned side by side on */
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/* the data bus, so we have to write the commands */
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/* the data bus, so we have to write the commands */
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/* to both chips here: */
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/* to both chips here: */
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*addr = 0x00200020; /* erase setup */
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*addr = 0x00200020; /* erase setup */
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*addr = 0x00D000D0; /* erase confirm */
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*addr = 0x00D000D0; /* erase confirm */
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@ -198,19 +196,14 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
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goto outahere;
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goto outahere;
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}
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}
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}
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}
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*addr = 0x00500050; /* clear status register cmd. */
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*addr = 0x00500050; /* clear status register cmd. */
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*addr = 0x00FF00FF; /* resest to read mode */
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*addr = 0x00FF00FF; /* reset to read mode */
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}
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}
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printf("ok.\n");
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printf("ok.\n");
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}
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}
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if (ctrlc()) printf("User Interrupt!\n");
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if (ctrlc()) printf("User Interrupt!\n");
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outahere:
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outahere:
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/* allow flash to settle - wait 10 ms */
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/* allow flash to settle - wait 10 ms */
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udelay_masked(10000);
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udelay_masked(10000);
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@ -219,22 +212,19 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
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return rc;
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return rc;
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}
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}
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/**
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/**
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* write_word: - copy memory to flash
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* write_long: - copy memory to flash, assume a bank of 2 devices with 16bit each
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*
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* @param info:
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* @param dest:
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* @param data:
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* @return:
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*/
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*/
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static int write_word (flash_info_t *info, ulong dest, ushort data)
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static int write_long (flash_info_t *info, ulong dest, ulong data)
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{
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{
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u32 * volatile addr = (u32 * volatile)dest, val;
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u32 * volatile addr = (u32 * volatile)dest, val;
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int rc = ERR_OK;
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int rc = ERR_OK;
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int flag;
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int flag;
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/* read array command - just for the case... */
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*addr = 0x00FF00FF;
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/* Check if Flash is (sufficiently) erased */
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/* Check if Flash is (sufficiently) erased */
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if ((*addr & data) != data) return ERR_NOT_ERASED;
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if ((*addr & data) != data) return ERR_NOT_ERASED;
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@ -248,10 +238,10 @@ static int write_word (flash_info_t *info, ulong dest, ushort data)
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flag = disable_interrupts();
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flag = disable_interrupts();
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/* clear status register command */
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/* clear status register command */
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*addr = 0x50;
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*addr = 0x00500050;
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/* program set-up command */
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/* program set-up command */
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*addr = 0x40;
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*addr = 0x00400040;
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|
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||||||
/* latch address/data */
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/* latch address/data */
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*addr = data;
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*addr = data;
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||||||
|
@ -260,28 +250,30 @@ static int write_word (flash_info_t *info, ulong dest, ushort data)
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reset_timer_masked();
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reset_timer_masked();
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|
|
||||||
/* wait while polling the status register */
|
/* wait while polling the status register */
|
||||||
while(((val = *addr) & 0x80) != 0x80) {
|
while(((val = *addr) & 0x00800080) != 0x00800080) {
|
||||||
if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
|
if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
|
||||||
rc = ERR_TIMOUT;
|
rc = ERR_TIMOUT;
|
||||||
*addr = 0xB0; /* suspend program command */
|
/* suspend program command */
|
||||||
|
*addr = 0x00B000B0;
|
||||||
goto outahere;
|
goto outahere;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if(val & 0x1A) { /* check for error */
|
/* check for errors */
|
||||||
|
if(val & 0x001A001A) {
|
||||||
printf("\nFlash write error %02x at address %08lx\n",
|
printf("\nFlash write error %02x at address %08lx\n",
|
||||||
(int)val, (unsigned long)dest);
|
(int)val, (unsigned long)dest);
|
||||||
if(val & (1<<3)) {
|
if(val & 0x00080008) {
|
||||||
printf("Voltage range error.\n");
|
printf("Voltage range error.\n");
|
||||||
rc = ERR_PROG_ERROR;
|
rc = ERR_PROG_ERROR;
|
||||||
goto outahere;
|
goto outahere;
|
||||||
}
|
}
|
||||||
if(val & (1<<1)) {
|
if(val & 0x00020002) {
|
||||||
printf("Device protect error.\n");
|
printf("Device protect error.\n");
|
||||||
rc = ERR_PROTECTED;
|
rc = ERR_PROTECTED;
|
||||||
goto outahere;
|
goto outahere;
|
||||||
}
|
}
|
||||||
if(val & (1<<4)) {
|
if(val & 0x00100010) {
|
||||||
printf("Programming error.\n");
|
printf("Programming error.\n");
|
||||||
rc = ERR_PROG_ERROR;
|
rc = ERR_PROG_ERROR;
|
||||||
goto outahere;
|
goto outahere;
|
||||||
|
@ -290,9 +282,9 @@ static int write_word (flash_info_t *info, ulong dest, ushort data)
|
||||||
goto outahere;
|
goto outahere;
|
||||||
}
|
}
|
||||||
|
|
||||||
outahere:
|
outahere:
|
||||||
|
/* read array command */
|
||||||
*addr = 0xFF; /* read array command */
|
*addr = 0x00FF00FF;
|
||||||
if (flag) enable_interrupts();
|
if (flag) enable_interrupts();
|
||||||
|
|
||||||
return rc;
|
return rc;
|
||||||
|
@ -304,20 +296,21 @@ static int write_word (flash_info_t *info, ulong dest, ushort data)
|
||||||
*
|
*
|
||||||
* @param info:
|
* @param info:
|
||||||
* @param src: source of copy transaction
|
* @param src: source of copy transaction
|
||||||
* @param addr: where to copy to
|
* @param addr: where to copy to
|
||||||
* @param cnt: number of bytes to copy
|
* @param cnt: number of bytes to copy
|
||||||
*
|
*
|
||||||
* @return error code
|
* @return error code
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/* "long" version, uses 32bit words */
|
||||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||||
{
|
{
|
||||||
ulong cp, wp;
|
ulong cp, wp;
|
||||||
ushort data;
|
ulong data;
|
||||||
int l;
|
int l;
|
||||||
int i, rc;
|
int i, rc;
|
||||||
|
|
||||||
wp = (addr & ~1); /* get lower word aligned address */
|
wp = (addr & ~3); /* get lower word aligned address */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* handle unaligned start bytes
|
* handle unaligned start bytes
|
||||||
|
@ -325,35 +318,34 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||||
if ((l = addr - wp) != 0) {
|
if ((l = addr - wp) != 0) {
|
||||||
data = 0;
|
data = 0;
|
||||||
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
||||||
data = (data >> 8) | (*(uchar *)cp << 8);
|
data = (data >> 8) | (*(uchar *)cp << 24);
|
||||||
}
|
}
|
||||||
for (; i<2 && cnt>0; ++i) {
|
for (; i<4 && cnt>0; ++i) {
|
||||||
data = (data >> 8) | (*src++ << 8);
|
data = (data >> 8) | (*src++ << 24);
|
||||||
--cnt;
|
--cnt;
|
||||||
++cp;
|
++cp;
|
||||||
}
|
}
|
||||||
for (; cnt==0 && i<2; ++i, ++cp) {
|
for (; cnt==0 && i<4; ++i, ++cp) {
|
||||||
data = (data >> 8) | (*(uchar *)cp << 8);
|
data = (data >> 8) | (*(uchar *)cp << 24);
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((rc = write_word(info, wp, data)) != 0) {
|
if ((rc = write_long(info, wp, data)) != 0) {
|
||||||
return (rc);
|
return (rc);
|
||||||
}
|
}
|
||||||
wp += 2;
|
wp += 4;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* handle word aligned part
|
* handle word aligned part
|
||||||
*/
|
*/
|
||||||
while (cnt >= 2) {
|
while (cnt >= 4) {
|
||||||
/* data = *((vushort*)src); */
|
data = *((ulong*)src);
|
||||||
data = *((ushort*)src);
|
if ((rc = write_long(info, wp, data)) != 0) {
|
||||||
if ((rc = write_word(info, wp, data)) != 0) {
|
|
||||||
return (rc);
|
return (rc);
|
||||||
}
|
}
|
||||||
src += 2;
|
src += 4;
|
||||||
wp += 2;
|
wp += 4;
|
||||||
cnt -= 2;
|
cnt -= 4;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cnt == 0) return ERR_OK;
|
if (cnt == 0) return ERR_OK;
|
||||||
|
@ -362,13 +354,13 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||||
* handle unaligned tail bytes
|
* handle unaligned tail bytes
|
||||||
*/
|
*/
|
||||||
data = 0;
|
data = 0;
|
||||||
for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
|
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
|
||||||
data = (data >> 8) | (*src++ << 8);
|
data = (data >> 8) | (*src++ << 24);
|
||||||
--cnt;
|
--cnt;
|
||||||
}
|
}
|
||||||
for (; i<2; ++i, ++cp) {
|
for (; i<4; ++i, ++cp) {
|
||||||
data = (data >> 8) | (*(uchar *)cp << 8);
|
data = (data >> 8) | (*(uchar *)cp << 24);
|
||||||
}
|
}
|
||||||
|
|
||||||
return write_word(info, wp, data);
|
return write_long(info, wp, data);
|
||||||
}
|
}
|
||||||
|
|
|
@ -93,6 +93,8 @@ unsigned long flash_init (void)
|
||||||
case 0:
|
case 0:
|
||||||
flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
|
flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
|
||||||
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
|
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
|
||||||
|
/* to reset the lock bit */
|
||||||
|
flash_unlock(&flash_info[i]);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
panic ("configured too many flash banks!\n");
|
panic ("configured too many flash banks!\n");
|
||||||
|
@ -114,6 +116,19 @@ unsigned long flash_init (void)
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
*/
|
||||||
|
flash_unlock(flash_info_t * info)
|
||||||
|
{
|
||||||
|
int j;
|
||||||
|
for (j=2;j<CFG_MAX_FLASH_SECT;j++){
|
||||||
|
FPWV *addr = (FPWV *) (info->start[j]);
|
||||||
|
flash_unprotect_sectors (addr);
|
||||||
|
*addr = (FPW) 0x00500050;/* clear status register */
|
||||||
|
*addr = (FPW) 0x00FF00FF;/* resest to read mode */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
static void flash_get_offsets (ulong base, flash_info_t * info)
|
static void flash_get_offsets (ulong base, flash_info_t * info)
|
||||||
|
@ -447,7 +462,6 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
|
||||||
printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
|
printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
|
||||||
return (2);
|
return (2);
|
||||||
}
|
}
|
||||||
flash_unprotect_sectors (addr);
|
|
||||||
/* Disable interrupts which might cause a timeout here */
|
/* Disable interrupts which might cause a timeout here */
|
||||||
flag = disable_interrupts ();
|
flag = disable_interrupts ();
|
||||||
*addr = (FPW) 0x00400040; /* write setup */
|
*addr = (FPW) 0x00400040; /* write setup */
|
||||||
|
|
|
@ -67,10 +67,10 @@ int serial_init (void)
|
||||||
/* select clock sources */
|
/* select clock sources */
|
||||||
#if defined(CONFIG_MGT5100)
|
#if defined(CONFIG_MGT5100)
|
||||||
psc->psc_clock_select = 0xdd00;
|
psc->psc_clock_select = 0xdd00;
|
||||||
baseclk = CFG_MPC5XXX_CLKIN / 32;
|
baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32;
|
||||||
#elif defined(CONFIG_MPC5200)
|
#elif defined(CONFIG_MPC5200)
|
||||||
psc->psc_clock_select = 0;
|
psc->psc_clock_select = 0;
|
||||||
baseclk = gd->ipb_clk / 32;
|
baseclk = (gd->ipb_clk + 16) / 32;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* switch to UART mode */
|
/* switch to UART mode */
|
||||||
|
@ -85,8 +85,8 @@ int serial_init (void)
|
||||||
psc->mode = PSC_MODE_ONE_STOP;
|
psc->mode = PSC_MODE_ONE_STOP;
|
||||||
|
|
||||||
/* set up UART divisor */
|
/* set up UART divisor */
|
||||||
div = baseclk / gd->baudrate;
|
div = (baseclk + (gd->baudrate/2)) / gd->baudrate;
|
||||||
psc->ctur = div >> 8;
|
psc->ctur = (div >> 8) & 0xff;
|
||||||
psc->ctlr = div & 0xff;
|
psc->ctlr = div & 0xff;
|
||||||
|
|
||||||
/* disable all interrupts */
|
/* disable all interrupts */
|
||||||
|
|
|
@ -104,6 +104,9 @@ boot_warm:
|
||||||
mfmsr r5 /* save msr contents */
|
mfmsr r5 /* save msr contents */
|
||||||
|
|
||||||
#if defined(CFG_LOWBOOT)
|
#if defined(CFG_LOWBOOT)
|
||||||
|
#if defined(CFG_RAMBOOT)
|
||||||
|
#error CFG_LOWBOOT is incompatible with CFG_RAMBOOT
|
||||||
|
#endif /* CFG_RAMBOOT */
|
||||||
lis r4, CFG_DEFAULT_MBAR@h
|
lis r4, CFG_DEFAULT_MBAR@h
|
||||||
lis r3, 0x0000FF00@h
|
lis r3, 0x0000FF00@h
|
||||||
ori r3, r3, 0x0000FF00@l
|
ori r3, r3, 0x0000FF00@l
|
||||||
|
|
Loading…
Reference in New Issue