Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
This commit is contained in:
Albert ARIBAUD
commit
be08abc242
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@ -663,6 +663,7 @@ Fabio Estevam <fabio.estevam@freescale.com>
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|||
mx53smd i.MX53
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||||
mx6qsabresd i.MX6Q
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||||
mx6qsabreauto i.MX6Q
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wandboard i.MX6DL/S
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||||
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Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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@ -46,17 +46,17 @@ static uint32_t dram_vals[] = {
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0x00000000, 0x00000000, 0x00010101, 0x01010101,
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0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
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0x00000100, 0x00000100, 0x00000000, 0x00000002,
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0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
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0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
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0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
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0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
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0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
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0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
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0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
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0x00000003, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000612, 0x01000F02,
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0x06120612, 0x00000200, 0x00020007, 0xf5014b27,
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0xf5014b27, 0xf5014b27, 0xf5014b27, 0x07000300,
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0x07000300, 0x07000300, 0x07000300, 0x00000006,
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0x06120612, 0x00000200, 0x00020007, 0xf4004a27,
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0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07000300,
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0x07000300, 0x07400300, 0x07400300, 0x00000005,
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0x00000000, 0x00000000, 0x01000000, 0x01020408,
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0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
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0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
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@ -77,14 +77,14 @@ static uint32_t dram_vals[] = {
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00010000, 0x00020304,
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0x00000004, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00010000, 0x00030404,
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0x00000003, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x01010000,
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0x01000000, 0x03030000, 0x00010303, 0x01020202,
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0x00000000, 0x02040303, 0x21002103, 0x00061200,
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0x06120612, 0x04320432, 0x04320432, 0x00040004,
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0x06120612, 0x04420442, 0x04420442, 0x00040004,
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0x00040004, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00010001
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0x00000000, 0xffffffff
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/*
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* i.MX23 DDR at 133MHz
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@ -61,6 +61,18 @@ u32 get_cpu_rev(void)
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return (type << 12) | (reg + 0x10);
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}
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#ifdef CONFIG_REVISION_TAG
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u32 __weak get_board_rev(void)
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{
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u32 cpurev = get_cpu_rev();
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u32 type = ((cpurev >> 12) & 0xff);
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if (type == MXC_CPU_MX6SOLO)
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cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF);
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return cpurev;
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}
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#endif
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void init_aips(void)
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{
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struct aipstz_regs *aips1, *aips2;
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@ -32,6 +32,7 @@ COBJS-y = iomux-v3.o timer.o cpu.o speed.o
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COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
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endif
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COBJS-$(CONFIG_CMD_BMODE) += cmd_bmode.o
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COBJS-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
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COBJS := $(sort $(COBJS-y))
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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@ -0,0 +1,37 @@
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/*
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* Copyright (C) 2012 Boundary Devices Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
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||||
* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||
* GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
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||||
* along with this program; if not, write to the Free Software
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||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/io.h>
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static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
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u8 reg = readb(&hdmi->phy_stat0) & HDMI_PHY_HPD;
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return (reg&HDMI_PHY_HPD) ? 0 : 1;
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}
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U_BOOT_CMD(hdmidet, 1, 1, do_hdmidet,
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"detect HDMI monitor",
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""
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);
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@ -48,9 +48,6 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
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DECLARE_GLOBAL_DATA_PTR;
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#define timestamp (gd->arch.tbl)
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#define lastinc (gd->arch.lastinc)
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static inline unsigned long long tick_to_time(unsigned long long tick)
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{
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tick *= CONFIG_SYS_HZ;
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@ -70,7 +67,6 @@ static inline unsigned long long us_to_tick(unsigned long long usec)
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int timer_init(void)
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{
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int i;
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ulong val;
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/* setup GP Timer 1 */
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__raw_writel(GPTCR_SWR, &cur_gpt->control);
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@ -85,9 +81,8 @@ int timer_init(void)
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i = __raw_readl(&cur_gpt->control);
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__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
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val = __raw_readl(&cur_gpt->counter);
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lastinc = val / (MXC_CLK32 / CONFIG_SYS_HZ);
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timestamp = 0;
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gd->arch.tbl = __raw_readl(&cur_gpt->counter);
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gd->arch.tbu = 0;
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return 0;
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}
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@ -96,18 +91,11 @@ unsigned long long get_ticks(void)
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{
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ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
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if (now >= lastinc) {
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/*
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* normal mode (non roll)
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* move stamp forward with absolut diff ticks
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*/
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timestamp += (now - lastinc);
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} else {
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/* we have rollover of incrementer */
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timestamp += (0xFFFFFFFF - lastinc) + now;
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}
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lastinc = now;
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return timestamp;
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/* increment tbu if tbl has rolled over */
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if (now < gd->arch.tbl)
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gd->arch.tbu++;
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gd->arch.tbl = now;
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return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
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}
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ulong get_timer_masked(void)
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@ -50,6 +50,8 @@
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#define NO_MUX_I 0
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#define NO_PAD_I 0
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enum {
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MX6_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0360, 0x004C, 3, 0x0000, 0, 0),
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MX6_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0364, 0x0050, 3, 0x08FC, 1, 0),
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MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK = IOMUX_PAD(0x03B0, 0x009C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
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MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15 = IOMUX_PAD(0x03B4, 0x00A0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
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MX6_PAD_DI0_PIN2__IPU1_DI0_PIN2 = IOMUX_PAD(0x03B8, 0x00A4, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
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@ -90,6 +92,7 @@ enum {
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MX6_PAD_EIM_D27__UART2_RXD = IOMUX_PAD(0x0540, 0x0170, 4, 0x0904, 1, 0),
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MX6_PAD_EIM_D28__I2C1_SDA = IOMUX_PAD(0x0544, 0x0174, 1 | IOMUX_CONFIG_SION, 0x086C, 1, 0),
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MX6_PAD_EIM_D28__GPIO_3_28 = IOMUX_PAD(0x0544, 0x0174, 5, 0x0000, 0, 0),
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MX6_PAD_EIM_D29__GPIO_3_29 = IOMUX_PAD(0x0548, 0x0178, 5, 0x0000, 0, 0),
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MX6_PAD_ENET_MDC__ENET_MDC = IOMUX_PAD(0x05B8, 0x01E8, 1, 0x0000, 0, 0),
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MX6_PAD_ENET_MDIO__ENET_MDIO = IOMUX_PAD(0x05BC, 0x01EC, 1, 0x0810, 0, 0),
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MX6_PAD_ENET_REF_CLK__ENET_TX_CLK = IOMUX_PAD(0x05C0, 0x01F0, 1, 0x0000, 0, 0),
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@ -304,6 +304,9 @@ int board_mmc_init(bd_t *bis)
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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usdhc_cfg[0].max_bus_width = 4;
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usdhc_cfg[1].max_bus_width = 4;
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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switch (index) {
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case 0:
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@ -328,11 +331,6 @@ int board_mmc_init(bd_t *bis)
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}
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#endif
|
||||
|
||||
u32 get_board_rev(void)
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{
|
||||
return 0x63000;
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}
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||||
#ifdef CONFIG_MXC_SPI
|
||||
iomux_v3_cfg_t const ecspi1_pads[] = {
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||||
/* SS1 */
|
||||
|
|
|
|||
|
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@ -26,6 +26,7 @@
|
|||
#include <asm/errno.h>
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#include <asm/gpio.h>
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||||
#include <asm/imx-common/iomux-v3.h>
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#include <asm/imx-common/boot_mode.h>
|
||||
#include <mmc.h>
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||||
#include <fsl_esdhc.h>
|
||||
#include <miiphy.h>
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||||
|
|
@ -216,6 +217,23 @@ int board_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_BMODE
|
||||
static const struct boot_mode board_boot_modes[] = {
|
||||
/* 4 bit bus width */
|
||||
{"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
|
||||
{NULL, 0},
|
||||
};
|
||||
#endif
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
#ifdef CONFIG_CMD_BMODE
|
||||
add_board_boot_modes(board_boot_modes);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int checkboard(void)
|
||||
{
|
||||
int rev = mx6sabre_rev();
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ enter the following commands:
|
|||
|
||||
MX6Q SABRELITE U-Boot > mmc dev 0
|
||||
MX6Q SABRELITE U-Boot > mmc read 0x10800000 0 200
|
||||
MX6Q SABRELITE U-Boot > sf probe 1
|
||||
MX6Q SABRELITE U-Boot > sf probe
|
||||
MX6Q SABRELITE U-Boot > sf erase 0 0x40000
|
||||
MX6Q SABRELITE U-Boot > sf write 0x10800000 0 0x40000
|
||||
|
||||
|
|
@ -63,7 +63,7 @@ https://wiki.linaro.org/Boards/MX6QSabreLite
|
|||
To build U-Boot for the SabreLite board:
|
||||
|
||||
make mx6qsabrelite_config
|
||||
make u-boot.imx
|
||||
make
|
||||
|
||||
To copy the resulting u-boot.imx to the SD card:
|
||||
|
||||
|
|
|
|||
|
|
@ -274,6 +274,9 @@ int board_mmc_init(bd_t *bis)
|
|||
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
|
||||
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
|
||||
|
||||
usdhc_cfg[0].max_bus_width = 4;
|
||||
usdhc_cfg[1].max_bus_width = 4;
|
||||
|
||||
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
|
||||
switch (index) {
|
||||
case 0:
|
||||
|
|
@ -298,11 +301,6 @@ int board_mmc_init(bd_t *bis)
|
|||
}
|
||||
#endif
|
||||
|
||||
u32 get_board_rev(void)
|
||||
{
|
||||
return 0x63000 ;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MXC_SPI
|
||||
iomux_v3_cfg_t const ecspi1_pads[] = {
|
||||
/* SS1 */
|
||||
|
|
|
|||
|
|
@ -26,10 +26,12 @@
|
|||
#include <asm/errno.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/imx-common/iomux-v3.h>
|
||||
#include <asm/imx-common/boot_mode.h>
|
||||
#include <mmc.h>
|
||||
#include <fsl_esdhc.h>
|
||||
#include <miiphy.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
|
||||
|
|
@ -145,21 +147,34 @@ struct fsl_esdhc_cfg usdhc_cfg[3] = {
|
|||
int board_mmc_getcd(struct mmc *mmc)
|
||||
{
|
||||
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
|
||||
int ret = 0;
|
||||
|
||||
switch (cfg->esdhc_base) {
|
||||
case USDHC2_BASE_ADDR:
|
||||
return !gpio_get_value(USDHC2_CD_GPIO);
|
||||
ret = !gpio_get_value(USDHC2_CD_GPIO);
|
||||
break;
|
||||
case USDHC3_BASE_ADDR:
|
||||
return !gpio_get_value(USDHC3_CD_GPIO);
|
||||
default:
|
||||
return 1; /* eMMC/uSDHC4 is always present */
|
||||
ret = !gpio_get_value(USDHC3_CD_GPIO);
|
||||
break;
|
||||
case USDHC4_BASE_ADDR:
|
||||
ret = 1; /* eMMC/uSDHC4 is always present */
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int board_mmc_init(bd_t *bis)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* According to the board_mmc_init() the following map is done:
|
||||
* (U-boot device node) (Physical Port)
|
||||
* mmc0 SD2
|
||||
* mmc1 SD3
|
||||
* mmc2 eMMC
|
||||
*/
|
||||
for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
|
||||
switch (i) {
|
||||
case 0:
|
||||
|
|
@ -239,11 +254,6 @@ int board_eth_init(bd_t *bis)
|
|||
return 0;
|
||||
}
|
||||
|
||||
u32 get_board_rev(void)
|
||||
{
|
||||
return 0x63000;
|
||||
}
|
||||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
setup_iomux_uart();
|
||||
|
|
@ -259,6 +269,26 @@ int board_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_BMODE
|
||||
static const struct boot_mode board_boot_modes[] = {
|
||||
/* 4 bit bus width */
|
||||
{"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
|
||||
{"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
|
||||
/* 8 bit bus width */
|
||||
{"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
|
||||
{NULL, 0},
|
||||
};
|
||||
#endif
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
#ifdef CONFIG_CMD_BMODE
|
||||
add_board_boot_modes(board_boot_modes);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int checkboard(void)
|
||||
{
|
||||
puts("Board: MX6Q-SabreSD\n");
|
||||
|
|
|
|||
|
|
@ -0,0 +1,29 @@
|
|||
#
|
||||
# (C) Copyright 2013 Freescale Semiconductor, Inc.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(BOARD).o
|
||||
|
||||
COBJS := wandboard.o
|
||||
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
U-Boot for Wandboard
|
||||
--------------------
|
||||
|
||||
This file contains information for the port of U-Boot to the Wandboard.
|
||||
|
||||
Wandboard is a development board that has two variants: one version based
|
||||
on mx6 dual lite and another one based on mx6 solo.
|
||||
|
||||
For more details about Wandboard, please refer to:
|
||||
http://www.wandboard.org/
|
||||
|
||||
Building U-boot for Wandboard
|
||||
-----------------------------
|
||||
|
||||
To build U-Boot for the Wandboard Dual Lite version:
|
||||
|
||||
$ make wanboard_dl_config
|
||||
$ make
|
||||
|
||||
To build U-Boot for the Wandboard Solo version:
|
||||
|
||||
$ make wanboard_solo_config
|
||||
$ make
|
||||
|
||||
Flashing U-boot into the SD card
|
||||
--------------------------------
|
||||
|
||||
- After the 'make' command completes, the generated 'u-boot.imx' binary must be
|
||||
flashed into the SD card;
|
||||
|
||||
$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2; sync
|
||||
|
||||
(Note - the SD card node may vary, so adjust this as needed).
|
||||
|
||||
- Insert the SD card into the slot located in the bottom of the board (same side
|
||||
as the mx6 processor)
|
||||
|
||||
- Connect the serial cable to the host PC
|
||||
|
||||
- Power up the board and U-boot messages will appear in the serial console.
|
||||
|
|
@ -0,0 +1,178 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Author: Fabio Estevam <fabio.estevam@freescale.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/iomux.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/mx6-pins.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/imx-common/iomux-v3.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <common.h>
|
||||
#include <fsl_esdhc.h>
|
||||
#include <mmc.h>
|
||||
#include <miiphy.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
|
||||
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
|
||||
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
|
||||
|
||||
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
|
||||
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
|
||||
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
|
||||
|
||||
#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
|
||||
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
|
||||
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
|
||||
|
||||
#define ETH_PHY_RESET IMX_GPIO_NR(3, 29)
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
gd->ram_size = CONFIG_DDR_MB * SZ_1M;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static iomux_v3_cfg_t const uart1_pads[] = {
|
||||
MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
|
||||
MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
|
||||
};
|
||||
|
||||
static iomux_v3_cfg_t const usdhc3_pads[] = {
|
||||
MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
};
|
||||
|
||||
static iomux_v3_cfg_t const enet_pads[] = {
|
||||
MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
|
||||
/* AR8031 PHY Reset */
|
||||
MX6_PAD_EIM_D29__GPIO_3_29 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
};
|
||||
|
||||
static void setup_iomux_uart(void)
|
||||
{
|
||||
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
|
||||
}
|
||||
|
||||
static void setup_iomux_enet(void)
|
||||
{
|
||||
imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
|
||||
|
||||
/* Reset AR8031 PHY */
|
||||
gpio_direction_output(ETH_PHY_RESET, 0);
|
||||
udelay(500);
|
||||
gpio_set_value(ETH_PHY_RESET, 1);
|
||||
}
|
||||
|
||||
static struct fsl_esdhc_cfg usdhc_cfg[1] = {
|
||||
{USDHC3_BASE_ADDR},
|
||||
};
|
||||
|
||||
int board_mmc_init(bd_t *bis)
|
||||
{
|
||||
imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
|
||||
|
||||
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
|
||||
usdhc_cfg[0].max_bus_width = 4;
|
||||
|
||||
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
|
||||
}
|
||||
|
||||
static int mx6_rgmii_rework(struct phy_device *phydev)
|
||||
{
|
||||
unsigned short val;
|
||||
|
||||
/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
|
||||
|
||||
val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
|
||||
val &= 0xffe3;
|
||||
val |= 0x18;
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
|
||||
|
||||
/* introduce tx clock delay */
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
|
||||
val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
|
||||
val |= 0x0100;
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_phy_config(struct phy_device *phydev)
|
||||
{
|
||||
mx6_rgmii_rework(phydev);
|
||||
|
||||
if (phydev->drv->config)
|
||||
phydev->drv->config(phydev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int ret;
|
||||
|
||||
setup_iomux_enet();
|
||||
|
||||
ret = cpu_eth_init(bis);
|
||||
if (ret)
|
||||
printf("FEC MXC: %s:failed\n", __func__);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
setup_iomux_uart();
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
/* address of boot parameters */
|
||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int checkboard(void)
|
||||
{
|
||||
puts("Board: Wandboard\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -196,7 +196,8 @@ mx23_olinuxino arm arm926ejs mx23_olinuxino olimex
|
|||
apx4devkit arm arm926ejs apx4devkit bluegiga mxs apx4devkit
|
||||
mx23evk arm arm926ejs mx23evk freescale mxs mx23evk
|
||||
m28evk arm arm926ejs m28evk denx mxs m28evk
|
||||
mx28evk arm arm926ejs mx28evk freescale mxs mx28evk
|
||||
mx28evk arm arm926ejs mx28evk freescale mxs mx28evk:ENV_IS_IN_MMC
|
||||
mx28evk_nand arm arm926ejs mx28evk freescale mxs mx28evk:ENV_IS_IN_NAND
|
||||
sc_sps_1 arm arm926ejs sc_sps_1 schulercontrol mxs
|
||||
nhk8815 arm arm926ejs nhk8815 st nomadik
|
||||
nhk8815_onenand arm arm926ejs nhk8815 st nomadik nhk8815:BOOT_ONENAND
|
||||
|
|
@ -264,6 +265,8 @@ nitrogen6q arm armv7 nitrogen6x boundar
|
|||
nitrogen6q2g arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048
|
||||
nitrogen6s arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512
|
||||
nitrogen6s1g arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024
|
||||
wandboard_dl arm armv7 wandboard - mx6 wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024
|
||||
wandboard_solo arm armv7 wandboard - mx6 wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512
|
||||
cm_t35 arm armv7 cm_t35 - omap3
|
||||
omap3_overo arm armv7 overo - omap3
|
||||
omap3_pandora arm armv7 pandora - omap3
|
||||
|
|
|
|||
|
|
@ -23,6 +23,24 @@ To boot MX28EVK from an SD card, set the boot mode DIP switches as:
|
|||
* VDD 5V: To the left (off)
|
||||
* Hold Button: Down (off)
|
||||
|
||||
|
||||
Environment Storage
|
||||
-------------------
|
||||
|
||||
There are two targets for mx28evk:
|
||||
|
||||
"make mx28evk_config" - store enviroment variables into MMC
|
||||
|
||||
or
|
||||
|
||||
"make mx28evk_nand_config" - store enviroment variables into NAND flash
|
||||
|
||||
Choose the target accordingly.
|
||||
|
||||
Note: The mx28evk board does not come with a NAND flash populated from the
|
||||
factory. It comes with an empty slot (U23), which allows the insertion of a
|
||||
48-pin TSOP flash device.
|
||||
|
||||
Follow the instructions from doc/README.mx28_common to generate a bootable SD
|
||||
card.
|
||||
|
||||
|
|
|
|||
|
|
@ -580,6 +580,13 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
|
|||
|
||||
mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
|
||||
|
||||
if (cfg->max_bus_width > 0) {
|
||||
if (cfg->max_bus_width < 8)
|
||||
mmc->host_caps &= ~MMC_MODE_8BIT;
|
||||
if (cfg->max_bus_width < 4)
|
||||
mmc->host_caps &= ~MMC_MODE_4BIT;
|
||||
}
|
||||
|
||||
if (caps & ESDHC_HOSTCAPBLT_HSS)
|
||||
mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
|
||||
|
||||
|
|
|
|||
|
|
@ -137,11 +137,11 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
|
|||
return -1;
|
||||
}
|
||||
|
||||
reg_ctrl = reg_read(®s->ctrl);
|
||||
|
||||
/* Reset spi */
|
||||
reg_write(®s->ctrl, (reg_ctrl & ~MXC_CSPICTRL_EN));
|
||||
reg_write(®s->ctrl, (reg_ctrl | MXC_CSPICTRL_EN));
|
||||
reg_write(®s->ctrl, 0);
|
||||
reg_write(®s->ctrl, MXC_CSPICTRL_EN);
|
||||
|
||||
reg_ctrl = reg_read(®s->ctrl);
|
||||
|
||||
/*
|
||||
* The following computation is taken directly from Freescale's code.
|
||||
|
|
|
|||
|
|
@ -24,57 +24,57 @@
|
|||
/*
|
||||
* SoC configurations
|
||||
*/
|
||||
#define CONFIG_MX23 /* i.MX23 SoC */
|
||||
#define CONFIG_MXS_GPIO /* GPIO control */
|
||||
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
|
||||
#define CONFIG_MX23 /* i.MX23 SoC */
|
||||
#define CONFIG_MXS_GPIO /* GPIO control */
|
||||
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
|
||||
|
||||
#define CONFIG_MACH_TYPE 4105
|
||||
#define CONFIG_MACH_TYPE 4105
|
||||
|
||||
#include <asm/arch/regs-base.h>
|
||||
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_ARCH_MISC_INIT
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_ARCH_MISC_INIT
|
||||
|
||||
/*
|
||||
* SPL
|
||||
*/
|
||||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
|
||||
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
|
||||
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
|
||||
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
#define CONFIG_SPL_GPIO_SUPPORT
|
||||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
|
||||
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
|
||||
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
|
||||
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
#define CONFIG_SPL_GPIO_SUPPORT
|
||||
|
||||
/*
|
||||
* U-Boot Commands
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
#define CONFIG_CMD_CACHE
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_GPIO
|
||||
#define CONFIG_CMD_LED
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_CMD_CACHE
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_GPIO
|
||||
#define CONFIG_CMD_LED
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_USB
|
||||
|
||||
/*
|
||||
* Memory configurations
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0x40000000 /* Base address */
|
||||
#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */
|
||||
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
|
||||
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
|
||||
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0x40000000 /* Base address */
|
||||
#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */
|
||||
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
|
||||
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
|
||||
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
/* Point initial SP in SRAM so SPL can use it too. */
|
||||
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
|
||||
|
|
@ -89,49 +89,49 @@
|
|||
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
|
||||
* binary. In case there was more of this mess, 0x100 bytes are skipped.
|
||||
*/
|
||||
#define CONFIG_SYS_TEXT_BASE 0x40000100
|
||||
#define CONFIG_SYS_TEXT_BASE 0x40000100
|
||||
|
||||
/*
|
||||
* U-Boot general configurations
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_PROMPT "=> "
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
|
||||
#define CONFIG_SYS_PBSIZE \
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_PROMPT "=> "
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
|
||||
#define CONFIG_SYS_PBSIZE \
|
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
/* Print buffer size */
|
||||
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
/* Boot argument buffer size */
|
||||
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
|
||||
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
|
||||
#define CONFIG_CMDLINE_EDITING /* Command history etc */
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
|
||||
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
|
||||
#define CONFIG_CMDLINE_EDITING /* Command history etc */
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
|
||||
/*
|
||||
* Serial Driver
|
||||
*/
|
||||
#define CONFIG_PL011_SERIAL
|
||||
#define CONFIG_PL011_CLOCK 24000000
|
||||
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
|
||||
#define CONFIG_CONS_INDEX 0
|
||||
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
|
||||
#define CONFIG_PL011_SERIAL
|
||||
#define CONFIG_PL011_CLOCK 24000000
|
||||
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
|
||||
#define CONFIG_CONS_INDEX 0
|
||||
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
|
||||
|
||||
/*
|
||||
* Status LED
|
||||
*/
|
||||
#define CONFIG_STATUS_LED
|
||||
#define CONFIG_GPIO_LED
|
||||
#define CONFIG_BOARD_SPECIFIC_LED
|
||||
#define STATUS_LED_BOOT 0
|
||||
#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1
|
||||
#define STATUS_LED_STATE STATUS_LED_ON
|
||||
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
|
||||
#define CONFIG_STATUS_LED
|
||||
#define CONFIG_GPIO_LED
|
||||
#define CONFIG_BOARD_SPECIFIC_LED
|
||||
#define STATUS_LED_BOOT 0
|
||||
#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1
|
||||
#define STATUS_LED_STATE STATUS_LED_ON
|
||||
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
|
||||
|
||||
/*
|
||||
* MMC Driver
|
||||
*/
|
||||
#ifdef CONFIG_CMD_MMC
|
||||
#ifdef CONFIG_CMD_MMC
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_BOUNCE_BUFFER
|
||||
#define CONFIG_GENERIC_MMC
|
||||
|
|
@ -144,41 +144,41 @@
|
|||
#define CONFIG_APBH_DMA
|
||||
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MXS
|
||||
#define CONFIG_EHCI_MXS_PORT0
|
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
|
||||
#define CONFIG_EHCI_IS_TDI
|
||||
#define CONFIG_USB_STORAGE
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MXS
|
||||
#define CONFIG_EHCI_MXS_PORT0
|
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
|
||||
#define CONFIG_EHCI_IS_TDI
|
||||
#define CONFIG_USB_STORAGE
|
||||
#endif
|
||||
|
||||
/* Ethernet */
|
||||
#ifdef CONFIG_CMD_NET
|
||||
#define CONFIG_USB_HOST_ETHER
|
||||
#define CONFIG_USB_ETHER_SMSC95XX
|
||||
#ifdef CONFIG_CMD_NET
|
||||
#define CONFIG_USB_HOST_ETHER
|
||||
#define CONFIG_USB_ETHER_SMSC95XX
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Boot Linux
|
||||
*/
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
#define CONFIG_LOADADDR 0x42000000
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
#define CONFIG_OF_LIBFDT
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
#define CONFIG_LOADADDR 0x42000000
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
||||
/*
|
||||
* Environment
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#ifdef CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OFFSET (256 * 1024)
|
||||
#define CONFIG_ENV_SIZE (16 * 1024)
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#ifdef CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OFFSET (256 * 1024)
|
||||
#define CONFIG_ENV_SIZE (16 * 1024)
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -227,7 +227,7 @@
|
|||
"else " \
|
||||
"bootm; " \
|
||||
"fi;\0" \
|
||||
"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
|
||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/nfs " \
|
||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||
"netboot=echo Booting from net ...; " \
|
||||
|
|
|
|||
|
|
@ -124,6 +124,10 @@
|
|||
#define CONFIG_SYS_I2C_BASE IMX_I2C_BASE
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
|
||||
/* RTC */
|
||||
#define CONFIG_RTC_IMXDI
|
||||
#define CONFIG_CMD_DATE
|
||||
|
||||
/* Ethernet Configs */
|
||||
|
||||
#define CONFIG_CMD_PING
|
||||
|
|
|
|||
|
|
@ -19,9 +19,7 @@
|
|||
#ifndef __MX28EVK_CONFIG_H__
|
||||
#define __MX28EVK_CONFIG_H__
|
||||
|
||||
/*
|
||||
* SoC configurations
|
||||
*/
|
||||
/* SoC configurations */
|
||||
#define CONFIG_MX28 /* i.MX28 SoC */
|
||||
|
||||
#define CONFIG_MXS_GPIO /* GPIO control */
|
||||
|
|
@ -35,9 +33,7 @@
|
|||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_ARCH_MISC_INIT
|
||||
|
||||
/*
|
||||
* SPL
|
||||
*/
|
||||
/* SPL */
|
||||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
|
||||
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
|
||||
|
|
@ -46,9 +42,7 @@
|
|||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
#define CONFIG_SPL_GPIO_SUPPORT
|
||||
|
||||
/*
|
||||
* U-Boot Commands
|
||||
*/
|
||||
/* U-Boot Commands */
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
|
@ -68,11 +62,9 @@
|
|||
#define CONFIG_CMD_SPI
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_CMD_NAND
|
||||
|
||||
/*
|
||||
* Memory configurations
|
||||
*/
|
||||
/* Memory configurations */
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0x40000000 /* Base address */
|
||||
#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
|
||||
|
|
@ -98,9 +90,7 @@
|
|||
#define CONFIG_SYS_TEXT_BASE 0x40000100
|
||||
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
/*
|
||||
* U-Boot general configurations
|
||||
*/
|
||||
/* U-Boot general configurations */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
|
||||
|
|
@ -115,24 +105,17 @@
|
|||
#define CONFIG_CMDLINE_EDITING /* Command history etc */
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
|
||||
/*
|
||||
* Serial Driver
|
||||
*/
|
||||
/* Serial Driver */
|
||||
#define CONFIG_PL011_SERIAL
|
||||
#define CONFIG_PL011_CLOCK 24000000
|
||||
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
|
||||
#define CONFIG_CONS_INDEX 0
|
||||
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
|
||||
|
||||
/*
|
||||
* DMA
|
||||
*/
|
||||
/* DMA */
|
||||
#define CONFIG_APBH_DMA
|
||||
|
||||
/*
|
||||
* MMC Driver
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
/* MMC Driver */
|
||||
#ifdef CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OFFSET (256 * 1024)
|
||||
#define CONFIG_ENV_SIZE (16 * 1024)
|
||||
|
|
@ -146,19 +129,44 @@
|
|||
#define CONFIG_MXS_MMC
|
||||
#endif
|
||||
|
||||
/*
|
||||
* NAND Driver
|
||||
*/
|
||||
/* NAND Driver */
|
||||
#define CONFIG_ENV_SIZE (16 * 1024)
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_MXS
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x60000000
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
|
||||
/* Environment is in NAND */
|
||||
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
|
||||
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
|
||||
#define CONFIG_ENV_RANGE (512 * 1024)
|
||||
#ifndef CONFIG_ENV_OFFSET
|
||||
#define CONFIG_ENV_OFFSET 0x300000
|
||||
#endif
|
||||
#define CONFIG_ENV_OFFSET_REDUND \
|
||||
(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
|
||||
|
||||
#define CONFIG_CMD_UBI
|
||||
#define CONFIG_CMD_UBIFS
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define CONFIG_RBTREE
|
||||
#define CONFIG_LZO
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define CONFIG_MTD_PARTITIONS
|
||||
#define MTDIDS_DEFAULT "nand0=gpmi-nand"
|
||||
#define MTDPARTS_DEFAULT \
|
||||
"mtdparts=gpmi-nand:" \
|
||||
"3m(bootloader)ro," \
|
||||
"512k(environment)," \
|
||||
"512k(redundant-environment)," \
|
||||
"4m(kernel)," \
|
||||
"128k(fdt)," \
|
||||
"8m(ramdisk)," \
|
||||
"-(filesystem)"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Ethernet on SOC (FEC)
|
||||
*/
|
||||
/* Ethernet on SOC (FEC) */
|
||||
#ifdef CONFIG_CMD_NET
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_ETHPRIME "FEC0"
|
||||
|
|
@ -168,16 +176,12 @@
|
|||
#define CONFIG_MX28_FEC_MAC_IN_OCOTP
|
||||
#endif
|
||||
|
||||
/*
|
||||
* RTC
|
||||
*/
|
||||
/* RTC */
|
||||
#ifdef CONFIG_CMD_DATE
|
||||
#define CONFIG_RTC_MXS
|
||||
#endif
|
||||
|
||||
/*
|
||||
* USB
|
||||
*/
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MXS
|
||||
|
|
@ -197,9 +201,7 @@
|
|||
#define CONFIG_SYS_I2C_SPEED 400000
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPI
|
||||
*/
|
||||
/* SPI */
|
||||
#ifdef CONFIG_CMD_SPI
|
||||
#define CONFIG_HARD_SPI
|
||||
#define CONFIG_MXS_SPI
|
||||
|
|
@ -232,9 +234,7 @@
|
|||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Boot Linux
|
||||
*/
|
||||
/* Boot Linux */
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_BOOTDELAY 1
|
||||
|
|
@ -243,9 +243,7 @@
|
|||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
||||
/*
|
||||
* Extra Environments
|
||||
*/
|
||||
/* Extra Environments */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"update_nand_full_filename=u-boot.nand\0" \
|
||||
"update_nand_firmware_filename=u-boot.sb\0" \
|
||||
|
|
|
|||
|
|
@ -36,6 +36,7 @@
|
|||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
|
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
#define CONFIG_MXC_GPIO
|
||||
|
||||
#define CONFIG_MXC_UART
|
||||
|
|
@ -75,6 +76,7 @@
|
|||
/* Command definition */
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_BMODE
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
#undef CONFIG_CMD_IMLS
|
||||
|
||||
|
|
|
|||
|
|
@ -216,7 +216,6 @@
|
|||
"fi;\0"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev};" \
|
||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
|
|
@ -228,8 +227,6 @@
|
|||
"fi; " \
|
||||
"else run netboot; fi"
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200UL
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
|
|
|
|||
|
|
@ -0,0 +1,209 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Configuration settings for the Wandboard.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/imx-common/gpio.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
#define CONFIG_MX6
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#define MACH_TYPE_WANDBOARD 4412
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_WANDBOARD
|
||||
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_INITRD_TAG
|
||||
#define CONFIG_REVISION_TAG
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
|
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_MXC_GPIO
|
||||
|
||||
#define CONFIG_MXC_UART
|
||||
#define CONFIG_MXC_UART_BASE UART1_BASE
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/* Command definition */
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#undef CONFIG_CMD_IMLS
|
||||
|
||||
#define CONFIG_BOOTDELAY 5
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x10000000
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
|
||||
#define CONFIG_LOADADDR 0x12000000
|
||||
#define CONFIG_SYS_TEXT_BASE 0x17800000
|
||||
|
||||
/* MMC Configuration */
|
||||
#define CONFIG_FSL_ESDHC
|
||||
#define CONFIG_FSL_USDHC
|
||||
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
||||
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_BOUNCE_BUFFER
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/* Ethernet Configuration */
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_FEC_MXC
|
||||
#define CONFIG_MII
|
||||
#define IMX_FEC_BASE ENET_BASE_ADDR
|
||||
#define CONFIG_FEC_XCV_TYPE RGMII
|
||||
#define CONFIG_ETHPRIME "FEC"
|
||||
#define CONFIG_FEC_MXC_PHYADDR 1
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_ATHEROS
|
||||
|
||||
#if defined(CONFIG_MX6DL)
|
||||
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb"
|
||||
#elif defined(CONFIG_MX6S)
|
||||
#define CONFIG_DEFAULT_FDT_FILE "imx6s-wandboard.dtb"
|
||||
#endif
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"script=boot.scr\0" \
|
||||
"uimage=uImage\0" \
|
||||
"console=ttymxc0\0" \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
"initrd_high=0xffffffff\0" \
|
||||
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
||||
"fdt_addr=0x11000000\0" \
|
||||
"boot_fdt=try\0" \
|
||||
"ip_dyn=yes\0" \
|
||||
"mmcdev=0\0" \
|
||||
"mmcpart=2\0" \
|
||||
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
|
||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=${mmcroot}\0" \
|
||||
"loadbootscript=" \
|
||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source\0" \
|
||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
||||
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if run loadfdt; then " \
|
||||
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"if test ${boot_fdt} = try; then " \
|
||||
"bootm; " \
|
||||
"else " \
|
||||
"echo WARN: Cannot load the DT; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"bootm; " \
|
||||
"fi;\0" \
|
||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/nfs " \
|
||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||
"netboot=echo Booting from net ...; " \
|
||||
"run netargs; " \
|
||||
"if test ${ip_dyn} = yes; then " \
|
||||
"setenv get_cmd dhcp; " \
|
||||
"else " \
|
||||
"setenv get_cmd tftp; " \
|
||||
"fi; " \
|
||||
"${get_cmd} ${uimage}; " \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"if test ${boot_fdt} = try; then " \
|
||||
"bootm; " \
|
||||
"else " \
|
||||
"echo WARN: Cannot load the DT; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"bootm; " \
|
||||
"fi;\0"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loaduimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run netboot; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else run netboot; fi"
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT "=> "
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
|
||||
#define CONFIG_ENV_SIZE (8 * 1024)
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
|
||||
#define CONFIG_OF_LIBFDT
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
|
||||
#ifndef CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_CMD_CACHE
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_H * */
|
||||
|
|
@ -168,6 +168,7 @@
|
|||
struct fsl_esdhc_cfg {
|
||||
u32 esdhc_base;
|
||||
u32 sdhc_clk;
|
||||
u8 max_bus_width;
|
||||
};
|
||||
|
||||
/* Select the correct accessors depending on endianess */
|
||||
|
|
|
|||
Loading…
Reference in New Issue