sysmo-bts
/
u-boot
9
0
Fork 0
Code Pull Requests Releases Activity

Merge branch 'master' of git://git.denx.de/u-boot-uniphier 

- Enable eMMC driver for LD11/LD20 SoCs
  - Refactoring of SoC init code
  - Bug fix of pinctrl driver
This commit is contained in:
Tom Rini 2017-01-17 11:39:43 -05:00
parent 373ae16c92 2cfa35c47b
commit bfd07670a4
49 changed files with 756 additions and 1073 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/dts/uniphier-ld11.dtsi
View File

@ -270,7 +270,7 @@
};
emmc: sdhc@5a000000 {
compatible = "cdns,sd4hc";
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
@ -279,7 +279,6 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
/* mmc-hs400-1_8v; support depends on board design */
};
usb0: usb@5a800100 {

3
arch/arm/dts/uniphier-ld20.dtsi
View File

@ -344,7 +344,7 @@
};
emmc: sdhc@5a000000 {
compatible = "cdns,sd4hc";
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
@ -353,7 +353,6 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
/* mmc-hs400-1_8v; support depends on board design */
};
sd: sdhc@5a400000 {

10
arch/arm/mach-uniphier/Makefile
View File

@ -4,8 +4,9 @@
ifdef CONFIG_SPL_BUILD
obj-y += init/ bcu/ memconf/
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/
obj-y += spl_board_init.o
obj-y += memconf.o
obj-y += bcu/
else
@ -15,6 +16,9 @@ obj-y += board_init.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
obj-y += reset.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o
obj-y += pinctrl-glue.o
endif
obj-y += boards.o
@ -22,9 +26,7 @@ obj-y += soc_info.o
obj-y += boot-mode/
obj-y += clk/
obj-y += dram/
obj-y += pinctrl-glue.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/
obj-$(CONFIG_CPU_V7) += arm32/

8
arch/arm/mach-uniphier/bcu/bcu-ld4.c
View File

@ -1,5 +1,7 @@
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -11,7 +13,7 @@
#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
{
int shift;
@ -30,6 +32,4 @@ int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
shift -= 32;
writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
return 0;
}

8
arch/arm/mach-uniphier/bcu/bcu-sld3.c
View File

@ -1,5 +1,7 @@
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -11,7 +13,7 @@
#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
{
int shift;
@ -34,6 +36,4 @@ int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
shift -= 32;
writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
return 0;
}

269
arch/arm/mach-uniphier/board_init.c
View File

@ -48,122 +48,193 @@ static void uniphier_setup_xirq(void)
writel(tmp, 0x55000090);
}
static void uniphier_nand_pin_init(bool cs2)
#ifdef CONFIG_ARCH_UNIPHIER_LD11
static void uniphier_ld11_misc_init(void)
{
#ifdef CONFIG_NAND_DENALI
if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp"))
pr_err("failed to init NAND pins\n");
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
}
#endif
#ifdef CONFIG_ARCH_UNIPHIER_LD20
static void uniphier_ld20_misc_init(void)
{
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
/* ES1 errata: increase VDD09 supply to suppress VBO noise */
if (uniphier_get_soc_revision() == 1) {
writel(0x00000003, 0x6184e004);
writel(0x00000100, 0x6184e040);
writel(0x0000b500, 0x6184e024);
writel(0x00000001, 0x6184e000);
}
cci500_init(2);
}
#endif
struct uniphier_initdata {
enum uniphier_soc_id soc_id;
bool nand_2cs;
void (*sbc_init)(void);
void (*pll_init)(void);
void (*clk_init)(void);
void (*misc_init)(void);
};
struct uniphier_initdata uniphier_initdata[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
{
.soc_id = SOC_UNIPHIER_SLD3,
.nand_2cs = true,
.sbc_init = uniphier_sbc_init_admulti,
.pll_init = uniphier_sld3_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
{
.soc_id = SOC_UNIPHIER_LD4,
.nand_2cs = true,
.sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
{
.soc_id = SOC_UNIPHIER_PRO4,
.nand_2cs = false,
.sbc_init = uniphier_sbc_init_savepin,
.pll_init = uniphier_pro4_pll_init,
.clk_init = uniphier_pro4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
{
.soc_id = SOC_UNIPHIER_SLD8,
.nand_2cs = true,
.sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
{
.soc_id = SOC_UNIPHIER_PRO5,
.nand_2cs = true,
.sbc_init = uniphier_sbc_init_savepin,
.clk_init = uniphier_pro5_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
{
.soc_id = SOC_UNIPHIER_PXS2,
.nand_2cs = true,
.sbc_init = uniphier_pxs2_sbc_init,
.clk_init = uniphier_pxs2_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
{
.soc_id = SOC_UNIPHIER_LD6B,
.nand_2cs = true,
.sbc_init = uniphier_pxs2_sbc_init,
.clk_init = uniphier_pxs2_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
{
.soc_id = SOC_UNIPHIER_LD11,
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld11_pll_init,
.clk_init = uniphier_ld11_clk_init,
.misc_init = uniphier_ld11_misc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
{
.soc_id = SOC_UNIPHIER_LD20,
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld20_pll_init,
.misc_init = uniphier_ld20_misc_init,
},
#endif
};
static struct uniphier_initdata *uniphier_get_initdata(
enum uniphier_soc_id soc_id)
{
int i;
for (i = 0; i < ARRAY_SIZE(uniphier_initdata); i++) {
if (uniphier_initdata[i].soc_id == soc_id)
return &uniphier_initdata[i];
}
return NULL;
}
int board_init(void)
{
const struct uniphier_board_data *bd;
struct uniphier_initdata *initdata;
enum uniphier_soc_id soc_id;
int ret;
led_puts("U0");
bd = uniphier_get_board_param();
if (!bd)
return -ENODEV;
switch (uniphier_get_soc_type()) {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
case SOC_UNIPHIER_SLD3:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_sld3_pll_init();
uniphier_ld4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
case SOC_UNIPHIER_LD4:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_ld4_pll_init();
uniphier_ld4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
case SOC_UNIPHIER_PRO4:
uniphier_nand_pin_init(false);
led_puts("U1");
uniphier_pro4_pll_init();
uniphier_pro4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
case SOC_UNIPHIER_SLD8:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_ld4_pll_init();
uniphier_ld4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
case SOC_UNIPHIER_PRO5:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pro5_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
case SOC_UNIPHIER_PXS2:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pxs2_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
case SOC_UNIPHIER_LD6B:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pxs2_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
case SOC_UNIPHIER_LD11:
uniphier_nand_pin_init(false);
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
led_puts("U1");
uniphier_ld11_pll_init();
uniphier_ld11_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
case SOC_UNIPHIER_LD20:
/* ES1 errata: increase VDD09 supply to suppress VBO noise */
if (uniphier_get_soc_revision() == 1) {
writel(0x00000003, 0x6184e004);
writel(0x00000100, 0x6184e040);
writel(0x0000b500, 0x6184e024);
writel(0x00000001, 0x6184e000);
}
uniphier_nand_pin_init(false);
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
led_puts("U1");
uniphier_ld20_pll_init(bd);
uniphier_ld20_clk_init();
cci500_init(2);
break;
#endif
default:
break;
soc_id = uniphier_get_soc_type();
initdata = uniphier_get_initdata(soc_id);
if (!initdata) {
pr_err("unsupported board\n");
return -EINVAL;
}
uniphier_setup_xirq();
initdata->sbc_init();
support_card_init();
led_puts("U0");
if (IS_ENABLED(CONFIG_NAND_DENALI)) {
ret = uniphier_pin_init(initdata->nand_2cs ?
"nand2cs_grp" : "nand_grp");
if (ret)
pr_err("failed to init NAND pins\n");
}
led_puts("U1");
if (initdata->pll_init)
initdata->pll_init();
led_puts("U2");
support_card_late_init();
if (initdata->clk_init)
initdata->clk_init();
led_puts("U3");
if (initdata->misc_init)
initdata->misc_init();
led_puts("U4");
uniphier_setup_xirq();
led_puts("U5");
support_card_late_init();
led_puts("U6");
#ifdef CONFIG_ARM64
uniphier_smp_kick_all_cpus();
#endif

20
arch/arm/mach-uniphier/clk/Makefile
View File

@ -4,15 +4,15 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-clk-ld4.o dpll-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += early-clk-ld4.o dpll-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += early-clk-ld4.o dpll-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o dpll-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-clk-ld11.o dpll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-clk-ld20.o dpll-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-early-sld3.o clk-dram-sld3.o dpll-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-sld3.o clk-dram-sld3.o dpll-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-sld3.o clk-dram-sld3.o dpll-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-sld3.o clk-dram-sld3.o dpll-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-sld3.o clk-dram-pro5.o dpll-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-early-ld11.o clk-dram-ld11.o dpll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-early-ld11.o clk-dram-ld20.o dpll-ld20.o
else
@ -24,7 +24,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o
endif

11
arch/arm/mach-uniphier/clk/early-clk-ld11.c → arch/arm/mach-uniphier/clk/clk-dram-ld11.c
View File

@ -1,6 +1,5 @@
/*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -10,7 +9,7 @@
#include "../init.h"
#include "../sc64-regs.h"
int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_ld11_dram_clk_init(void)
{
u32 tmp;
@ -20,13 +19,7 @@ int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
writel(tmp, SC_RSTCTRL7);
/* provide clocks */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
tmp = readl(SC_CLKCTRL7);
tmp |= SC_CLKCTRL7_UMC31 | SC_CLKCTRL7_UMC30;
writel(tmp, SC_CLKCTRL7);
return 0;
}

10
arch/arm/mach-uniphier/clk/early-clk-ld20.c → arch/arm/mach-uniphier/clk/clk-dram-ld20.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,7 +9,7 @@
#include "../init.h"
#include "../sc64-regs.h"
int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_ld20_dram_clk_init(void)
{
u32 tmp;
@ -21,14 +21,8 @@ int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
writel(tmp, SC_RSTCTRL7);
/* provide clocks */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
tmp = readl(SC_CLKCTRL7);
tmp |= SC_CLKCTRL7_UMCSB | SC_CLKCTRL7_UMC32 | SC_CLKCTRL7_UMC31 |
SC_CLKCTRL7_UMC30;
writel(tmp, SC_CLKCTRL7);
return 0;
}

11
arch/arm/mach-uniphier/clk/early-clk-pro5.c → arch/arm/mach-uniphier/clk/clk-dram-pro5.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,7 +9,7 @@
#include "../init.h"
#include "../sc-regs.h"
int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_pro5_dram_clk_init(void)
{
u32 tmp;
@ -24,17 +24,12 @@ int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)
SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30;
writel(tmp, SC_RSTCTRL4);
readl(SC_RSTCTRL); /* dummy read */
readl(SC_RSTCTRL4); /* dummy read */
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 |
SC_CLKCTRL4_CEN_UMC0;
writel(tmp, SC_CLKCTRL4);
readl(SC_CLKCTRL4); /* dummy read */
return 0;
}

16
arch/arm/mach-uniphier/clk/early-clk-pxs2.c → arch/arm/mach-uniphier/clk/clk-dram-pxs2.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -11,17 +11,11 @@
#include "../init.h"
#include "../sc-regs.h"
int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_pxs2_dram_clk_init(void)
{
u32 tmp;
/* deassert reset */
if (spl_boot_device() != BOOT_DEVICE_NAND) {
tmp = readl(SC_RSTCTRL);
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
};
tmp = readl(SC_RSTCTRL4);
tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 |
SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
@ -31,15 +25,9 @@ int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)
readl(SC_RSTCTRL4); /* dummy read */
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 |
SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0;
writel(tmp, SC_CLKCTRL4);
readl(SC_CLKCTRL4); /* dummy read */
return 0;
}

12
arch/arm/mach-uniphier/clk/early-clk-ld4.c → arch/arm/mach-uniphier/clk/clk-dram-sld3.c
View File

@ -1,5 +1,6 @@
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -11,24 +12,19 @@
#include "../init.h"
#include "../sc-regs.h"
int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_sld3_dram_clk_init(void)
{
u32 tmp;
/* deassert reset */
tmp = readl(SC_RSTCTRL);
tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
if (spl_boot_device() != BOOT_DEVICE_NAND)
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
readl(SC_RSTCTRL); /* dummy read */
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
tmp |= SC_CLKCTRL_CEN_UMC;
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
return 0;
}

20
arch/arm/mach-uniphier/clk/clk-early-ld11.c Normal file
View File

@ -0,0 +1,20 @@
/*
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/io.h>
#include "../init.h"
#include "../sc64-regs.h"
void uniphier_ld11_early_clk_init(void)
{
u32 tmp;
/* provide clocks */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
}

31
arch/arm/mach-uniphier/clk/clk-early-sld3.c Normal file
View File

@ -0,0 +1,31 @@
/*
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include "../init.h"
#include "../sc-regs.h"
void uniphier_sld3_early_clk_init(void)
{
u32 tmp;
/* deassert reset */
if (spl_boot_device() != BOOT_DEVICE_NAND) {
tmp = readl(SC_RSTCTRL);
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
};
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
}

14
arch/arm/mach-uniphier/clk/clk-ld20.c
View File

@ -1,14 +0,0 @@
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/io.h>
#include "../init.h"
#include "../sc64-regs.h"
void uniphier_ld20_clk_init(void)
{
}

6
arch/arm/mach-uniphier/clk/dpll-pro5.c Normal file
View File

@ -0,0 +1,6 @@
#include "../init.h"
int uniphier_pro5_dpll_init(const struct uniphier_board_data *bd)
{
return 0;
}

6
arch/arm/mach-uniphier/clk/dpll-pxs2.c Normal file
View File

@ -0,0 +1,6 @@
#include "../init.h"
int uniphier_pxs2_dpll_init(const struct uniphier_board_data *bd)
{
return 0;
}

4
arch/arm/mach-uniphier/clk/pll-ld20.c
View File

@ -11,7 +11,7 @@
#include "../sc64-regs.h"
#include "pll.h"
int uniphier_ld20_pll_init(const struct uniphier_board_data *bd)
void uniphier_ld20_pll_init(void)
{
uniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);
/* do nothing for SPLL */
@ -36,6 +36,4 @@ int uniphier_ld20_pll_init(const struct uniphier_board_data *bd)
uniphier_ld20_dspll_init(SC_VPLL8KCTRL);
uniphier_ld20_dspll_init(SC_A2PLLCTRL);
return 0;
}

2
arch/arm/mach-uniphier/dram/Makefile
View File

@ -4,12 +4,14 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += umc-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \
ddrphy-training.o ddrphy-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += umc-pro4.o \
ddrphy-training.o ddrphy-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += umc-sld8.o \
ddrphy-training.o ddrphy-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += umc-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += umc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += umc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += umc-ld11.o

12
arch/arm/mach-uniphier/dram/umc-pro5.c Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (C) 2016 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "../init.h"
int uniphier_pro5_umc_init(const struct uniphier_board_data *bd)
{
return 0;
}

6
arch/arm/mach-uniphier/dram/umc-sld3.c Normal file
View File

@ -0,0 +1,6 @@
#include "../init.h"
int uniphier_sld3_umc_init(const struct uniphier_board_data *bd)
{
return 0;
}

57
arch/arm/mach-uniphier/init.h
View File

@ -46,57 +46,63 @@ int uniphier_ld11_init(const struct uniphier_board_data *bd);
int uniphier_ld20_init(const struct uniphier_board_data *bd);
#if defined(CONFIG_MICRO_SUPPORT_CARD)
int uniphier_sbc_init_admulti(const struct uniphier_board_data *bd);
int uniphier_sbc_init_savepin(const struct uniphier_board_data *bd);
int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd);
void uniphier_sbc_init_admulti(void);
void uniphier_sbc_init_savepin(void);
void uniphier_ld4_sbc_init(void);
void uniphier_pxs2_sbc_init(void);
void uniphier_ld11_sbc_init(void);
#else
static inline int uniphier_sbc_init_admulti(
const struct uniphier_board_data *bd)
static inline void uniphier_sbc_init_admulti(void)
{
return 0;
}
static inline int uniphier_sbc_init_savepin(
const struct uniphier_board_data *bd)
static inline void uniphier_sbc_init_savepin(void)
{
return 0;
}
static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)
static inline void uniphier_ld4_sbc_init(void)
{
return 0;
}
static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)
static inline void uniphier_pxs2_sbc_init(void)
{
}
static inline void uniphier_ld11_sbc_init(void)
{
return 0;
}
#endif
int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd);
int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd);
void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd);
void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd);
int memconf_init(const struct uniphier_board_data *bd);
int uniphier_sld3_memconf_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd);
int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd);
int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd);
int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd);
int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd);
int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd);
int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd);
int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd);
int uniphier_pro5_dpll_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_dpll_init(const struct uniphier_board_data *bd);
int uniphier_ld11_dpll_init(const struct uniphier_board_data *bd);
int uniphier_ld20_dpll_init(const struct uniphier_board_data *bd);
int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd);
int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd);
int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd);
int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd);
void uniphier_sld3_early_clk_init(void);
void uniphier_ld11_early_clk_init(void);
void uniphier_sld3_dram_clk_init(void);
void uniphier_pro5_dram_clk_init(void);
void uniphier_pxs2_dram_clk_init(void);
void uniphier_ld11_dram_clk_init(void);
void uniphier_ld20_dram_clk_init(void);
int uniphier_sld3_umc_init(const struct uniphier_board_data *bd);
int uniphier_ld4_umc_init(const struct uniphier_board_data *bd);
int uniphier_pro4_umc_init(const struct uniphier_board_data *bd);
int uniphier_sld8_umc_init(const struct uniphier_board_data *bd);
int uniphier_pro5_umc_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_umc_init(const struct uniphier_board_data *bd);
int uniphier_ld20_umc_init(const struct uniphier_board_data *bd);
int uniphier_ld11_umc_init(const struct uniphier_board_data *bd);
@ -105,14 +111,13 @@ void uniphier_sld3_pll_init(void);
void uniphier_ld4_pll_init(void);
void uniphier_pro4_pll_init(void);
void uniphier_ld11_pll_init(void);
int uniphier_ld20_pll_init(const struct uniphier_board_data *bd);
void uniphier_ld20_pll_init(void);
void uniphier_ld4_clk_init(void);
void uniphier_pro4_clk_init(void);
void uniphier_pro5_clk_init(void);
void uniphier_pxs2_clk_init(void);
void uniphier_ld11_clk_init(void);
void uniphier_ld20_clk_init(void);
int uniphier_pin_init(const char *pinconfig_name);
void uniphier_smp_kick_all_cpus(void);

15
arch/arm/mach-uniphier/init/Makefile
View File

@ -1,15 +0,0 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += init.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += init-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += init-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += init-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += init-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += init-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += init-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += init-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += init-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += init-ld20.o

63
arch/arm/mach-uniphier/init/init-ld11.c
View File

@ -1,63 +0,0 @@
/*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_ld11_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
/* pins for NAND and System Bus are multiplexed */
if (spl_boot_device() != BOOT_DEVICE_NAND)
uniphier_pin_init("system_bus_grp");
support_card_reset();
support_card_init();
led_puts("L0");
memconf_init(bd);
led_puts("L1");
uniphier_ld11_early_clk_init(bd);
led_puts("L2");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L3");
uniphier_ld11_dpll_init(bd);
led_puts("L4");
{
int res;
res = uniphier_ld11_umc_init(bd);
if (res < 0) {
while (1)
;
}
}
led_puts("L5");
dcache_disable();
led_puts("L6");
return 0;
}

62
arch/arm/mach-uniphier/init/init-ld20.c
View File

@ -1,62 +0,0 @@
/*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_ld20_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
/* pins for NAND and System Bus are multiplexed */
if (spl_boot_device() != BOOT_DEVICE_NAND)
uniphier_pin_init("system_bus_grp");
support_card_reset();
support_card_init();
led_puts("L0");
memconf_init(bd);
uniphier_pxs2_memconf_init(bd);
led_puts("L1");
uniphier_ld20_early_clk_init(bd);
led_puts("L2");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L3");
uniphier_ld20_dpll_init(bd);
led_puts("L4");
{
int res;
res = uniphier_ld20_umc_init(bd);
if (res < 0) {
while (1)
;
}
}
led_puts("L5");
dcache_disable();
return 0;
}

59
arch/arm/mach-uniphier/init/init-ld4.c
View File

@ -1,59 +0,0 @@
/*
* Copyright (C) 2013-2015 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_ld4_init(const struct uniphier_board_data *bd)
{
uniphier_ld4_bcu_init(bd);
uniphier_sbc_init_savepin(bd);
uniphier_ld4_sbc_init(bd);
support_card_reset();
uniphier_ld4_dpll_init(bd);
support_card_init();
led_puts("L0");
memconf_init(bd);
led_puts("L1");
uniphier_ld4_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
{
int res;
res = uniphier_ld4_umc_init(bd);
if (res < 0) {
while (1)
;
}
}
led_puts("L5");
return 0;
}

56
arch/arm/mach-uniphier/init/init-pro4.c
View File

@ -1,56 +0,0 @@
/*
* Copyright (C) 2013-2015 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_pro4_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
support_card_reset();
uniphier_pro4_dpll_init(bd);
support_card_init();
led_puts("L0");
memconf_init(bd);
led_puts("L1");
uniphier_ld4_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
{
int res;
res = uniphier_pro4_umc_init(bd);
if (res < 0) {
while (1)
;
}
}
led_puts("L5");
return 0;
}

42
arch/arm/mach-uniphier/init/init-pro5.c
View File

@ -1,42 +0,0 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_pro5_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
support_card_reset();
support_card_init();
led_puts("L0");
memconf_init(bd);
led_puts("L1");
uniphier_pro5_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
led_puts("L5");
return 0;
}

50
arch/arm/mach-uniphier/init/init-pxs2.c
View File

@ -1,50 +0,0 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_pxs2_init(const struct uniphier_board_data *bd)
{
int ret;
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
support_card_reset();
support_card_init();
led_puts("L0");
memconf_init(bd);
uniphier_pxs2_memconf_init(bd);
led_puts("L1");
uniphier_pxs2_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
ret = uniphier_pxs2_umc_init(bd);
if (ret)
return ret;
led_puts("L5");
return 0;
}

49
arch/arm/mach-uniphier/init/init-sld3.c
View File

@ -1,49 +0,0 @@
/*
* Copyright (C) 2013-2015 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_sld3_init(const struct uniphier_board_data *bd)
{
uniphier_sld3_bcu_init(bd);
uniphier_sbc_init_admulti(bd);
support_card_reset();
uniphier_sld3_dpll_init(bd);
support_card_init();
led_puts("L0");
memconf_init(bd);
uniphier_sld3_memconf_init(bd);
led_puts("L1");
uniphier_ld4_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
led_puts("L5");
return 0;
}

59
arch/arm/mach-uniphier/init/init-sld8.c
View File

@ -1,59 +0,0 @@
/*
* Copyright (C) 2013-2015 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_sld8_init(const struct uniphier_board_data *bd)
{
uniphier_ld4_bcu_init(bd);
uniphier_sbc_init_savepin(bd);
uniphier_ld4_sbc_init(bd);
support_card_reset();
uniphier_sld8_dpll_init(bd);
support_card_init();
led_puts("L0");
memconf_init(bd);
led_puts("L1");
uniphier_ld4_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
{
int res;
res = uniphier_sld8_umc_init(bd);
if (res < 0) {
while (1)
;
}
}
led_puts("L5");
return 0;
}

71
arch/arm/mach-uniphier/init/init.c
View File

@ -1,71 +0,0 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <debug_uart.h>
#include <spl.h>
#include "../init.h"
#include "../soc-info.h"
void spl_board_init(void)
{
const struct uniphier_board_data *param;
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
param = uniphier_get_board_param();
if (!param)
hang();
switch (uniphier_get_soc_type()) {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
case SOC_UNIPHIER_SLD3:
uniphier_sld3_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
case SOC_UNIPHIER_LD4:
uniphier_ld4_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
case SOC_UNIPHIER_PRO4:
uniphier_pro4_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
case SOC_UNIPHIER_SLD8:
uniphier_sld8_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
case SOC_UNIPHIER_PRO5:
uniphier_pro5_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
case SOC_UNIPHIER_PXS2:
case SOC_UNIPHIER_LD6B:
uniphier_pxs2_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
case SOC_UNIPHIER_LD11:
uniphier_ld11_init(param);
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
case SOC_UNIPHIER_LD20:
uniphier_ld20_init(param);
break;
#endif
default:
break;
}
}

163
arch/arm/mach-uniphier/memconf.c Normal file
View File

@ -0,0 +1,163 @@
/*
* Copyright (C) 2011-2015 Panasonic Corporation
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include "sg-regs.h"
#include "init.h"
static int __uniphier_memconf_init(const struct uniphier_board_data *bd,
int have_ch2, int have_ch2_disable_bit)
{
u32 val = 0;
unsigned long size_per_word;
/* set up ch0 */
switch (bd->dram_ch[0].width) {
case 16:
val |= SG_MEMCONF_CH0_NUM_1;
size_per_word = bd->dram_ch[0].size;
break;
case 32:
val |= SG_MEMCONF_CH0_NUM_2;
size_per_word = bd->dram_ch[0].size >> 1;
break;
default:
pr_err("error: unsupported DRAM ch0 width\n");
return -EINVAL;
}
switch (size_per_word) {
case SZ_64M:
val |= SG_MEMCONF_CH0_SZ_64M;
break;
case SZ_128M:
val |= SG_MEMCONF_CH0_SZ_128M;
break;
case SZ_256M:
val |= SG_MEMCONF_CH0_SZ_256M;
break;
case SZ_512M:
val |= SG_MEMCONF_CH0_SZ_512M;
break;
case SZ_1G:
val |= SG_MEMCONF_CH0_SZ_1G;
break;
default:
pr_err("error: unsupported DRAM ch0 size\n");
return -EINVAL;
}
/* set up ch1 */
switch (bd->dram_ch[1].width) {
case 16:
val |= SG_MEMCONF_CH1_NUM_1;
size_per_word = bd->dram_ch[1].size;
break;
case 32:
val |= SG_MEMCONF_CH1_NUM_2;
size_per_word = bd->dram_ch[1].size >> 1;
break;
default:
pr_err("error: unsupported DRAM ch1 width\n");
return -EINVAL;
}
switch (size_per_word) {
case SZ_64M:
val |= SG_MEMCONF_CH1_SZ_64M;
break;
case SZ_128M:
val |= SG_MEMCONF_CH1_SZ_128M;
break;
case SZ_256M:
val |= SG_MEMCONF_CH1_SZ_256M;
break;
case SZ_512M:
val |= SG_MEMCONF_CH1_SZ_512M;
break;
case SZ_1G:
val |= SG_MEMCONF_CH1_SZ_1G;
break;
default:
pr_err("error: unsupported DRAM ch1 size\n");
return -EINVAL;
}
/* is sparse mem? */
if (bd->dram_ch[0].base + bd->dram_ch[0].size < bd->dram_ch[1].base)
val |= SG_MEMCONF_SPARSEMEM;
if (!have_ch2)
goto out;
if (!bd->dram_ch[2].size) {
if (have_ch2_disable_bit)
val |= SG_MEMCONF_CH2_DISABLE;
goto out;
}
/* set up ch2 */
switch (bd->dram_ch[2].width) {
case 16:
val |= SG_MEMCONF_CH2_NUM_1;
size_per_word = bd->dram_ch[2].size;
break;
case 32:
val |= SG_MEMCONF_CH2_NUM_2;
size_per_word = bd->dram_ch[2].size >> 1;
break;
default:
pr_err("error: unsupported DRAM ch2 width\n");
return -EINVAL;
}
switch (size_per_word) {
case SZ_64M:
val |= SG_MEMCONF_CH2_SZ_64M;
break;
case SZ_128M:
val |= SG_MEMCONF_CH2_SZ_128M;
break;
case SZ_256M:
val |= SG_MEMCONF_CH2_SZ_256M;
break;
case SZ_512M:
val |= SG_MEMCONF_CH2_SZ_512M;
break;
case SZ_1G:
val |= SG_MEMCONF_CH2_SZ_1G;
break;
default:
pr_err("error: unsupported DRAM ch2 size\n");
return -EINVAL;
}
out:
writel(val, SG_MEMCONF);
return 0;
}
int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd)
{
return __uniphier_memconf_init(bd, 0, 0);
}
int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd)
{
return __uniphier_memconf_init(bd, 1, 0);
}
int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd)
{
return __uniphier_memconf_init(bd, 1, 1);
}

9
arch/arm/mach-uniphier/memconf/Makefile
View File

@ -1,9 +0,0 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += memconf.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += memconf-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += memconf-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += memconf-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += memconf-pxs2.o

68
arch/arm/mach-uniphier/memconf/memconf-pxs2.c
View File

@ -1,68 +0,0 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include "../init.h"
#include "../sg-regs.h"
int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd)
{
u32 tmp;
unsigned long size_per_word;
tmp = readl(SG_MEMCONF);
tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK);
switch (bd->dram_ch[2].width) {
case 16:
tmp |= SG_MEMCONF_CH2_NUM_1;
size_per_word = bd->dram_ch[2].size;
break;
case 32:
tmp |= SG_MEMCONF_CH2_NUM_2;
size_per_word = bd->dram_ch[2].size >> 1;
break;
default:
pr_err("error: unsupported DRAM Ch2 width\n");
return -EINVAL;
}
/* Set DDR size */
switch (size_per_word) {
case SZ_64M:
tmp |= SG_MEMCONF_CH2_SZ_64M;
break;
case SZ_128M:
tmp |= SG_MEMCONF_CH2_SZ_128M;
break;
case SZ_256M:
tmp |= SG_MEMCONF_CH2_SZ_256M;
break;
case SZ_512M:
tmp |= SG_MEMCONF_CH2_SZ_512M;
break;
case SZ_1G:
tmp |= SG_MEMCONF_CH2_SZ_1G;
break;
default:
pr_err("error: unsupported DRAM Ch2 size\n");
return -EINVAL;
}
if (size_per_word)
tmp &= ~SG_MEMCONF_CH2_DISABLE;
else
tmp |= SG_MEMCONF_CH2_DISABLE;
writel(tmp, SG_MEMCONF);
return 0;
}

60
arch/arm/mach-uniphier/memconf/memconf-sld3.c
View File

@ -1,60 +0,0 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include "../init.h"
#include "../sg-regs.h"
int uniphier_sld3_memconf_init(const struct uniphier_board_data *bd)
{
u32 tmp;
unsigned long size_per_word;
tmp = readl(SG_MEMCONF);
tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK);
switch (bd->dram_ch[2].width) {
case 16:
tmp |= SG_MEMCONF_CH2_NUM_1;
size_per_word = bd->dram_ch[2].size;
break;
case 32:
tmp |= SG_MEMCONF_CH2_NUM_2;
size_per_word = bd->dram_ch[2].size >> 1;
break;
default:
pr_err("error: unsupported DRAM Ch2 width\n");
return -EINVAL;
}
/* Set DDR size */
switch (size_per_word) {
case SZ_64M:
tmp |= SG_MEMCONF_CH2_SZ_64M;
break;
case SZ_128M:
tmp |= SG_MEMCONF_CH2_SZ_128M;
break;
case SZ_256M:
tmp |= SG_MEMCONF_CH2_SZ_256M;
break;
case SZ_512M:
tmp |= SG_MEMCONF_CH2_SZ_512M;
break;
default:
pr_err("error: unsupported DRAM Ch2 size\n");
return -EINVAL;
}
writel(tmp, SG_MEMCONF);
return 0;
}

107
arch/arm/mach-uniphier/memconf/memconf.c
View File

@ -1,107 +0,0 @@
/*
* Copyright (C) 2011-2015 Panasonic Corporation
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include "../init.h"
#include "../sg-regs.h"
int memconf_init(const struct uniphier_board_data *bd)
{
u32 tmp;
unsigned long size_per_word;
tmp = readl(SG_MEMCONF);
tmp &= ~(SG_MEMCONF_CH0_SZ_MASK | SG_MEMCONF_CH0_NUM_MASK);
switch (bd->dram_ch[0].width) {
case 16:
tmp |= SG_MEMCONF_CH0_NUM_1;
size_per_word = bd->dram_ch[0].size;
break;
case 32:
tmp |= SG_MEMCONF_CH0_NUM_2;
size_per_word = bd->dram_ch[0].size >> 1;
break;
default:
pr_err("error: unsupported DRAM Ch0 width\n");
return -EINVAL;
}
/* Set DDR size */
switch (size_per_word) {
case SZ_64M:
tmp |= SG_MEMCONF_CH0_SZ_64M;
break;
case SZ_128M:
tmp |= SG_MEMCONF_CH0_SZ_128M;
break;
case SZ_256M:
tmp |= SG_MEMCONF_CH0_SZ_256M;
break;
case SZ_512M:
tmp |= SG_MEMCONF_CH0_SZ_512M;
break;
case SZ_1G:
tmp |= SG_MEMCONF_CH0_SZ_1G;
break;
default:
pr_err("error: unsupported DRAM Ch0 size\n");
return -EINVAL;
}
tmp &= ~(SG_MEMCONF_CH1_SZ_MASK | SG_MEMCONF_CH1_NUM_MASK);
switch (bd->dram_ch[1].width) {
case 16:
tmp |= SG_MEMCONF_CH1_NUM_1;
size_per_word = bd->dram_ch[1].size;
break;
case 32:
tmp |= SG_MEMCONF_CH1_NUM_2;
size_per_word = bd->dram_ch[1].size >> 1;
break;
default:
pr_err("error: unsupported DRAM Ch1 width\n");
return -EINVAL;
}
switch (size_per_word) {
case SZ_64M:
tmp |= SG_MEMCONF_CH1_SZ_64M;
break;
case SZ_128M:
tmp |= SG_MEMCONF_CH1_SZ_128M;
break;
case SZ_256M:
tmp |= SG_MEMCONF_CH1_SZ_256M;
break;
case SZ_512M:
tmp |= SG_MEMCONF_CH1_SZ_512M;
break;
case SZ_1G:
tmp |= SG_MEMCONF_CH1_SZ_1G;
break;
default:
pr_err("error: unsupported DRAM Ch1 size\n");
return -EINVAL;
}
if (bd->dram_ch[0].base + bd->dram_ch[0].size < bd->dram_ch[1].base)
tmp |= SG_MEMCONF_SPARSEMEM;
else
tmp &= ~SG_MEMCONF_SPARSEMEM;
writel(tmp, SG_MEMCONF);
return 0;
}

7
arch/arm/mach-uniphier/micro-support-card.c
View File

@ -25,12 +25,12 @@
* bit[0]: LAN, I2C, LED
* bit[1]: UART
*/
void support_card_reset_deassert(void)
static void support_card_reset_deassert(void)
{
writel(0x00010000, MICRO_SUPPORT_CARD_RESET);
}
void support_card_reset(void)
static void support_card_reset(void)
{
writel(0x00020003, MICRO_SUPPORT_CARD_RESET);
}
@ -57,6 +57,7 @@ int checkboard(void)
void support_card_init(void)
{
support_card_reset();
/*
* After power on, we need to keep the LAN controller in reset state
* for a while. (200 usec)
@ -157,7 +158,7 @@ static void detect_num_flash_banks(void)
debug("number of flash banks: %d\n", cfi_flash_num_flash_banks);
}
#else /* CONFIG_SYS_NO_FLASH */
void detect_num_flash_banks(void)
static void detect_num_flash_banks(void)
{
};
#endif /* CONFIG_SYS_NO_FLASH */

5
arch/arm/mach-uniphier/micro-support-card.h
View File

@ -10,15 +10,10 @@
#define MICRO_SUPPORT_CARD_H
#if defined(CONFIG_MICRO_SUPPORT_CARD)
void support_card_reset(void);
void support_card_init(void);
void support_card_late_init(void);
void led_puts(const char *s);
#else
static inline void support_card_reset(void)
{
}
static inline void support_card_init(void)
{
}

17
arch/arm/mach-uniphier/sbc/Makefile
View File

@ -2,12 +2,11 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += sbc-admulti.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-savepin.o sbc-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += sbc-savepin.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-savepin.o sbc-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += sbc-savepin.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-savepin.o sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-savepin.o sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-savepin.o sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-savepin.o sbc-pxs2.o
obj-y += sbc.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o

53
arch/arm/mach-uniphier/sbc/sbc-admulti.c
View File

@ -1,53 +0,0 @@
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/io.h>
#include "../init.h"
#include "../sg-regs.h"
#include "sbc-regs.h"
#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000
#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500
#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020
#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000
#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500
#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010
int uniphier_sbc_init_admulti(const struct uniphier_board_data *bd)
{
/*
* Only CS1 is connected to support card.
* BKSZ[1:0] should be set to "01".
*/
writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
if (boot_is_swapped()) {
/*
* Boot Swap On: boot from external NOR/SRAM
* 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
*
* 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
* 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
*/
writel(0x0000bc01, SBBASE0);
} else {
/*
* Boot Swap Off: boot from mask ROM
* 0x40000000-0x41ffffff: mask ROM
* 0x42000000-0x43efffff: memory bank (31MB)
* 0x43f00000-0x43ffffff: peripherals (1MB)
*/
writel(0x0000be01, SBBASE0); /* dummy */
writel(0x0200be01, SBBASE1);
}
return 0;
}

25
arch/arm/mach-uniphier/sbc/sbc-ld11.c Normal file
View File

@ -0,0 +1,25 @@
/*
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include "../init.h"
#include "sbc-regs.h"
void uniphier_ld11_sbc_init(void)
{
uniphier_sbc_init_savepin();
/* necessary for ROM boot ?? */
/* system bus output enable */
writel(0x17, PC0CTRL);
/* pins for NAND and System Bus are multiplexed */
if (spl_boot_device() != BOOT_DEVICE_NAND)
uniphier_pin_init("system_bus_grp");
}

9
arch/arm/mach-uniphier/sbc/sbc-ld4.c
View File

@ -1,5 +1,6 @@
/*
* Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2011-2015 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,14 +10,14 @@
#include "../init.h"
#include "sbc-regs.h"
int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)
void uniphier_ld4_sbc_init(void)
{
u32 tmp;
uniphier_sbc_init_savepin();
/* system bus output enable */
tmp = readl(PC0CTRL);
tmp &= 0xfffffcff;
writel(tmp, PC0CTRL);
return 0;
}

8
arch/arm/mach-uniphier/sbc/sbc-pxs2.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2015-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,11 +9,11 @@
#include "../init.h"
#include "sbc-regs.h"
int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)
void uniphier_pxs2_sbc_init(void)
{
uniphier_sbc_init_savepin();
/* necessary for ROM boot ?? */
/* system bus output enable */
writel(0x17, PC0CTRL);
return 0;
}

40
arch/arm/mach-uniphier/sbc/sbc-savepin.c → arch/arm/mach-uniphier/sbc/sbc.c
View File

@ -1,5 +1,7 @@
/*
* Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2011-2015 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,6 +11,14 @@
#include "../init.h"
#include "sbc-regs.h"
#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000
#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500
#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020
#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000
#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500
#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010
/* slower but LED works */
#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000
#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00
@ -22,16 +32,22 @@
#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009
#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210
int uniphier_sbc_init_savepin(const struct uniphier_board_data *bd)
static void __uniphier_sbc_init(int savepin)
{
/*
* Only CS1 is connected to support card.
* BKSZ[1:0] should be set to "01".
*/
writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
if (savepin) {
writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
} else {
writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
}
if (boot_is_swapped()) {
/*
@ -52,6 +68,14 @@ int uniphier_sbc_init_savepin(const struct uniphier_board_data *bd)
writel(0x0000be01, SBBASE0); /* dummy */
writel(0x0200be01, SBBASE1);
}
return 0;
}
void uniphier_sbc_init_admulti(void)
{
__uniphier_sbc_init(0);
}
void uniphier_sbc_init_savepin(void)
{
__uniphier_sbc_init(1);
}

185
arch/arm/mach-uniphier/spl_board_init.c Normal file
View File

@ -0,0 +1,185 @@
/*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <debug_uart.h>
#include <spl.h>
#include "init.h"
#include "micro-support-card.h"
#include "soc-info.h"
struct uniphier_spl_initdata {
enum uniphier_soc_id soc_id;
void (*bcu_init)(const struct uniphier_board_data *bd);
void (*early_clk_init)(void);
int (*dpll_init)(const struct uniphier_board_data *bd);
int (*memconf_init)(const struct uniphier_board_data *bd);
void (*dram_clk_init)(void);
int (*umc_init)(const struct uniphier_board_data *bd);
};
static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
{
.soc_id = SOC_UNIPHIER_SLD3,
.bcu_init = uniphier_sld3_bcu_init,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_sld3_dpll_init,
.memconf_init = uniphier_memconf_3ch_no_disbit_init,
.dram_clk_init = uniphier_sld3_dram_clk_init,
.umc_init = uniphier_sld3_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
{
.soc_id = SOC_UNIPHIER_LD4,
.bcu_init = uniphier_ld4_bcu_init,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_ld4_dpll_init,
.memconf_init = uniphier_memconf_2ch_init,
.dram_clk_init = uniphier_sld3_dram_clk_init,
.umc_init = uniphier_ld4_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
{
.soc_id = SOC_UNIPHIER_PRO4,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_pro4_dpll_init,
.memconf_init = uniphier_memconf_2ch_init,
.dram_clk_init = uniphier_sld3_dram_clk_init,
.umc_init = uniphier_pro4_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
{
.soc_id = SOC_UNIPHIER_SLD8,
.bcu_init = uniphier_ld4_bcu_init,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_sld8_dpll_init,
.memconf_init = uniphier_memconf_2ch_init,
.dram_clk_init = uniphier_sld3_dram_clk_init,
.umc_init = uniphier_sld8_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
{
.soc_id = SOC_UNIPHIER_PRO5,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_pro5_dpll_init,
.memconf_init = uniphier_memconf_2ch_init,
.dram_clk_init = uniphier_pro5_dram_clk_init,
.umc_init = uniphier_pro5_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
{
.soc_id = SOC_UNIPHIER_PXS2,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_pxs2_dpll_init,
.memconf_init = uniphier_memconf_3ch_init,
.dram_clk_init = uniphier_pxs2_dram_clk_init,
.umc_init = uniphier_pxs2_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
{
.soc_id = SOC_UNIPHIER_LD6B,
.early_clk_init = uniphier_sld3_early_clk_init,
.dpll_init = uniphier_pxs2_dpll_init,
.memconf_init = uniphier_memconf_3ch_init,
.dram_clk_init = uniphier_pxs2_dram_clk_init,
.umc_init = uniphier_pxs2_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
{
.soc_id = SOC_UNIPHIER_LD11,
.early_clk_init = uniphier_ld11_early_clk_init,
.dpll_init = uniphier_ld11_dpll_init,
.memconf_init = uniphier_memconf_2ch_init,
.dram_clk_init = uniphier_ld11_dram_clk_init,
.umc_init = uniphier_ld11_umc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
{
.soc_id = SOC_UNIPHIER_LD20,
.early_clk_init = uniphier_ld11_early_clk_init,
.dpll_init = uniphier_ld20_dpll_init,
.memconf_init = uniphier_memconf_3ch_init,
.dram_clk_init = uniphier_ld20_dram_clk_init,
.umc_init = uniphier_ld20_umc_init,
},
#endif
};
static const struct uniphier_spl_initdata *uniphier_get_spl_initdata(
enum uniphier_soc_id soc_id)
{
int i;
for (i = 0; i < ARRAY_SIZE(uniphier_spl_initdata); i++) {
if (uniphier_spl_initdata[i].soc_id == soc_id)
return &uniphier_spl_initdata[i];
}
return NULL;
}
void spl_board_init(void)
{
const struct uniphier_board_data *bd;
const struct uniphier_spl_initdata *initdata;
enum uniphier_soc_id soc_id;
int ret;
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
bd = uniphier_get_board_param();
if (!bd)
hang();
soc_id = uniphier_get_soc_type();
initdata = uniphier_get_spl_initdata(soc_id);
if (!initdata)
hang();
if (initdata->bcu_init)
initdata->bcu_init(bd);
initdata->early_clk_init();
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
ret = initdata->dpll_init(bd);
if (ret) {
pr_err("failed to init DPLL\n");
hang();
}
ret = initdata->memconf_init(bd);
if (ret) {
pr_err("failed to init MEMCONF\n");
hang();
}
initdata->dram_clk_init();
ret = initdata->umc_init(bd);
if (ret) {
pr_err("failed to init DRAM\n");
hang();
}
}

4
configs/uniphier_ld11_defconfig
View File

@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ARCH_UNIPHIER_LD11=y
CONFIG_MICRO_SUPPORT_CARD=y
# CONFIG_MMC is not set
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld11-ref"
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
@ -28,6 +27,9 @@ CONFIG_SPL_OF_TRANSLATE=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y

2
configs/uniphier_ld20_defconfig
View File

@ -28,6 +28,8 @@ CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_UNIPHIER=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_STORAGE=y

2
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
View File

@ -20,7 +20,7 @@ static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0};
static const unsigned ether_rmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 39,
41, 42, 45};
static const int ether_rmii_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
static const unsigned i2c0_pins[] = {63, 64};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {65, 66};