mmc: Kconfig: Add Arasan SDHCI entry

Add Arasan SDHCI entry to Kconfig and fix all references.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2016-02-04 11:43:40 +01:00
parent 28f8099563
commit ce0335f2b4
18 changed files with 19 additions and 20 deletions

View File

@ -25,5 +25,6 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y CONFIG_CMD_TIMER=y
CONFIG_OF_EMBED=y CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_GEM=y
# CONFIG_REGEX is not set # CONFIG_REGEX is not set

View File

@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

View File

@ -10,4 +10,5 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_GEM=y

View File

@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

View File

@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

View File

@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

View File

@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

View File

@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_GEM=y

View File

@ -37,4 +37,10 @@ config PIC32_SDHCI
help help
Support for Microchip PIC32 SDHCI controller. Support for Microchip PIC32 SDHCI controller.
config ZYNQ_SDHCI
bool "Arasan SDHCI controller support"
depends on DM_MMC && OF_CONTROL
help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
endmenu endmenu

View File

@ -89,18 +89,14 @@
# define CONFIG_CMD_SF # define CONFIG_CMD_SF
#endif #endif
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) #if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_MMC # define CONFIG_MMC
# define CONFIG_GENERIC_MMC # define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI # define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC # define CONFIG_CMD_MMC
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ # ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
# endif # endif
#endif
#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_FAT_WRITE # define CONFIG_FAT_WRITE
# define CONFIG_CMD_EXT4_WRITE # define CONFIG_CMD_EXT4_WRITE
#endif #endif

View File

@ -13,7 +13,6 @@
#ifndef __CONFIG_ZYNQMP_EP_H #ifndef __CONFIG_ZYNQMP_EP_H
#define __CONFIG_ZYNQMP_EP_H #define __CONFIG_ZYNQMP_EP_H
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9) #define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
#define CONFIG_ZYNQ_I2C0 #define CONFIG_ZYNQ_I2C0

View File

@ -86,11 +86,10 @@
#endif #endif
/* MMC */ /* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) #if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_MMC # define CONFIG_MMC
# define CONFIG_GENERIC_MMC # define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI # define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC # define CONFIG_CMD_MMC
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#endif #endif
@ -131,7 +130,7 @@
"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
"thor_ram=run dfu_ram_info && thordown 0 ram 0\0" "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
# if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_DFU_MMC # define CONFIG_DFU_MMC
# define DFU_ALT_INFO_MMC \ # define DFU_ALT_INFO_MMC \
"dfu_mmc_info=" \ "dfu_mmc_info=" \
@ -311,7 +310,7 @@
#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
/* MMC support */ /* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI0 #ifdef CONFIG_ZYNQ_SDHCI
#define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */

View File

@ -14,8 +14,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI0
#include <configs/zynq-common.h> #include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_MICROZED_H */ #endif /* __CONFIG_ZYNQ_MICROZED_H */

View File

@ -14,7 +14,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_USB
#define CONFIG_ZYNQ_BOOT_FREEBSD #define CONFIG_ZYNQ_BOOT_FREEBSD

View File

@ -14,7 +14,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_USB
#define CONFIG_ZYNQ_I2C0 #define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_EEPROM

View File

@ -14,10 +14,7 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#if defined(CONFIG_ZC770_XM010) #if defined(CONFIG_ZC770_XM012)
# define CONFIG_ZYNQ_SDHCI0
#elif defined(CONFIG_ZC770_XM012)
# undef CONFIG_SYS_NO_FLASH # undef CONFIG_SYS_NO_FLASH
#endif #endif

View File

@ -15,7 +15,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_USB
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_BOOT_FREEBSD #define CONFIG_ZYNQ_BOOT_FREEBSD
#include <configs/zynq-common.h> #include <configs/zynq-common.h>

View File

@ -16,7 +16,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_USB
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_BOOT_FREEBSD #define CONFIG_ZYNQ_BOOT_FREEBSD
/* Define ZYBO PS Clock Frequency to 50MHz */ /* Define ZYBO PS Clock Frequency to 50MHz */