sysmo-bts
/
u-boot
9
0
Fork 0
Code Pull Requests Releases Activity

dm: pci: Support bridge device configuration correctly 

Commit aec241d "dm: pci: Use the correct hose when configuring devices"
was an attempt to fix pci bridge device configuration, but unfortunately
that does not work 100%. In pciauto_config_devices(), the fix tried to
call pciauto_config_device() with a ctlr_hose which is supposed to be
the root controller hose, however when walking through a pci topology
with 2 or more pci bridges this logic simply fails.

The call chain is: pciauto_config_devices()->pciauto_config_device()
->dm_pci_hose_probe_bus(). Here the call to dm_pci_hose_probe_bus()
does not make any sense as the given hose is not the bridge device's
hose, instead it is either the root controller's hose (case#1: if it
is the 2nd pci bridge), or the bridge's parent bridge's hose (case#2:
if it is the 3rd pci bridge). In both cases the logic is wrong.

For example, for failing case#1 if the bridge device to config has the
same devfn as one of the devices under the root controller, the call
to pci_bus_find_devfn() will return the udevice of that pci device
under the root controller as the bus, but this is wrong as the udevice
is not a bus which does not contain all the necessary bits associated
with the udevice which causes further failures.

To correctly support pci bridge device configuration, we should still
call pciauto_config_device() with the pci bridge's hose directly.
In order to access valid pci region information, we need to refer to
the root controller simply by a call to pci_bus_to_hose(0) and get the
region information there in the pciauto_prescan_setup_bridge(),
pciauto_postscan_setup_bridge() and pciauto_config_device().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Bin Meng 2015-07-19 00:20:06 +08:00 committed by Simon Glass
parent 8326f136da
commit d11d9ef157
3 changed files with 61 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/pci/pci-uclass.c
View File

@ -301,14 +301,10 @@ int pci_auto_config_devices(struct udevice *bus)
for (ret = device_find_first_child(bus, &dev);
!ret && dev;
ret = device_find_next_child(&dev)) {
struct pci_controller *ctlr_hose;
unsigned int max_bus;
debug("%s: device %s\n", __func__, dev->name);
/* The root controller has the region information */
ctlr_hose = hose->ctlr->uclass_priv;
max_bus = pciauto_config_device(ctlr_hose, pci_get_bdf(dev));
max_bus = pciauto_config_device(hose, pci_get_bdf(dev));
sub_bus = max(sub_bus, max_bus);
}
debug("%s: done\n", __func__);

66
drivers/pci/pci_auto.c
View File

@ -213,11 +213,24 @@ void pciauto_setup_device(struct pci_controller *hose,
void pciauto_prescan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
struct pci_region *pci_mem = hose->pci_mem;
struct pci_region *pci_prefetch = hose->pci_prefetch;
struct pci_region *pci_io = hose->pci_io;
struct pci_region *pci_mem;
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
u16 cmdstat, prefechable_64;
#ifdef CONFIG_DM_PCI
/* The root controller has the region information */
struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
pci_mem = ctlr_hose->pci_mem;
pci_prefetch = ctlr_hose->pci_prefetch;
pci_io = ctlr_hose->pci_io;
#else
pci_mem = hose->pci_mem;
pci_prefetch = hose->pci_prefetch;
pci_io = hose->pci_io;
#endif
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
&prefechable_64);
@ -295,9 +308,22 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
struct pci_region *pci_mem = hose->pci_mem;
struct pci_region *pci_prefetch = hose->pci_prefetch;
struct pci_region *pci_io = hose->pci_io;
struct pci_region *pci_mem;
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
#ifdef CONFIG_DM_PCI
/* The root controller has the region information */
struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
pci_mem = ctlr_hose->pci_mem;
pci_prefetch = ctlr_hose->pci_prefetch;
pci_io = ctlr_hose->pci_io;
#else
pci_mem = hose->pci_mem;
pci_prefetch = hose->pci_prefetch;
pci_io = hose->pci_io;
#endif
/* Configure bus number registers */
#ifdef CONFIG_DM_PCI
@ -425,10 +451,26 @@ void pciauto_config_init(struct pci_controller *hose)
*/
int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
{
struct pci_region *pci_mem;
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
unsigned int sub_bus = PCI_BUS(dev);
unsigned short class;
int n;
#ifdef CONFIG_DM_PCI
/* The root controller has the region information */
struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
pci_mem = ctlr_hose->pci_mem;
pci_prefetch = ctlr_hose->pci_prefetch;
pci_io = ctlr_hose->pci_io;
#else
pci_mem = hose->pci_mem;
pci_prefetch = hose->pci_prefetch;
pci_io = hose->pci_io;
#endif
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
switch (class) {
@ -436,8 +478,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n",
PCI_DEV(dev));
pciauto_setup_device(hose, dev, 2, hose->pci_mem,
hose->pci_prefetch, hose->pci_io);
pciauto_setup_device(hose, dev, 2, pci_mem,
pci_prefetch, pci_io);
#ifdef CONFIG_DM_PCI
n = dm_pci_hose_probe_bus(hose, dev);
@ -467,8 +509,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
* just do a minimal setup of the bridge,
* let the OS take care of the rest
*/
pciauto_setup_device(hose, dev, 0, hose->pci_mem,
hose->pci_prefetch, hose->pci_io);
pciauto_setup_device(hose, dev, 0, pci_mem,
pci_prefetch, pci_io);
DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
PCI_DEV(dev));
@ -502,8 +544,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
DEBUGF("PCI AutoConfig: Found PowerPC device\n");
default:
pciauto_setup_device(hose, dev, 6, hose->pci_mem,
hose->pci_prefetch, hose->pci_io);
pciauto_setup_device(hose, dev, 6, pci_mem,
pci_prefetch, pci_io);
break;
}

7
drivers/pci/pci_common.c
View File

@ -224,7 +224,7 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose,
#ifdef CONFIG_DM_PCI
/* The root controller has the region information */
hose = hose->ctlr->uclass_priv;
hose = pci_bus_to_hose(0);
#endif
/*
@ -289,6 +289,11 @@ pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose,
return bus_addr;
}
#ifdef CONFIG_DM_PCI
/* The root controller has the region information */
hose = pci_bus_to_hose(0);
#endif
/*
* if PCI_REGION_MEM is set we do a two pass search with preference
* on matches that don't have PCI_REGION_SYS_MEMORY set