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spi: xilinx_spi: Fix to configure CPOL, CPHA mask 

priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.

This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.

Signed-off-by: Jagan Teki <jteki@openedev.com>
This commit is contained in:
Jagan Teki 2015-09-08 01:26:29 +05:30
parent 9a4c6e9abf
commit d5f60737db
1 changed files with 5 additions and 5 deletions
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10
drivers/spi/xilinx_spi.c
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@ -247,7 +247,7 @@ static int xilinx_spi_set_speed(struct udevice *bus, uint speed)
priv->freq = speed;
debug("xilinx_spi_set_speed: regs=%p, mode=%d\n", priv->regs,
debug("xilinx_spi_set_speed: regs=%p, speed=%d\n", priv->regs,
priv->freq);
return 0;
@ -260,13 +260,13 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode)
uint32_t spicr;
spicr = readl(&regs->spicr);
if (priv->mode & SPI_LSB_FIRST)
if (mode & SPI_LSB_FIRST)
spicr |= SPICR_LSB_FIRST;
if (priv->mode & SPI_CPHA)
if (mode & SPI_CPHA)
spicr |= SPICR_CPHA;
if (priv->mode & SPI_CPOL)
if (mode & SPI_CPOL)
spicr |= SPICR_CPOL;
if (priv->mode & SPI_LOOP)
if (mode & SPI_LOOP)
spicr |= SPICR_LOOP;
writel(spicr, &regs->spicr);