ARM: AM43xx: Do not enable RTC for AM4372 SoC

Commit "am335x: Enable RTC 32K OSC clock" describes the dependency
to enable RTC clks in bootloader. This is not true for AM4372.
In EPOS EVM RTC is not powered (VDDS_RTC grounded to 0). In GP EVM no
need to enble RTC in bootloader. So moving RTC enbling to its respective clock file.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla 2013-10-21 19:28:46 +05:30 committed by Tom Rini
parent 21107e0067
commit dd19de4192
3 changed files with 18 additions and 13 deletions

View File

@ -148,20 +148,8 @@ __weak void am33xx_spl_board_init(void)
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
}
static void rtc32k_enable(void)
__weak void rtc32k_enable(void)
{
struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
/*
* Unlock the RTC's registers. For more details please see the
* RTC_SS section of the TRM. In order to unlock we need to
* write these specific values (keys) in this order.
*/
writel(0x83e70b13, &rtc->kick0r);
writel(0x95a4f1e0, &rtc->kick1r);
/* Enable the RTC 32K OSC by setting bits 3 and 6. */
writel((1 << 3) | (1 << 6), &rtc->osc);
}
static void uart_soft_reset(void)

View File

@ -159,3 +159,19 @@ void enable_basic_clocks(void)
/* Select the Master osc 24 MHZ as Timer2 clock source */
writel(0x1, &cmdpll->clktimer2clk);
}
void rtc32k_enable(void)
{
struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
/*
* Unlock the RTC's registers. For more details please see the
* RTC_SS section of the TRM. In order to unlock we need to
* write these specific values (keys) in this order.
*/
writel(0x83e70b13, &rtc->kick0r);
writel(0x95a4f1e0, &rtc->kick1r);
/* Enable the RTC 32K OSC by setting bits 3 and 6. */
writel((1 << 3) | (1 << 6), &rtc->osc);
}

View File

@ -108,6 +108,7 @@ const struct dpll_params *get_dpll_ddr_params(void);
void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *);
void prcm_init(void);
void enable_basic_clocks(void);
void rtc32k_enable(void);
void do_enable_clocks(u32 *const *, u32 *const *, u8);
#endif