OMAP3: igep00x0: Convert to ti_omap3_common.h.
To reduce code duplication update omap3_igep00x0.h to use ti_omap3_common.h. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
This commit is contained in:
Enric Balletbò i Serra
Tom Rini
parent
c7964f86c2
commit
e37e954eba
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@ -10,20 +10,13 @@
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#ifndef __IGEP00X0_H
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#define __IGEP00X0_H
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#include <asm/sizes.h>
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#ifdef CONFIG_BOOT_NAND
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#define CONFIG_NAND
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#endif
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP34XX 1 /* which is a 34XX */
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#define CONFIG_OMAP_GPIO
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#define CONFIG_OMAP_COMMON
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_SDRC /* The chip has SDRC controller */
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap3.h>
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#include <configs/ti_omap3_common.h>
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#include <asm/mach-types.h>
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/*
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@ -32,47 +25,12 @@
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_REVISION_TAG 1
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_SUPPORT_RAW_INITRD
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/*
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* NS16550 Configuration
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*/
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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/* select serial console configuration */
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#define CONFIG_CONS_INDEX 3
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_SERIAL3 3
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
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115200}
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#define CONFIG_GENERIC_MMC 1
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#define CONFIG_MMC 1
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#define CONFIG_OMAP_HSMMC 1
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#define CONFIG_DOS_PARTITION 1
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/* define to enable boot progress via leds */
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#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
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(CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
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@ -95,21 +53,10 @@
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#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
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#define CONFIG_USBD_PRODUCT_NAME "IGEP"
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MMC /* MMC support */
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#ifdef CONFIG_BOOT_ONENAND
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#define CONFIG_CMD_ONENAND /* ONENAND support */
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#endif
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#ifdef CONFIG_BOOT_NAND
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#define CONFIG_CMD_NAND
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#endif
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#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
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(CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
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#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
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@ -117,24 +64,8 @@
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_NFS /* NFS support */
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#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
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#define CONFIG_MTD_DEVICE
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
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#undef CONFIG_CMD_IMLS /* List all found images */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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/*
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* TWL4030
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*/
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#define CONFIG_TWL4030_POWER 1
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#define CONFIG_BOOTDELAY 3
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/*#undef CONFIG_ENV_IS_NOWHERE*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"usbtty=cdc_acm\0" \
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@ -205,48 +136,6 @@
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"fi;" \
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"run nandboot;" \
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#define CONFIG_AUTO_COMPLETE 1
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "U-Boot # "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
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/* works on */
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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0x01F00000) /* 31MB */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
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/* load address */
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#define CONFIG_SYS_MONITOR_LEN (256 << 10)
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*
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* Physical Memory Map
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*
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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* FLASH and environment organization
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*/
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@ -263,23 +152,15 @@
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#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
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#endif
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#ifdef CONFIG_BOOT_NAND
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#ifdef CONFIG_NAND
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#define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_NAND_BASE NAND_BASE
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#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
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#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
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#define CONFIG_ENV_ADDR NAND_ENV_OFFSET
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#endif
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
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/*
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* SMSC911x Ethernet
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*/
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@ -289,54 +170,9 @@
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#define CONFIG_SMC911X_BASE 0x2C000000
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#endif /* (CONFIG_CMD_NET) */
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/*
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* Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
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* and older u-boot.bin with the new U-Boot SPL.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80008000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/* SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_TEXT_BASE 0x40200800
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#define CONFIG_SPL_MAX_SIZE (54 * 1024)
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#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
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/* move malloc and bss high to prevent clashing with the main image */
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#define CONFIG_SYS_SPL_MALLOC_START 0x87000000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
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#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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/* MMC boot config */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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/* OneNAND boot config */
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#ifdef CONFIG_BOOT_ONENAND
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#define CONFIG_SPL_ONENAND_SUPPORT
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/* OneNAND boot config */
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#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
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#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
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#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
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@ -345,13 +181,8 @@
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#endif
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#ifdef CONFIG_BOOT_NAND
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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/* NAND boot config */
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#ifdef CONFIG_NAND
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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@ -363,8 +194,6 @@
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#endif
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#endif /* __IGEP00X0_H */
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