Add support for Freescale M5271 processor
This commit is contained in:
parent
c4b465f63e
commit
eacbd31775
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@ -2,6 +2,9 @@
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Changes since U-Boot 1.1.4:
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Changes since U-Boot 1.1.4:
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======================================================================
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======================================================================
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* Add support for Freescale M5271 processor
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Patch by Zachary Landau, 26 Jan 2006
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* Fix 28F256J3A support on PM520 board
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* Fix 28F256J3A support on PM520 board
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(without bank-switching only 32 MB can be accessed)
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(without bank-switching only 32 MB can be accessed)
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@ -25,6 +25,11 @@
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#include <watchdog.h>
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#include <watchdog.h>
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#include <command.h>
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#include <command.h>
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#ifdef CONFIG_M5271
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#include <asm/immap_5271.h>
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#include <asm/m5271.h>
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#endif
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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#include <asm/immap_5272.h>
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#include <asm/immap_5272.h>
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#include <asm/m5272.h>
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#include <asm/m5272.h>
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@ -38,6 +43,41 @@
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#include <asm/m5249.h>
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#include <asm/m5249.h>
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#endif
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#endif
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#ifdef CONFIG_M5271
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int checkcpu (void)
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{
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puts ("CPU: MOTOROLA Coldfire MCF5271\n");
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return 0;
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}
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int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
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mbar_writeByte(MCF_RCM_RCR,
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MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
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return 0;
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};
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#if defined(CONFIG_WATCHDOG)
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void watchdog_reset (void)
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{
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mbar_writeShort(MCF_WTM_WSR, 0x5555);
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mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
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}
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int watchdog_disable (void)
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{
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mbar_writeShort(MCF_WTM_WCR, 0);
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return (0);
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}
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int watchdog_init (void)
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{
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mbar_writeShort(MCF_WTM_WCNTR, CONFIG_WATCHDOG_TIMEOUT);
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mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
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return (0);
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}
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#endif /* #ifdef CONFIG_WATCHDOG */
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#endif
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
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int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
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@ -24,6 +24,11 @@
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#include <common.h>
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#include <common.h>
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#include <watchdog.h>
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#include <watchdog.h>
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#ifdef CONFIG_M5271
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#include <asm/m5271.h>
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#include <asm/immap_5271.h>
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#endif
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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#include <asm/m5272.h>
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#include <asm/m5272.h>
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#include <asm/immap_5272.h>
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#include <asm/immap_5272.h>
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@ -38,6 +43,38 @@
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#include <asm/m5249.h>
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#include <asm/m5249.h>
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#endif
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#endif
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#if defined(CONFIG_M5271)
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void cpu_init_f (void)
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{
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#ifndef CONFIG_WATCHDOG
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/* Disable the watchdog if we aren't using it */
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mbar_writeShort(MCF_WTM_WCR, 0);
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#endif
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/* Set clockspeed to 100MHz */
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mbar_writeShort(MCF_FMPLL_SYNCR,
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MCF_FMPLL_SYNCR_MFD(0) | MCF_FMPLL_SYNCR_RFD(0));
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while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK);
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/* Enable UART pins */
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mbar_writeShort(MCF_GPIO_PAR_UART, MCF_GPIO_PAR_UART_U0TXD |
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MCF_GPIO_PAR_UART_U0RXD |
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MCF_GPIO_PAR_UART_U1RXD_UART1 |
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MCF_GPIO_PAR_UART_U1TXD_UART1);
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/* Enable Ethernet pins */
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mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
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}
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/*
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* initialize higher level parts of CPU like timers
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*/
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int cpu_init_r (void)
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{
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return (0);
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}
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#endif
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#if defined(CONFIG_M5272)
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#if defined(CONFIG_M5272)
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/*
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/*
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* Breath some life into the CPU...
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* Breath some life into the CPU...
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@ -25,6 +25,11 @@
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#include <malloc.h>
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#include <malloc.h>
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#include <asm/fec.h>
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#include <asm/fec.h>
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#ifdef CONFIG_M5271
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#include <asm/m5271.h>
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#include <asm/immap_5271.h>
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#endif
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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#include <asm/m5272.h>
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#include <asm/m5272.h>
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#include <asm/immap_5272.h>
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#include <asm/immap_5272.h>
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@ -41,7 +46,7 @@
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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#define FEC_ADDR (CFG_MBAR + 0x840)
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#define FEC_ADDR (CFG_MBAR + 0x840)
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#endif
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#endif
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#ifdef CONFIG_M5282
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#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
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#define FEC_ADDR (CFG_MBAR + 0x1000)
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#define FEC_ADDR (CFG_MBAR + 0x1000)
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#endif
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#endif
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@ -240,10 +245,22 @@ int eth_init (bd_t * bd)
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#endif
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#endif
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#undef ea
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#undef ea
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#ifdef CONFIG_M5271
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/* Clear multicast address hash table
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*/
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fecp->fec_ghash_table_high = 0;
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fecp->fec_ghash_table_low = 0;
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/* Clear individual address hash table
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*/
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fecp->fec_ihash_table_high = 0;
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fecp->fec_ihash_table_low = 0;
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#else
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/* Clear multicast address hash table
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/* Clear multicast address hash table
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*/
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*/
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fecp->fec_hash_table_high = 0;
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fecp->fec_hash_table_high = 0;
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fecp->fec_hash_table_low = 0;
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fecp->fec_hash_table_low = 0;
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#endif
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/* Set maximum receive buffer size.
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/* Set maximum receive buffer size.
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*/
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*/
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fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
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fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
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#else /* Half duplex mode */
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#else /* Half duplex mode */
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fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
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fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
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#ifdef CONFIG_M5271
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fecp->fec_r_cntrl |= (PKT_MAXBUF_SIZE << 16); /* set max frame length */
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#endif
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fecp->fec_x_cntrl = 0;
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fecp->fec_x_cntrl = 0;
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#endif
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#endif
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/* Set MII speed */
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/* Set MII speed */
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#include <watchdog.h>
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#include <watchdog.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#ifdef CONFIG_M5271
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#include <asm/m5271.h>
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#include <asm/immap_5271.h>
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#endif
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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#include <asm/m5272.h>
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#include <asm/m5272.h>
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#include <asm/immap_5272.h>
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#include <asm/immap_5272.h>
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}
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}
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#endif
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#endif
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#ifdef CONFIG_M5282
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#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
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int interrupt_init (void)
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int interrupt_init (void)
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{
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{
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return 0;
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return 0;
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#include <asm/mcfuart.h>
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#include <asm/mcfuart.h>
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#ifdef CONFIG_M5271
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#include <asm/m5271.h>
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#endif
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#ifdef CONFIG_M5272
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#ifdef CONFIG_M5272
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#include <asm/m5272.h>
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#include <asm/m5272.h>
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#endif
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#endif
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void rs_serial_setbaudrate(int port,int baudrate)
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void rs_serial_setbaudrate(int port,int baudrate)
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{
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{
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#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
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#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
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volatile unsigned char *uartp;
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volatile unsigned char *uartp;
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double clock, fraction;
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double clock, fraction;
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uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
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uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
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uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
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uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
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#ifndef CONFIG_M5271
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uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
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uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
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#endif
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#endif
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#endif
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};
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};
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void rs_serial_init(int port,int baudrate)
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void rs_serial_init(int port,int baudrate)
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*/
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*/
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_vectors:
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_vectors:
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#ifndef CONFIG_M5271
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.long 0x00000000, _START
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.long 0x00000000, _START
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#else
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.long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */
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#endif
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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movec %d0, %RAMBAR0
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movec %d0, %RAMBAR0
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#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
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#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
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#ifdef CONFIG_M5282
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#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
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/* Initialize IPSBAR */
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/* Initialize IPSBAR */
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move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
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move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
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move.l %d0, 0x40000000
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move.l %d0, 0x40000000
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#ifdef CONFIG_M5282
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/* Initialize FLASHBAR: locate internal Flash and validate it */
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/* Initialize FLASHBAR: locate internal Flash and validate it */
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move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
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move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
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movec %d0, %RAMBAR0
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movec %d0, %RAMBAR0
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#endif
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/* Initialize RAMBAR1: locate SRAM and validate it */
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/* Initialize RAMBAR1: locate SRAM and validate it */
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move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
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move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
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movec %d0, %RAMBAR1
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movec %d0, %RAMBAR1
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#ifdef CONFIG_M5271
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move.l #(_flash_setup-CFG_FLASH_BASE), %a0
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move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
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move.l #(CFG_INIT_RAM_ADDR), %a2
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_copy_flash:
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move.l (%a0)+, (%a2)+
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cmp.l %a0, %a1
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bgt.s _copy_flash
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#endif
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#endif
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jmp CFG_INIT_RAM_ADDR
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_after_flash_copy:
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#endif
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#if 0
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/* invalidate and disable cache */
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/* invalidate and disable cache */
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move.l #0x01000000, %d0 /* Invalidate cache cmd */
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move.l #0x01000000, %d0 /* Invalidate cache cmd */
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movec %d0, %CACR /* Invalidate cache */
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movec %d0, %CACR /* Invalidate cache */
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move.l #0, %d0
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move.l #0, %d0
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movec %d0, %ACR0
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movec %d0, %ACR0
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movec %d0, %ACR1
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movec %d0, %ACR1
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#endif
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/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
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/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
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move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
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move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
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/*------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------*/
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#ifdef CONFIG_M5271
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_flash_setup:
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move.l #0x1000, %d0
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move.w %d0, 0x40000080
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move.l #0x2180, %d0
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move.w %d0, 0x4000008A
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move.l #0x3f0001, %d0
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move.l %d0, 0x40000084
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jmp _after_flash_copy.L
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_flash_setup_end:
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#endif
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/*
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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*
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#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
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#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
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#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
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#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
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#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
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#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
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#elif defined(CONFIG_M5282)
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#elif defined(CONFIG_M5282) | defined(CONFIG_M5271)
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#define MCFTIMER_BASE1 0x150000 /* Base address of TIMER1 */
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#define MCFTIMER_BASE1 0x150000 /* Base address of TIMER1 */
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#define MCFTIMER_BASE2 0x160000 /* Base address of TIMER2 */
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#define MCFTIMER_BASE2 0x160000 /* Base address of TIMER2 */
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#define MCFTIMER_BASE3 0x170000 /* Base address of TIMER4 */
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#define MCFTIMER_BASE3 0x170000 /* Base address of TIMER4 */
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#define MCFUART_BASE1 0x140 /* Base address of UART1 */
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#define MCFUART_BASE1 0x140 /* Base address of UART1 */
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#define MCFUART_BASE2 0x180 /* Base address of UART2 */
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#define MCFUART_BASE2 0x180 /* Base address of UART2 */
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#endif
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#endif
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||||||
#elif defined(CONFIG_M5282)
|
#elif defined(CONFIG_M5282) || defined(CONFIG_M5271)
|
||||||
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
|
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
|
||||||
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
|
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
|
||||||
#define MCFUART_BASE3 0x280 /* Base address of UART3 */
|
#define MCFUART_BASE3 0x280 /* Base address of UART3 */
|
||||||
|
|
|
@ -43,7 +43,7 @@ struct pt_regs {
|
||||||
ulong a4;
|
ulong a4;
|
||||||
ulong a5;
|
ulong a5;
|
||||||
ulong a6;
|
ulong a6;
|
||||||
#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249)
|
#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
|
||||||
unsigned format : 4; /* frame format specifier */
|
unsigned format : 4; /* frame format specifier */
|
||||||
unsigned vector : 12; /* vector offset */
|
unsigned vector : 12; /* vector offset */
|
||||||
unsigned short sr;
|
unsigned short sr;
|
||||||
|
|
|
@ -27,6 +27,11 @@
|
||||||
|
|
||||||
#include <asm/mcftimer.h>
|
#include <asm/mcftimer.h>
|
||||||
|
|
||||||
|
#ifdef CONFIG_M5271
|
||||||
|
#include <asm/m5271.h>
|
||||||
|
#include <asm/immap_5271.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_M5272
|
#ifdef CONFIG_M5272
|
||||||
#include <asm/m5272.h>
|
#include <asm/m5272.h>
|
||||||
#include <asm/immap_5272.h>
|
#include <asm/immap_5272.h>
|
||||||
|
@ -43,7 +48,7 @@
|
||||||
|
|
||||||
|
|
||||||
static ulong timestamp;
|
static ulong timestamp;
|
||||||
#ifdef CONFIG_M5282
|
#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
|
||||||
static unsigned short lastinc;
|
static unsigned short lastinc;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -127,7 +132,7 @@ void set_timer (ulong t)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_M5282)
|
#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
|
||||||
|
|
||||||
void udelay(unsigned long usec)
|
void udelay(unsigned long usec)
|
||||||
{
|
{
|
||||||
|
|
Loading…
Reference in New Issue