sysmobts_v1: Add support for the sysmocom bts version one.
This commit is contained in:
Holger Hans Peter Freyther
parent
14f2a8953d
commit
eb061d7455
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@ -1104,6 +1104,7 @@ extern unsigned int __machine_arch_type;
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#define MACH_TYPE_THALES_ADC 3492
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#define MACH_TYPE_UBISYS_P9D_EVP 3493
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#define MACH_TYPE_ATDGP318 3494
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#define MACH_TYPE_SYSMOBTS_V1 3517
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#define MACH_TYPE_OMAP5_SEVM 3777
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#define MACH_TYPE_ARMADILLO_800EVA 3863
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#define MACH_TYPE_KZM9G 4140
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@ -14248,6 +14249,19 @@ extern unsigned int __machine_arch_type;
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# define machine_is_kzm9g() (0)
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#endif
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#ifdef CONFIG_MACH_SYSMOBTS_V1
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# ifdef machine_arch_type
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# undef machine_arch_type
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# define machine_arch_type __machine_arch_type
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# else
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# define machine_arch_type MACH_TYPE_SYSMOBTS_V1
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# endif
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# define machine_is_sysmobts_v1() (machine_arch_type == MACH_TYPE_SYSMOBTS_V1)
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#else
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# define machine_is_sysmobts_v1() (0)
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#endif
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/*
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* These have not yet been registered
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*/
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@ -0,0 +1,56 @@
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#
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# Copyright (C) 2012 sysmocom s.f.m.c GmbH
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# Copyright (C) 2009 Lyrtech RD Inc. <www.lyrtech.com>
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#
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# Based on dvevm/config.mk, original copyrights follow:
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# (C) Copyright 2000, 2001, 2002
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := $(BOARD).o
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SOBJS := board_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# This is for $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,32 @@
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/*
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* Copyright (C) 2009 Lyrtech RD Inc. <www.lyrtech.com>
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*
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* Based on dvevm/board_init.S, original copyright follows:
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Board-specific low level initialization code. Called at the very end
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* of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
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* initialization required.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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.globl dv_board_init
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dv_board_init:
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mov pc, lr
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@ -0,0 +1,23 @@
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#
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# Copyright (C) 2012 sysmocom s.f.m.c. GmbH
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# Copyright (C) 2009 Lyrtech RD Inc. <www.lyrtech.com>
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#
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# Based on dvevm/config.mk, original copyrights follow:
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# (C) Copyright 2002
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# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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#
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# (C) Copyright 2003
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# Texas Instruments, <www.ti.com>
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# Swaminathan <swami.iyer@ti.com>
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#
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# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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# sysmocom bts v1 board (ARM926EJS) cpu
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#
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# sysmocom bts v1 board has 1 bank of 128 MB DDR RAM
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# Physical Address:
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# 8000'0000 to 8800'0000
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#
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CONFIG_SYS_TEXT_BASE = 0x84000000
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@ -0,0 +1,112 @@
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/*
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* Copyright (C) 2012 sysmocom s.f.m.c. GmbH
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* Copyright (C) 2009 Lyrtech RD Inc. <www.lyrtech.com>
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*
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* Based on dvevm/dvevm.c, original copyright follows:
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Parts are shamelessly stolen from various TI sources, original copyright
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* follows:
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* -----------------------------------------------------------------
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*
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* Copyright (C) 2004 Texas Instruments.
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*
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* ----------------------------------------------------------------------------
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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* ----------------------------------------------------------------------------
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/davinci_misc.h>
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#define DAVINCI_PLLM (0x01C40910) /* PLL 1 Multiplier */
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#define DAVINCI_AWCCR (0x01E00004) /* EMIF-A async wait cycle config register. */
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#define DAVINCI_AWCCR_VAL (0x000000FF) /* EMIF-A async wait cycle config register value. */
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#define DAVINCI_A1CR (0x01E00010) /* EMIF-A CS2 config register. */
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#define DAVINCI_A1CR_VAL (0x44502280) /* EMIF-A CS2 value for NAND. */
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#define DAVINCI_A1CR_VAL8 (0x44502280) /* EMIF-A CS2 value for NAND. */
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#define DAVINCI_A2CR (0x01E00014) /* EMIF-A CS3 config register. */
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#define DAVINCI_A2CR_VAL (0x00430491) /* EMIF-A CS3 value for FPGA. */
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#define DAVINCI_A2CR_VAL8 (0x00630591) /* EMIF-A CS3 value for FPGA. */
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* arch number of the board */
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gd->bd->bi_arch_number = MACH_TYPE_SYSMOBTS_V1;
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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/* Configure pins */
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REG(PINMUX0) = 0x80000c1f;
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REG(PINMUX1) = 0x00050183;
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/* Configure AEMIF AWCCR */
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REG(DAVINCI_AWCCR) = DAVINCI_AWCCR_VAL;
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/* DM644X @ 594/297 MHz */
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if ( (REG(DAVINCI_PLLM) & 0x0FF) < 22 ) {
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/* Configure AEMIF CS2 (nand) */
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REG(DAVINCI_A1CR) = DAVINCI_A1CR_VAL;
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/* Configure AEMIF CS3 (fpga) */
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REG(DAVINCI_A2CR) = DAVINCI_A2CR_VAL;
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/* DM644X @ 810/405 MHz */
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} else {
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/* Configure AEMIF CS2 (nand) */
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REG(DAVINCI_A1CR) = DAVINCI_A1CR_VAL8;
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/* Configure AEMIF CS3 (fpga) */
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REG(DAVINCI_A2CR) = DAVINCI_A2CR_VAL8;
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}
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davinci_errata_workarounds();
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/* Power on required peripherals */
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lpsc_on(DAVINCI_LPSC_GPIO);
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#if !defined(CONFIG_SYS_USE_DSPLINK)
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/* Powerup the DSP */
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dsp_on();
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#endif /* CONFIG_SYS_USE_DSPLINK */
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davinci_enable_uart0();
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davinci_enable_emac();
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davinci_enable_i2c();
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lpsc_on(DAVINCI_LPSC_TIMER1);
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timer_init();
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return(0);
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}
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int misc_init_r(void)
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{
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uint8_t eeprom_enetaddr[6];
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/* Read Ethernet MAC address from EEPROM if available. */
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if (dvevm_read_mac_address(eeprom_enetaddr))
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davinci_sync_env_enetaddr(eeprom_enetaddr);
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return(0);
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}
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@ -146,6 +146,7 @@ davinci_dm6467evm arm arm926ejs dm6467evm davinci
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davinci_dm6467Tevm arm arm926ejs dm6467evm davinci davinci davinci_dm6467evm:DAVINCI_DM6467TEVM,REFCLK_FREQ=33000000
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davinci_dvevm arm arm926ejs dvevm davinci davinci
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davinci_schmoogie arm arm926ejs schmoogie davinci davinci
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davinci_sysmobts_v1 arm arm926ejs sysmobts_v1 davinci davinci
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davinci_sffsdr arm arm926ejs sffsdr davinci davinci
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davinci_sonata arm arm926ejs sonata davinci davinci
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ea20 arm arm926ejs ea20 davinci davinci
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@ -0,0 +1,183 @@
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/*
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* Copyright (C) 2012 sysmocom s.f.m.c GmbH
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* Copyright (C) 2009 Lyrtech RD Inc. <www.lyrtech.com>
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*
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* Based on dvevm/dvevm.c, original copyright follows:
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/sizes.h>
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/*=======*/
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/* Board */
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/*=======*/
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#define SYSMOBTS_V1
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/*===================*/
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/* SoC Configuration */
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/*===================*/
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#define CONFIG_ARM926EJS /* arm926ejs CPU core */
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#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
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#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SOC_DM644X
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/*====================*/
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/* EEPROM definitions */
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/*====================*/
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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/*=============*/
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/* Memory Info */
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/*=============*/
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#define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */
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#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
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#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define CONFIG_STACKSIZE (256*1024) /* regular stack */
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#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
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#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
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/*====================*/
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/* Serial Driver info */
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/*====================*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
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#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
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#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*===================*/
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/* I2C Configuration */
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/*===================*/
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#define CONFIG_HARD_I2C
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#define CONFIG_DRIVER_DAVINCI_I2C
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#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
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#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
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/*==================================*/
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/* Network & Ethernet Configuration */
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/*==================================*/
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_MULTI
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/*=====================*/
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/* Flash & Environment */
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/*=====================*/
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define MTDIDS_DEFAULT \
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"nand0=davinci_nand.0"
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#define MTDPARTS_DEFAULT \
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"mtdparts=davinci_nand.0:" \
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"128k(U-Boot Params)ro," \
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"640k(UBL)ro," \
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"256k(U-Boot)ro," \
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"3m(Kernel)," \
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"32m(Linux Root)," \
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"-(User Storage)"
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
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#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
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#define CONFIG_SYS_NAND_BASE 0x02000000
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_HW_ECC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
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#define DEF_BOOTM ""
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/*==============================*/
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/* U-Boot general configuration */
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/*==============================*/
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#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_BOOTDELAY 2
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#define CONFIG_BOOTFILE "uImage" /* Boot file name */
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#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_LOAD_ADDR 0x87000000 /* default Linux kernel load address */
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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#undef CONFIG_MUSB_HCD
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#undef CONFIG_USB_DAVINCI
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/*===================*/
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/* Linux Information */
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/*===================*/
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#define LINUX_BOOT_PARAM_ADDR 0x80000100
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/mtdblock4 rootfstype=jffs2 rw " \
|
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"noinitrd"
|
||||
#define CONFIG_BOOTCOMMAND "mtdpart default;setenv bootargs ${bootargs} ${mtdparts}; nboot 87A00000 0 100000; bootm"
|
||||
/*=================*/
|
||||
/* U-Boot commands */
|
||||
/*=================*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_ASKENV
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SAVES
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_ELF
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_SETGETDCR
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#define CONFIG_CMD_NAND
|
||||
|
||||
#define CONFIG_MAX_RAM_BANK_SIZE (128 << 20) /* 128 MB */
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
|
||||
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/* bdinfo should show the clocks */
|
||||
#ifdef CONFIG_CMD_BDI
|
||||
#define CONFIG_CLOCKS
|
||||
#endif
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue