Merge branch 'master' of git://git.denx.de/u-boot-microblaze

* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Enable FDT/FIT support
  microblaze: Remove address offset for uart16550
  microblaze: Do not select NFS for platforms without ethernet
  microblaze: Clean up reset asm code
  microblaze: Save and restore first unused vector
  microblaze: Setup MB vectors if feature is enable for u-boot
  microblaze: Remove debug saving value
This commit is contained in:
Wolfgang Denk 2011-10-04 21:32:16 +02:00
commit ec594e8c98
2 changed files with 39 additions and 37 deletions

View File

@ -30,6 +30,13 @@
.text .text
.global _start .global _start
_start: _start:
/*
* reserve registers:
* r10: Stores little/big endian offset for vectors
* r2: Stores imm opcode
* r3: Stores brai opcode
*/
mts rmsr, r0 /* disable cache */ mts rmsr, r0 /* disable cache */
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
addi r1, r1, -4 /* Decrement SP to top of memory */ addi r1, r1, -4 /* Decrement SP to top of memory */
@ -44,52 +51,34 @@ _start:
* 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3 * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
*/ */
addik r6, r0, 0x2 /* BIG/LITTLE endian offset */ addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
swi r6, r0, 0 lwi r7, r0, 0x28
lbui r10, r0, 0 swi r6, r0, 0x28 /* used first unused MB vector */
swi r6, r0, 0x40 lbui r10, r0, 0x28 /* used first unused MB vector */
swi r10, r0, 0x50 swi r7, r0, 0x28
/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ /* add opcode instruction for 32bit jump - 2 instruction imm & brai */
addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ addi r2, r0, 0xb0000000 /* hex b000 opcode imm */
swi r6, r0, 0x0 /* reset address */ addi r3, r0, 0xb8080000 /* hew b808 opcode brai */
swi r6, r0, 0x8 /* user vector exception */
swi r6, r0, 0x10 /* interrupt */
swi r6, r0, 0x20 /* hardware exception */
addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/
swi r6, r0, 0x4 /* reset address */
swi r6, r0, 0xC /* user vector exception */
swi r6, r0, 0x14 /* interrupt */
swi r6, r0, 0x24 /* hardware exception */
#ifdef CONFIG_SYS_RESET_ADDRESS #ifdef CONFIG_SYS_RESET_ADDRESS
/* reset address */ /* reset address */
swi r2, r0, 0x0 /* reset address - imm opcode */
swi r3, r0, 0x4 /* reset address - brai opcode */
addik r6, r0, CONFIG_SYS_RESET_ADDRESS addik r6, r0, CONFIG_SYS_RESET_ADDRESS
sw r6, r1, r0 sw r6, r1, r0
lhu r7, r1, r0 lhu r7, r1, r10
shi r7, r0, 0x2 rsubi r8, r10, 0x2
shi r6, r0, 0x6 sh r7, r0, r8
/* rsubi r8, r10, 0x6
* Copy U-Boot code to CONFIG_SYS_TEXT_BASE sh r6, r0, r8
* solve problem with sbrk_base
*/
#if (CONFIG_SYS_RESET_ADDRESS != CONFIG_SYS_TEXT_BASE)
addi r4, r0, __end
addi r5, r0, __text_start
rsub r4, r5, r4 /* size = __end - __text_start */
addi r6, r0, CONFIG_SYS_RESET_ADDRESS /* source address */
addi r7, r0, 0 /* counter */
4:
lw r8, r6, r7
sw r8, r5, r7
addi r7, r7, 0x4
cmp r8, r4, r7
blti r8, 4b
#endif
#endif #endif
#ifdef CONFIG_SYS_USR_EXCEP #ifdef CONFIG_SYS_USR_EXCEP
/* user_vector_exception */ /* user_vector_exception */
swi r2, r0, 0x8 /* user vector exception - imm opcode */
swi r3, r0, 0xC /* user vector exception - brai opcode */
addik r6, r0, _exception_handler addik r6, r0, _exception_handler
sw r6, r1, r0 sw r6, r1, r0
/* /*
@ -121,6 +110,9 @@ _start:
#ifdef CONFIG_SYS_INTC_0 #ifdef CONFIG_SYS_INTC_0
/* interrupt_handler */ /* interrupt_handler */
swi r2, r0, 0x10 /* interrupt - imm opcode */
swi r3, r0, 0x14 /* interrupt - brai opcode */
addik r6, r0, _interrupt_handler addik r6, r0, _interrupt_handler
sw r6, r1, r0 sw r6, r1, r0
lhu r7, r1, r10 lhu r7, r1, r10
@ -131,6 +123,9 @@ _start:
#endif #endif
/* hardware exception */ /* hardware exception */
swi r2, r0, 0x20 /* hardware exception - imm opcode */
swi r3, r0, 0x24 /* hardware exception - brai opcode */
addik r6, r0, _hw_exception_handler addik r6, r0, _hw_exception_handler
sw r6, r1, r0 sw r6, r1, r0
lhu r7, r1, r10 lhu r7, r1, r10

View File

@ -44,7 +44,7 @@
# define CONFIG_SYS_NS16550_REG_SIZE -4 # define CONFIG_SYS_NS16550_REG_SIZE -4
# define CONFIG_CONS_INDEX 1 # define CONFIG_CONS_INDEX 1
# define CONFIG_SYS_NS16550_COM1 \ # define CONFIG_SYS_NS16550_COM1 \
(XILINX_UART16550_BASEADDR + 0x1000 + 0x3) (XILINX_UART16550_BASEADDR + 0x1000)
# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
# define CONFIG_BAUDRATE 115200 # define CONFIG_BAUDRATE 115200
@ -60,6 +60,7 @@
/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
/* ethernet */ /* ethernet */
#undef CONFIG_SYS_ENET
#ifdef XILINX_EMACLITE_BASEADDR #ifdef XILINX_EMACLITE_BASEADDR
# define CONFIG_XILINX_EMACLITE 1 # define CONFIG_XILINX_EMACLITE 1
# define CONFIG_SYS_ENET # define CONFIG_SYS_ENET
@ -243,6 +244,7 @@
#ifndef CONFIG_SYS_ENET #ifndef CONFIG_SYS_ENET
# undef CONFIG_CMD_NET # undef CONFIG_CMD_NET
# undef CONFIG_NET_MULTI # undef CONFIG_NET_MULTI
# undef CONFIG_CMD_NFS
#else #else
# define CONFIG_CMD_PING # define CONFIG_CMD_PING
# define CONFIG_CMD_DHCP # define CONFIG_CMD_DHCP
@ -325,4 +327,9 @@
# define CONFIG_SYS_PROMPT_HUSH_PS2 "> " # define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#endif #endif
/* Enable flat device tree support */
#define CONFIG_LMB 1
#define CONFIG_FIT 1
#define CONFIG_OF_LIBFDT 1
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */