tegra: fdt: Add LCD definitions for Tegra
Add LCD definitions and also a proposed binding for LCD displays. The PWM is as per what will likely be committed to linux-next soon. The displaymode binding comes from a proposal here: http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html The panel binding is new, and fills a need to specify the panel timings and other tegra-specific information. Should a binding appear that allows the pwm to handle this automatically, we can revisit this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Simon Glass
Tom Warren
parent
beca1fdeff
commit
eefe3e598e
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@ -218,4 +218,102 @@
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#pwm-cells = <2>;
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};
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host1x {
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compatible = "nvidia,tegra20-host1x", "simple-bus";
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reg = <0x50000000 0x00024000>;
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interrupts = <0 65 0x04 /* mpcore syncpt */
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0 67 0x04>; /* mpcore general */
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x54000000 0x54000000 0x04000000>;
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/* video-encoding/decoding */
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mpe {
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reg = <0x54040000 0x00040000>;
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interrupts = <0 68 0x04>;
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status = "disabled";
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};
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/* video input */
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vi {
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reg = <0x54080000 0x00040000>;
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interrupts = <0 69 0x04>;
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status = "disabled";
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};
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/* EPP */
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epp {
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reg = <0x540c0000 0x00040000>;
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interrupts = <0 70 0x04>;
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status = "disabled";
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};
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/* ISP */
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isp {
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reg = <0x54100000 0x00040000>;
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interrupts = <0 71 0x04>;
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status = "disabled";
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};
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/* 2D engine */
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gr2d {
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reg = <0x54140000 0x00040000>;
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interrupts = <0 72 0x04>;
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status = "disabled";
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};
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/* 3D engine */
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gr3d {
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reg = <0x54180000 0x00040000>;
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status = "disabled";
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};
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/* display controllers */
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dc@54200000 {
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compatible = "nvidia,tegra20-dc";
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reg = <0x54200000 0x00040000>;
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interrupts = <0 73 0x04>;
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status = "disabled";
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rgb {
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status = "disabled";
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};
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};
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dc@54240000 {
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compatible = "nvidia,tegra20-dc";
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reg = <0x54240000 0x00040000>;
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interrupts = <0 74 0x04>;
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status = "disabled";
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rgb {
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status = "disabled";
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};
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};
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/* outputs */
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hdmi {
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compatible = "nvidia,tegra20-hdmi";
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reg = <0x54280000 0x00040000>;
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interrupts = <0 75 0x04>;
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status = "disabled";
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};
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tvo {
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compatible = "nvidia,tegra20-tvo";
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reg = <0x542c0000 0x00040000>;
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interrupts = <0 76 0x04>;
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status = "disabled";
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};
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dsi {
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compatible = "nvidia,tegra20-dsi";
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reg = <0x54300000 0x00040000>;
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status = "disabled";
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};
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};
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};
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@ -0,0 +1,42 @@
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videomode bindings
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==================
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(from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
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Required properties:
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- xres, yres: Display resolution
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- left-margin, right-margin, hsync-len: Horizontal Display timing
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parameters in pixels
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- upper-margin, lower-margin, vsync-len: Vertical display timing
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parameters in lines
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- clock: display clock in Hz
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Optional properties:
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- width-mm, height-mm: Display dimensions in mm
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- hsync-active-high (bool): Hsync pulse is active high
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- vsync-active-high (bool): Vsync pulse is active high
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- interlaced (bool): This is an interlaced mode
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- doublescan (bool): This is a doublescan mode
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There are different ways of describing a display mode. The devicetree
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representation corresponds to the one used by the Linux Framebuffer
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framework described here in Documentation/fb/framebuffer.txt. This
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representation has been chosen because it's the only format which does
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not allow for inconsistent parameters. Unlike the Framebuffer framework
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the devicetree has the clock in Hz instead of ps.
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Example:
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display@0 {
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/* 1920x1080p24 */
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clock = <52000000>;
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xres = <1920>;
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yres = <1080>;
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left-margin = <25>;
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right-margin = <25>;
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hsync-len = <25>;
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lower-margin = <2>;
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upper-margin = <2>;
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vsync-len = <2>;
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hsync-active-high;
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};
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@ -0,0 +1,85 @@
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Display Controller
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------------------
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(there isn't yet a generic binding in Linux, so this describes what is in
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U-Boot, and may change based on Linux activity)
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The device node for a display device is as described in the document
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"Open Firmware Recommended Practice : Universal Serial Bus" with the
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following modifications and additions :
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Required properties :
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- compatible : Should be "nvidia,tegra20-dc"
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Required subnode 'rgb' is as follows:
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Required properties (rgb) :
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- nvidia,panel : phandle of LCD panel information
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The panel node describes the panel itself. This has the properties listed in
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displaymode.txt as well as:
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Required properties (panel) :
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- nvidia,bits-per-pixel: number of bits per pixel (depth)
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- nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
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- nvidia,panel-timings: 4 cells containing required timings in ms:
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* delay before asserting panel_vdd
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* delay between panel_vdd-rise and data-rise
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* delay between data-rise and backlight_vdd-rise
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* delay between backlight_vdd and pwm-rise
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* delay between pwm-rise and backlight_en-rise
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Optional GPIO properies all have (phandle, GPIO number, flags):
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- nvidia,backlight-enable-gpios: backlight enable GPIO
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- nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
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- nvidia,backlight-vdd-gpios: backlight power GPIO
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- nvidia,panel-vdd-gpios: panel power GPIO
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Example:
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host1x {
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compatible = "nvidia,tegra20-host1x", "simple-bus";
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reg = <0x50000000 0x00024000>;
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interrupts = <0 65 0x04 /* mpcore syncpt */
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0 67 0x04>; /* mpcore general */
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#address-cells = <1>;
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#size-cells = <1>;
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status = "okay";
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ranges = <0x54000000 0x54000000 0x04000000>;
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dc@54200000 {
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compatible = "nvidia,tegra20-dc";
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reg = <0x54200000 0x00040000>;
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interrupts = <0 73 0x04>;
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status = "okay";
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rgb {
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status = "okay";
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nvidia,panel = <&lcd_panel>;
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};
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};
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};
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lcd_panel: panel {
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/* Seaboard has 1366x768 */
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clock = <70600000>;
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xres = <1366>;
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yres = <768>;
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left-margin = <58>;
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right-margin = <58>;
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hsync-len = <58>;
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lower-margin = <4>;
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upper-margin = <4>;
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vsync-len = <4>;
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hsync-active-high;
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nvidia,bits-per-pixel = <16>;
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nvidia,pwm = <&pwm 2 0>;
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nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
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nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
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nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
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nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
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nvidia,panel-timings = <400 4 203 17 15>;
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};
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