config: remove platform CONFIG_SYS_HZ definition part 2/2

Remove platform CONFIG_SYS_HZ definition for configs a-z*. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-10-04 08:40:05 -05:00 · 2013-10-04 08:40:05 -05:00 · f232950f82
parent cdb23792e8
commit f232950f82
289 changed files with 0 additions and 453 deletions
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@ -15,9 +15,6 @@

 #define CONFIG_NR_DRAM_BANKS_MAX	2

-/* 1KHz clock tick */
-#define CONFIG_SYS_HZ			1000
-
 /* UART configuration */
 #if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6)
 #define CONFIG_SYS_NS16550_SERIAL
--- a/arch/blackfin/include/asm/config.h
+++ b/arch/blackfin/include/asm/config.h
@ -155,13 +155,6 @@
 #ifndef CONFIG_SYS_MAXARGS
 # define CONFIG_SYS_MAXARGS 16
 #endif
-#if defined(CONFIG_SYS_HZ)
-# if (CONFIG_SYS_HZ != 1000)
-#  warning "CONFIG_SYS_HZ must always be 1000"
-# endif
-# undef CONFIG_SYS_HZ
-#endif
-#define CONFIG_SYS_HZ 1000

 /* Blackfin POST tests */
 #ifdef CONFIG_POST_BSPEC1_GPIO_LEDS
--- a/include/configs/a320evb.h
+++ b/include/configs/a320evb.h
@ -37,7 +37,6 @@
 /*
 * Timer
 */
-#define CONFIG_SYS_HZ		1000	/* timer ticks per second */

 /*
 * Real Time Clock
--- a/include/configs/a3m071.h
+++ b/include/configs/a3m071.h
@ -264,7 +264,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x00100000

-#define CONFIG_SYS_HZ			1000
 #define CONFIG_LOOPW
 #define CONFIG_SYS_CONSOLE_INFO_QUIET	/* don't print console @ startup*/

--- a/include/configs/a4m072.h
+++ b/include/configs/a4m072.h
@ -285,8 +285,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
 #if defined(CONFIG_CMD_KGDB)
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
--- a/include/configs/ac14xx.h
+++ b/include/configs/ac14xx.h
@ -440,9 +440,6 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE

-/* decrementer freq: 1ms ticks */
-#define CONFIG_SYS_HZ		1000
-
 /*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
--- a/include/configs/actux1.h
+++ b/include/configs/actux1.h
@ -78,7 +78,6 @@

 /* timer clock - 2* OSC_IN system clock */
 #define CONFIG_IXP425_TIMER_CLK                 66666666
-#define CONFIG_SYS_HZ				1000

 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR			0x00010000
--- a/include/configs/actux2.h
+++ b/include/configs/actux2.h
@ -71,7 +71,6 @@

 /* timer clock - 2* OSC_IN system clock */
 #define CONFIG_IXP425_TIMER_CLK                 66666666
-#define CONFIG_SYS_HZ				1000

 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR			0x00010000
--- a/include/configs/actux3.h
+++ b/include/configs/actux3.h
@ -69,7 +69,6 @@

 /* timer clock - 2* OSC_IN system clock */
 #define CONFIG_IXP425_TIMER_CLK                 66666666
-#define CONFIG_SYS_HZ				1000

 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR			0x00010000
--- a/include/configs/actux4.h
+++ b/include/configs/actux4.h
@ -76,7 +76,6 @@

 /* timer clock - 2* OSC_IN system clock */
 #define CONFIG_IXP425_TIMER_CLK                 66000000
-#define CONFIG_SYS_HZ				1000

 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR			0x00010000
--- a/include/configs/adp-ag101.h
+++ b/include/configs/adp-ag101.h
@ -40,12 +40,6 @@
 /*
 * Timer
 */
-
-/*
- * According to the discussion in u-boot mailing list before,
- * CONFIG_SYS_HZ at 1000 is mandatory.
- */
-#define CONFIG_SYS_HZ		1000
 #define CONFIG_SYS_CLK_FREQ	48000000
 #define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ

--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@ -40,12 +40,6 @@
 /*
 * Timer
 */
-
-/*
- * According to the discussion in u-boot mailing list before,
- * CONFIG_SYS_HZ at 1000 is mandatory.
- */
-#define CONFIG_SYS_HZ		1000
 #define CONFIG_SYS_CLK_FREQ	39062500
 #define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ

--- a/include/configs/adp-ag102.h
+++ b/include/configs/adp-ag102.h
@ -32,12 +32,6 @@
 /*
 * Timer
 */
-
-/*
- * According to the discussion in u-boot mailing list before,
- * CONFIG_SYS_HZ at 1000 is mandatory.
- */
-#define CONFIG_SYS_HZ		1000
 #define CONFIG_SYS_CLK_FREQ	(66000000 * 2)
 #define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ

--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@ -337,8 +337,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
 #if defined(CONFIG_CMD_KGDB)
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@ -17,7 +17,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK		18429952	/* from 18.432 MHz crystal */
 #define CONFIG_SYS_AT91_SLOW_CLOCK		32768
-#define CONFIG_SYS_HZ				1000

 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DISPLAY_CPUINFO
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@ -254,8 +254,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
 #define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_into (bd_t) */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_CMDLINE_EDITING	1	/* add command line history	*/
 #define CONFIG_LOOPW            1       /* enable loopw command         */
 #define CONFIG_MX_CYCLIC	1       /* enable mdc/mwc commands      */
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@ -239,7 +239,6 @@
 */
 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000

 /*-----------------------------------------------------------------------
 * Physical Memory Map
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@ -231,7 +231,6 @@
 */
 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000

 /*-----------------------------------------------------------------------
 * Physical Memory Map
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@ -76,7 +76,6 @@

 #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000

 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@ -89,8 +89,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x100000  /* default load address	*/
 #define CONFIG_SYS_EXTBDINFO			/* To use extended board_into (bd_t) */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks	*/
-
 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE		/* add autocompletion support	*/
 #define CONFIG_LOOPW			/* enable loopw command         */
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@ -157,6 +157,5 @@
 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ		1000

 #endif	/* __AP325RXA_H */
--- a/include/configs/ap_sh4a_4a.h
+++ b/include/configs/ap_sh4a_4a.h
@ -160,6 +160,5 @@
 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
-#define CONFIG_SYS_HZ       1000

 #endif	/* __AP_SH4A_4A_H */
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@ -484,8 +484,6 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE

-#define CONFIG_SYS_HZ		1000
-
 /*
 * For booting Linux, the board info and command line data
 * have to be in the first 256 MB of memory, since this is
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@ -140,6 +140,5 @@
 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV	4
-#define CONFIG_SYS_HZ		1000

 #endif	/* __ARMADILLO_800EVA_H */
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@ -144,8 +144,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)

-#define CONFIG_SYS_HZ			1000
-
 #define CONFIG_RD_LVL

 #define CONFIG_NR_DRAM_BANKS	8
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@ -110,10 +110,8 @@
 /*
 * Defines processor clock - important for correct timings concerning serial
 * interface etc.
- * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
 */

-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CLK			80000000
 #define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 3)
 #define CONFIG_SYS_SDRAM_SIZE		32		/* SDRAM size in MB */
--- a/include/configs/at91rm9200ek.h
+++ b/include/configs/at91rm9200ek.h
@ -43,7 +43,6 @@
 #define AT91C_MAIN_CLOCK		((AT91C_XTAL_CLOCK / 4) * 39)
 #define AT91C_MASTER_CLOCK		(AT91C_MAIN_CLOCK / 3 )
 #define CONFIG_SYS_HZ_CLOCK		(AT91C_MASTER_CLOCK / 2)
-#define CONFIG_SYS_HZ			1000

 /* CPU configuration */
 #define CONFIG_AT91RM9200
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@ -28,7 +28,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
-#define CONFIG_SYS_HZ			1000

 /* Define actual evaluation board type from used processor type */
 #ifdef CONFIG_AT91SAM9G20
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@ -14,7 +14,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ			1000

 #ifdef CONFIG_AT91SAM9G10
 #define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@ -26,7 +26,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	16367660 /* 16.367 MHz crystal */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
-#define CONFIG_SYS_HZ			1000

 #define CONFIG_AT91SAM9263EK	1	/* It's an AT91SAM9263EK Board */

--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@ -21,7 +21,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
-#define CONFIG_SYS_HZ		        1000

 #define CONFIG_AT91SAM9M10G45EK
 #define CONFIG_AT91FAMILY
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@ -24,7 +24,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	16000000	/* main clock xtal */
-#define CONFIG_SYS_HZ			1000

 /* Misc CPU related */
 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@ -18,7 +18,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */
-#define CONFIG_SYS_HZ			1000

 #define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */

--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@ -16,7 +16,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
-#define CONFIG_SYS_HZ			1000

 #define CONFIG_AT91SAM9X5EK
 #define CONFIG_AT91FAMILY
--- a/include/configs/atc.h
+++ b/include/configs/atc.h
@ -152,8 +152,6 @@

 #define CONFIG_SYS_PIO_MODE		0	/* IDE interface in PIO Mode 0	*/

-#define	CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks	*/
-
 #define	CONFIG_SYS_RESET_ADDRESS 0xFFF00100	/* "bad" address		*/

 #define CONFIG_SYS_ALLOC_DPRAM
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@ -15,8 +15,6 @@
 #define CONFIG_AT32AP7000
 #define CONFIG_ATNGW100

-#define CONFIG_SYS_HZ				1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
--- a/include/configs/atngw100mkii.h
+++ b/include/configs/atngw100mkii.h
@ -17,12 +17,6 @@
 #define CONFIG_AT32AP7000
 #define CONFIG_ATNGW100MKII

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ			1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@ -16,12 +16,6 @@
 #define CONFIG_ATSTK1002
 #define CONFIG_ATSTK1000

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@ -16,12 +16,6 @@
 #define CONFIG_ATSTK1003
 #define CONFIG_ATSTK1000

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@ -16,12 +16,6 @@
 #define CONFIG_ATSTK1004
 #define CONFIG_ATSTK1000

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@ -16,11 +16,6 @@
 #define CONFIG_ATSTK1006
 #define CONFIG_ATSTK1000

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000

 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
--- a/include/configs/calimain.h
+++ b/include/configs/calimain.h
@ -31,7 +31,6 @@
 #define CONFIG_SYS_OSCIN_FREQ		calimain_get_osc_freq()
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_DA850_LOWLEVEL
 #define CONFIG_SYS_DA850_PLL_INIT
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@ -17,7 +17,6 @@
 #define CONFIG_ARM926EJS				/* arm926ejs CPU */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		24000000	/* timer0 freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM365

 #define CONFIG_MACH_TYPE	MACH_TYPE_DAVINCI_DM365_EVM
--- a/include/configs/canmb.h
+++ b/include/configs/canmb.h
@ -188,8 +188,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x200000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_RTC_MPC5200	1	/* use internal MPC5200 RTC */

 #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@ -143,7 +143,6 @@
 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

 #define CONFIG_SYS_LOAD_ADDR	       CONFIG_LOADADDR
-#define CONFIG_SYS_HZ		       1000

 #define CONFIG_CMDLINE_EDITING

--- a/include/configs/cm4008.h
+++ b/include/configs/cm4008.h
@ -75,8 +75,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x00008000	/* default load address */

-#define CONFIG_SYS_HZ			(1000)		/* 1ms resolution ticks */
-
 /*-----------------------------------------------------------------------
 * Physical Memory Map
 */
--- a/include/configs/cm41xx.h
+++ b/include/configs/cm41xx.h
@ -75,8 +75,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x00008000	/* default load address */

-#define CONFIG_SYS_HZ			(1000)		/* 1ms resolution ticks */
-
 /*-----------------------------------------------------------------------
 * Physical Memory Map
 */
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@ -295,7 +295,6 @@
 #define CONFIG_LOOPW		1

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */

 /*
 * Various low-level settings
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@ -258,7 +258,6 @@
 */
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000

 /*-----------------------------------------------------------------------
 * Physical Memory Map
--- a/include/configs/cmi_mpc5xx.h
+++ b/include/configs/cmi_mpc5xx.h
@ -96,8 +96,6 @@

 #define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address		*/

-#define	CONFIG_SYS_HZ			1000		/* Decrementer freq: 1 ms ticks	*/
-
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 1250000 }


--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@ -37,11 +37,9 @@
 /* ---
 * Defines processor clock - important for correct timings concerning serial
 * interface etc.
- * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
 * ---
 */

-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CLK			66000000
 #define CONFIG_SYS_SDRAM_SIZE		16		/* SDRAM size in MB */

--- a/include/configs/cogent_mpc8260.h
+++ b/include/configs/cogent_mpc8260.h
@ -138,8 +138,6 @@

 #define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	*/

-#define	CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks	*/
-
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

 /*
--- a/include/configs/cogent_mpc8xx.h
+++ b/include/configs/cogent_mpc8xx.h
@ -103,8 +103,6 @@

 #define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	*/

-#define	CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks	*/
-
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

 #define CONFIG_SYS_ALLOC_DPRAM
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@ -100,7 +100,6 @@
 /*
 * Clock Configuration
 */
-#define	CONFIG_SYS_HZ			1000		/* Timer @ 3250000 Hz */
 #define	CONFIG_SYS_CPUSPEED		0x290		/* 520MHz */

 /*
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@ -439,7 +439,6 @@
 /*
 * Miscellaneous configurable options
 */
-#define CONFIG_SYS_HZ		1000
 #define CONFIG_HW_WATCHDOG
 #define CONFIG_LOADS_ECHO
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@ -222,7 +222,6 @@
 #define CONFIG_SYS_MEMTEST_START		0x00100000
 #define CONFIG_SYS_MEMTEST_END			0x01000000
 #define CONFIG_SYS_LOAD_ADDR			0x100000
-#define CONFIG_SYS_HZ				1000

 /*-----------------------------------------------------------------------
 * SDRAM Configuration
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@ -661,7 +661,6 @@
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 #define CONFIG_SYS_MAXARGS	16		/* max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1ms ticks */

 /*
 * For booting Linux, the board info and command line data
--- a/include/configs/cpci5200.h
+++ b/include/configs/cpci5200.h
@ -267,8 +267,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_VXWORKS_MAC_PTR	0x00000000	/* Pass Ethernet MAC to VxWorks */

 #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
--- a/include/configs/cpu9260.h
+++ b/include/configs/cpu9260.h
@ -20,7 +20,6 @@
 #define AT91_DBGU	(0xfffff200 - AT91_BASE_SYS)

 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000
-#define CONFIG_SYS_HZ		1000
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768

 #if defined(CONFIG_CPU9G20)
--- a/include/configs/cpuat91.h
+++ b/include/configs/cpuat91.h
@ -25,7 +25,6 @@
 #define AT91C_MAIN_CLOCK		((AT91C_XTAL_CLOCK / 4) * 39)
 #define AT91C_MASTER_CLOCK		(AT91C_MAIN_CLOCK / 3)
 #define CONFIG_SYS_HZ_CLOCK		(AT91C_MASTER_CLOCK / 2)
-#define CONFIG_SYS_HZ			1000

 #define CONFIG_ARM920T
 #define CONFIG_AT91RM9200
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@ -120,8 +120,6 @@

 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */
-
-#define	CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks	*/
 #define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_info (bd_t) */
 #define CONFIG_SYS_LOAD_ADDR		0x100000 /* default load address */

--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@ -120,7 +120,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */

-#define	CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks	*/
 #define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_info (bd_t) */
 #define CONFIG_SYS_LOAD_ADDR		0x100000 /* default load address */

--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@ -28,7 +28,6 @@
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_TEXT_BASE		0xc1080000

--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@ -33,7 +33,6 @@
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_DA850_PLL_INIT
 #define CONFIG_SYS_DA850_DDR_INIT

--- a/include/configs/davinci_dm355evm.h
+++ b/include/configs/davinci_dm355evm.h
@ -18,7 +18,6 @@
 #define CONFIG_ARM926EJS				/* arm926ejs CPU */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		24000000	/* timer0 freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM355

 /* Memory Info */
--- a/include/configs/davinci_dm355leopard.h
+++ b/include/configs/davinci_dm355leopard.h
@ -17,7 +17,6 @@
 #define CONFIG_ARM926EJS				/* arm926ejs CPU */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		24000000	/* timer0 freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM355				/* DM355 based board */

 /* Memory Info */
--- a/include/configs/davinci_dm365evm.h
+++ b/include/configs/davinci_dm365evm.h
@ -18,7 +18,6 @@
 #define CONFIG_ARM926EJS				/* arm926ejs CPU */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		24000000	/* timer0 freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM365

 /* Memory Info */
--- a/include/configs/davinci_dm6467evm.h
+++ b/include/configs/davinci_dm6467evm.h
@ -27,7 +27,6 @@ extern unsigned int davinci_arm_clk_get(void);
 /* Timer Input clock freq */
 #define CONFIG_SYS_HZ_CLOCK		(CONFIG_SYS_CLK_FREQ/2)
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM646X

 /* EEPROM definitions for EEPROM */
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@ -44,7 +44,6 @@
 #define CONFIG_ARM926EJS			/* arm926ejs CPU core */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		27000000	/* Timer Input clock freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM644X
 /*====================================================*/
 /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@ -22,7 +22,6 @@
 #define CONFIG_ARM926EJS			/* arm926ejs CPU core */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		27000000	/* Timer Input clock freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM644X
 /*=============*/
 /* Memory Info */
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@ -19,7 +19,6 @@
 #define CONFIG_ARM926EJS			/* arm926ejs CPU core */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		27000000	/* Timer Input clock freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM644X
 /* EEPROM definitions for Atmel 24LC64 EEPROM chip */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@ -46,7 +46,6 @@
 #define CONFIG_ARM926EJS			/* arm926ejs CPU core */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		27000000	/* Timer Input clock freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM644X
 /*====================================================*/
 /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@ -133,8 +133,6 @@

 #define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)

-#define CONFIG_SYS_HZ			1000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000     /* Cached addr */

 #define	CONFIG_SYS_LOAD_ADDR		0x81000000     /* default load address	*/
--- a/include/configs/debris.h
+++ b/include/configs/debris.h
@ -148,7 +148,6 @@
 #define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
 #define CONFIG_SYS_LOAD_ADDR		0x00100000	/* default load address		*/
-#define CONFIG_SYS_HZ			1000		/* decrementer freq: 1 ms ticks */

 /*-----------------------------------------------------------------------
 * PCI stuff
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@ -257,7 +257,6 @@
 */
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
 #define CONFIG_SYS_PTV			2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000

 /*  Physical Memory Map  */
 #define CONFIG_NR_DRAM_BANKS		2 /* CS1 may or may not be populated */
--- a/include/configs/dig297.h
+++ b/include/configs/dig297.h
@ -239,7 +239,6 @@
 */
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000

 /*-----------------------------------------------------------------------
 * Physical Memory Map
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@ -415,8 +415,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x00100000

-#define CONFIG_SYS_HZ			1000
-
 /*
 * Various low-level settings
 */
--- a/include/configs/dvlhost.h
+++ b/include/configs/dvlhost.h
@ -77,7 +77,6 @@

 /* timer clock - 2* OSC_IN system clock */
 #define CONFIG_IXP425_TIMER_CLK         66666666
-#define CONFIG_SYS_HZ			1000

 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR		0x00010000
--- a/include/configs/eXalion.h
+++ b/include/configs/eXalion.h
@ -216,7 +216,6 @@
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 */
-#define CONFIG_SYS_HZ			1000

 #define CONFIG_SYS_CLK_FREQ	33333333	/* external frequency to pll	*/
 #define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER  2	/* for MPC8240 only		*/
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@ -35,7 +35,6 @@
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_TEXT_BASE		0xc1080000
 #define CONFIG_DA8XX_GPIO
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@ -98,7 +98,6 @@
 /*----------------------------------------------------------------------*
 * Clock and PLL Configuration						*
 *----------------------------------------------------------------------*/
-#define CONFIG_SYS_HZ			1000
 #define	CONFIG_SYS_CLK			80000000      /* 8MHz * 8 */

 /* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */
--- a/include/configs/eb_cpux9k2.h
+++ b/include/configs/eb_cpux9k2.h
@ -60,7 +60,6 @@

 #define AT91C_MAIN_CLOCK	179404800	/* from 12.288 MHz * 73 / 5 */
 #define AT91C_MASTER_CLOCK	(AT91C_MAIN_CLOCK / 3)
-#define CONFIG_SYS_HZ		1000
 #define CONFIG_SYS_HZ_CLOCK 	(AT91C_MASTER_CLOCK / 2)

 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock */
--- a/include/configs/ecovec.h
+++ b/include/configs/ecovec.h
@ -181,6 +181,5 @@
 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
-#define CONFIG_SYS_HZ       1000

 #endif	/* __ECOVEC_H */
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@ -34,8 +34,6 @@
 * CLKs configurations
 */

-#define CONFIG_SYS_HZ		1000
-
 /*
 * Board-specific values for Orion5x MPP low level init:
 * - MPPs 12 to 15 are SATA LEDs (mode 5)
--- a/include/configs/enbw_cmc.h
+++ b/include/configs/enbw_cmc.h
@ -33,7 +33,6 @@
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_DA850_LOWLEVEL
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_SYS_DA850_PLL_INIT
--- a/include/configs/ep8248.h
+++ b/include/configs/ep8248.h
@ -153,8 +153,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

 #define CONFIG_SYS_FLASH_BASE		0xFF800000
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@ -358,8 +358,6 @@

 #define CONFIG_SYS_LOAD_ADDR     0x00100000   /* default load address */

-#define CONFIG_SYS_HZ            1000         /* decrementer freq: 1 ms ticks */
-
 /*
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
--- a/include/configs/ep82xxm.h
+++ b/include/configs/ep82xxm.h
@ -165,8 +165,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

 /*-----------------------------------------------------------------------
--- a/include/configs/espt.h
+++ b/include/configs/espt.h
@ -100,7 +100,6 @@
 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
-#define CONFIG_SYS_HZ       1000

 /* Ether */
 #define CONFIG_SH_ETHER 1
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@ -31,7 +31,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ			1000

 /* 32kB internal SRAM */
 #define CONFIG_SRAM_BASE	0x00300000 /*AT91SAM9XE_SRAM_BASE */
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@ -180,8 +180,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)

-#define CONFIG_SYS_HZ			1000
-
 #define CONFIG_RD_LVL

 #define CONFIG_NR_DRAM_BANKS	8
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@ -17,12 +17,6 @@

 #define CONFIG_FAVR32_EZKIT_EXT_FLASH

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@ -129,8 +129,6 @@

 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

-#define CONFIG_SYS_HZ				1000
-
 /*
 * Physical Memory Map
 */
--- a/include/configs/galaxy5200.h
+++ b/include/configs/galaxy5200.h
@ -352,7 +352,6 @@
 #define CONFIG_SYS_MEMTEST_END 0x00f00000	/* 1 ... 15 MB in DRAM */

 #define CONFIG_SYS_LOAD_ADDR 0x400000		/* default load address */
-#define CONFIG_SYS_HZ 1000			/* decrementer freq: 1 ms ticks */

 #define CONFIG_DISPLAY_BOARDINFO 1

--- a/include/configs/gr_cpci_ax2000.h
+++ b/include/configs/gr_cpci_ax2000.h
@ -303,8 +303,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 /*
 * Various low-level settings
 */
--- a/include/configs/gr_ep2s60.h
+++ b/include/configs/gr_ep2s60.h
@ -292,8 +292,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 /*-----------------------------------------------------------------------
 * USB stuff
 *-----------------------------------------------------------------------
--- a/include/configs/gr_xc3s_1500.h
+++ b/include/configs/gr_xc3s_1500.h
@ -251,8 +251,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 /*
 * Various low-level settings
 */
--- a/include/configs/grasshopper.h
+++ b/include/configs/grasshopper.h
@ -15,12 +15,6 @@
 #define CONFIG_AT32AP
 #define CONFIG_AT32AP7000

-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ			1000
-
 /*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
--- a/include/configs/grsim.h
+++ b/include/configs/grsim.h
@ -278,8 +278,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 /***** Gaisler GRLIB IP-Cores Config ********/

 /* AMBA Plug & Play info display on startup */
--- a/include/configs/grsim_leon2.h
+++ b/include/configs/grsim_leon2.h
@ -276,8 +276,6 @@

 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
 /***** Gaisler GRLIB IP-Cores Config ********/

 #define CONFIG_SYS_GRLIB_SDRAM    0
--- a/Show More
+++ b/Show More