kirkwood: define CONFIG_SYS_CACHELINE_SIZE

By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
This commit is contained in:
Michael Walle 2011-10-31 20:22:58 +05:30 committed by Albert ARIBAUD
parent 8428a3991f
commit f779d739d6
1 changed files with 2 additions and 1 deletions

View File

@ -41,7 +41,8 @@
#include <asm/arch/kirkwood.h>
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_SYS_CACHELINE_SIZE 32
/* default Dcache Line length for kirkwood */
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */