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armv7: LS1021a: enable i-cache in start.S 

Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and
ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First
stage of u-boot can run faster after that. There is a description
about skip lowlevel init in board/freescale/ls1021atwr/README.

Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Xiaoliang Yang 2016-09-14 11:36:14 +08:00 committed by York Sun
parent b259732d36
commit f85a8e8d1d
6 changed files with 17 additions and 3 deletions
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2
arch/arm/cpu/armv7/Makefile
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@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o
obj-y += cpu.o cp15.o
obj-y += syslib.o
ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),)
ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),)
ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
obj-y += lowlevel_init.o
endif

4
arch/arm/cpu/armv7/ls102xa/soc.c
View File

@ -60,6 +60,10 @@ unsigned int get_soc_major_rev(void)
return major;
}
void s_init(void)
{
}
#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
void erratum_a010315(void)
{

6
board/freescale/ls1021aqds/README
View File

@ -110,3 +110,9 @@ Start Address End Address Description Size
0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB
0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB
0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB
LS1021a rev1.0 Soc specific Options/Settings
--------------------------------------------
If the LS1021a Soc is rev1.0, you need modify the configure file.
Add the following define in include/configs/ls1021aqds.h:
#define CONFIG_SKIP_LOWLEVEL_INIT

6
board/freescale/ls1021atwr/README
View File

@ -107,3 +107,9 @@ Start Address End Address Description Size
0x00_4000_0000 0x00_5FFF_FFFF QSPI 512MB
0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB
0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB
LS1021a rev1.0 Soc specific Options/Settings
--------------------------------------------
If the LS1021a Soc is rev1.0, you need modify the configure file.
Add the following define in include/configs/ls1021atwr.h:
#define CONFIG_SKIP_LOWLEVEL_INIT

1
include/configs/ls1021aqds.h
View File

@ -18,7 +18,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DEEP_SLEEP

1
include/configs/ls1021atwr.h
View File

@ -18,7 +18,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DEEP_SLEEP
#ifdef CONFIG_DEEP_SLEEP