fix: clean interrupt
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42efed6130
commit
fb7c2dbef0
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@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).a
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LIB = $(obj)lib$(CPU).a
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START = start.o
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START = start.o
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SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o
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#SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o
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SOBJS = dcache.o icache.o irq.o
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COBJS = cpu.o interrupts.o cache.o exception.o timer.o
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COBJS = cpu.o interrupts.o cache.o exception.o timer.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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@ -36,12 +36,14 @@ extern void microblaze_enable_interrupts (void);
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void enable_interrupts (void)
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void enable_interrupts (void)
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{
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{
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microblaze_enable_interrupts ();
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__asm__ __volatile__ ("msrset r0, 0x2");
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//microblaze_enable_interrupts ();
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}
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}
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int disable_interrupts (void)
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int disable_interrupts (void)
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{
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{
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microblaze_disable_interrupts ();
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__asm__ __volatile__ ("msrclr r0, 0x2");
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//microblaze_disable_interrupts ();
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return 0;
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return 0;
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}
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}
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@ -49,6 +51,10 @@ int disable_interrupts (void)
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#ifdef CFG_TIMER_0
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#ifdef CFG_TIMER_0
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extern void timer_init (void);
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extern void timer_init (void);
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#endif
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#endif
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#ifdef CFG_FSL_2
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extern void fsl_init2 (void);
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#endif
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static struct irq_action vecs[CFG_INTC_0_NUM];
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static struct irq_action vecs[CFG_INTC_0_NUM];
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@ -140,6 +146,9 @@ int interrupts_init (void)
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intc_init ();
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intc_init ();
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#ifdef CFG_TIMER_0
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#ifdef CFG_TIMER_0
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timer_init ();
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timer_init ();
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#endif
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#ifdef CFG_FSL_2
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fsl_init2 ();
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#endif
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#endif
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enable_interrupts ();
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enable_interrupts ();
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return 0;
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return 0;
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