Commit graph

15 commits

Author SHA1 Message Date
Kumar Gala
783852e467 ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Heiko Schocher
4b142febff common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:14:07 +01:00
Becky Bruce
af860962b5 85xx: Remove unused CONFIG_ASSUME_AMD_FLASH from config files
A bunch of the 85xx boards have this cruft in them - it's not used
anywhere.  Delete it.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-12-02 22:57:16 +01:00
Kumar Gala
a0f9e0e0f0 ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:57 -05:00
Roy Zang
0ead6f2ed7 ppc/85xx: Enable usb ehci support for p2020ds board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:08 -05:00
Poonam Aggrwal
0e870980a6 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx
The number of CPUs are getting detected dynamically by checking the
processor SVR value.  Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.

This can help to use the same u-boot image across the platforms.

Also revamped and corrected few Freescale Copyright messages.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:38 -05:00
Kumar Gala
f90dc43fd6 85xx: Removed BEDBUG support from FSL 85xx boards
For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that
got copied int the MPC8536, MPC8572 and P2020 DS boards.  The BEDBUG
support has never been made to work completely on e500/85xx so we
just disable it to save space and match the other FSL 85xx boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-10 16:40:55 -05:00
Kumar Gala
6bb5b41229 85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks.  This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:42:22 -05:00
Kumar Gala
89188a6233 85xx: Bump up the BOOTMAP to 16M on FSL 85xx boards
We have always mapped at least 16M in the kernel and we have seen cases
with new kernel features that a kernel image needs more than 8M of
memory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-21 09:02:40 -05:00
Peter Tyser
433ea8abd6 Remove last remanants of unused CONFIG_I2C_CMD_TREE
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-20 23:54:57 +02:00
Timur Tabi
890d242fac remove _IO_BASE and KSEG1ADDR from board configuration files
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.

The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-11 00:19:16 +02:00
Wolfgang Denk
8e5e9b940c Coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:35:02 +02:00
Roy Zang
29c3518246 85xx: Add pci e1000 Ethernet support for P2020 board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-30 08:26:34 -05:00
Kumar Gala
156984a361 8xxx: Fix PCI bus address setup for 36-bit configs
We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.

This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-30 08:24:22 -05:00
Srikanth Srinivasan
feb7838f97 85xx: Add P2020DS support
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.

Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:25 -05:00