Commit Graph

10941 Commits

Author SHA1 Message Date
maxims@google.com d9b88d2547 aspeed: Support for ast2500 Eval Board
ast2500 Eval Board device tree and board specific configuration.
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-28 14:04:33 -05:00
maxims@google.com f6a6a9f049 aspeed: Board init functions and common configs for ast2500 based boards
Add configuration file with parameters that are very likely to be shared by
all ast2500-based boards.
Add ast2500-board.c file with the init code that is very likely to be
shared by all ast2500-based boards.
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-28 14:04:32 -05:00
maxims@google.com 14e4b14979 aspeed: Add basic ast2500-specific drivers and configuration
Clock Driver

This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.

SDRAM MC driver

The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.

The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-28 14:04:29 -05:00
maxims@google.com 4697abea62 aspeed: Add drivers common to all Aspeed SoCs
Add support for Watchdog Timer, which is compatible with AST2400 and
AST2500 watchdogs. There is no uclass for Watchdog yet, so the driver
does not follow the driver model. It also uses fixed clock, so no clock
driver is needed.

Add support for timer for Aspeed ast2400/ast2500 devices.
The driver actually controls several devices, but because all devices
share the same Control Register, it is somewhat difficult to completely
decouple them. Since only one timer is needed at the moment, this should
be OK. The timer uses fixed clock, so does not rely on a clock driver.

Add sysreset driver, which uses watchdog timer to do resets and particular
watchdog device to use is hardcoded (0)
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-28 14:04:27 -05:00
Tom Rini 539cb8038e arm: Re-sync with full list of MACH_TYPE_xxx values
This re-syncs us with the official and full list of MACH_TYPE_xxx values
from http://www.armlinux.org.uk/developer/machines/

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-28 14:04:20 -05:00
Patrick Delaunay b0cf733933 disk: convert CONFIG_DOS_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-01-28 08:47:34 -05:00
Tom Rini cf4128e53c Merge git://www.denx.de/git/u-boot-marvell 2017-01-26 12:26:24 -05:00
Tom Rini 79a34b71c9 Merge git://git.denx.de/u-boot-mpc85xx 2017-01-25 17:38:45 -05:00
Simon Glass a009f36cfe Drop prt_mpc5xxx_clks() in favour of print_cpuinfo()
Rather than having an arch-specific function, use the existing generic
one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:44 -05:00
Simon Glass 8f3086aaac powerpc: Drop CONFIG_SYS_ALLOC_DPRAM
This is not defined anywhere in U-Boot. Drop this dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:42 -05:00
Simon Glass cbcbf71bf2 powerpc: Drop probecpu() in favour of arch_cpu_init()
To avoid an unnecessary arch-specific call in board_init_f(), rename this
function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:41 -05:00
Simon Glass 4585601ae2 Convert CONFIG_ARCH_MISC_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_MISC_INIT

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:41 -05:00
Simon Glass a5d67547dd Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_EARLY_INIT_F

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:32 -05:00
Simon Glass a421192fb8 Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 16:43:48 -05:00
Simon Glass d02f5ea301 config: Drop CONFIG_ARCH_DMA_PIO_WORDS
This is not defined by any board in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 16:42:20 -05:00
Stefan Roese 27090324c2 arm64: mvebu: Armada 7040-db: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada 7040-db
dts file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
2017-01-25 07:04:12 +01:00
Stefan Roese b14b0b1e7b arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi
file which is used by the Armada 7k/8K SoCs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
2017-01-25 07:04:08 +01:00
Stefan Roese 22074fc5e2 arm64: mvebu: Armada 3720-db: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada 3700-db
dts file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
2017-01-25 07:03:58 +01:00
Stefan Roese cbe0ece8c9 arm64: mvebu: Armada 3700: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada 3700 dtsi
file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
2017-01-25 07:03:54 +01:00
Tony O'Brien 76866600f5 powerpc: Enable flush and invalidate dcache by range for MPC85xx
Commit ac337168a unified functions to flush and invalidate dcache by
range. These two functions were no-ops for SoCs other than 4xx and
MPC86xx. Adding these functions seemed to be correct but introduced
issues in some drivers when the dcache was flushed. While the root
cause was under investigation, these functions were disabled in
Commit cb1629f91a for affected SoCs, including the MPC85xx, to make
the various drivers work.

On the T208x USB stopped working after v2016.07 was pulled.  After
re-enabling the dcache functions for the MPC85xx it started working
again.  The USB and DPPA Ethernet drivers have been seen as
operational after this change but other drivers cannot be tested.

Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
Cc: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun>
2017-01-24 13:28:31 -08:00
Tony O'Brien 09bfd962bd mpc85xx: pcie: Implement workaround for Erratum A007815
The read-only-write-enable bit is set by default and must be cleared
to prevent overwriting read-only registers.  This should be done
immediately after resetting the PCI Express controller.

Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
[York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 13:28:31 -08:00
Darwin Dingel 06ad970b53 powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907
Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.

Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Cc: York Sun <york.sun@nxp.com>
[York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 13:28:02 -08:00
Andrew F. Davis c8a25ac4d1 mach-omap2: Cleanup secure boot media generation
Currently all secure media types of SPL are generated for all platforms,
all platforms do not need all types, only generate the media types valid
for each platform.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-01-24 10:35:56 -05:00
Tom Rini e5ec48152a Kconfig: Migrate BOARD_LATE_INIT to a select
This option should not really be user selectable.  Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
2017-01-24 10:35:54 -05:00
Tom Rini 88077715d8 NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST
Introduce board/freescale/common/Kconfig so that we have a single place
for CONFIG options that are shared between ARM and PowerPC NXP platforms.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 10:33:59 -05:00
Tom Rini f428268adb imx31_phycore: Split the eet variant out into a different TARGET
Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and
make this a distinct config target.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-24 10:33:53 -05:00
Masahiro Yamada 2c2ab3d495 ARM: uniphier: add PXs3 SoC support
Initial support for PXs3 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 16:49:34 +09:00
Masahiro Yamada 61e6cc0aa1 ARM: dts: uniphier: add PXs3 SoC/board support
Initial commit for the PXs3 SoC DT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 16:49:34 +09:00
Masahiro Yamada 132efa562c ARM: dts: uniphier: compile only DT files that make sense
All the UniPhier DT files are compiled if CONFIG_ARCH_UNIPHIER
is enabled, but not all of them actually work.  For example, when
U-Boot is compiled for ARM 32 bit, 64 bit DT files are also built,
and vice versa.  Compile only the combination that makes sense.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 16:49:34 +09:00
Masahiro Yamada ee8ef5afa8 ARM: uniphier: add macro to generate SoC data look-up function
There are similar functions that look up SoC data by the SoC ID.
The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to
avoid the code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 16:49:33 +09:00
Masahiro Yamada e27d6c7d32 ARM: uniphier: simplify SoC ID get function
Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification.  Come to think of it, there is no need for the
conversion in the first place.  Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 16:49:27 +09:00
Masahiro Yamada d9a70368db ARM: uniphier: replace <common.h> with <linux/delay.h> where possible
The <common.h> includes too many headers.  Actually, these files
needed to include it for udelay() declaration.  Now we can replace
it with <linux/delay.h> thanks to commit 5bc516ed66 ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:33:00 +09:00
Masahiro Yamada 0f4ec05bbb ARM: uniphier: replace <linux/err.h> with <linux/errno.h>
These files only need error number macros.  Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot.  Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:32:56 +09:00
Masahiro Yamada 561ca649a8 ARM: uniphier: make SPL optional for ARVv8 SoCs
We may want to run different firmware before running U-Boot.  For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader.  In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.

This commit removes "select SPL" to make it configurable.  This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI)  Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT.  The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint.  This will mitigate the per-SoC
(sometimes per-board) defconfig burden.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:11:12 +09:00
Masahiro Yamada 7a37bd64c5 ARM: uniphier: add missing static and const qualifier
These are file-internal and constant.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:01:27 +09:00
Kotaro Hayashi 7d75254b3d ARM: uniphier: fix delay fixup code in LD11 UMC init
The ddrphy_shift_rof_hws() never writes back the shifted delay value
to the register, which makes this function non-effective.

Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: add git log]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:01:27 +09:00
Wataru Okoshi e95455ac1b ARM: uniphier: update UMC_MEMMAPSET value for LD20 SoC
Change bnk_typ's value from 8 to 0 (for G1's performance).

Signed-off-by: Wataru Okoshi <okoshi.wataru@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:01:27 +09:00
Uri Mashiach 2d8d190c83 status_led: Kconfig migration
Move all of the status LED feature to drivers/led/Kconfig.
The LED status definitions were moved from the board configuration
files to the defconfig files.

TBD: Move all of the definitions in the include/status_led.h to the
relevant board's defconfig files.

Tested boards: CL-SOM-AM57x, CM-T335

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2017-01-21 15:12:33 -05:00
Jagan Teki 3788b451e3 config: Move CONFIG_BOARD_LATE_INIT to defconfigs
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-21 15:12:33 -05:00
Lokesh Vutla fc4dd72eb6 ARM: OMAP5+: Remove unsed dpll structures
Latest gcc compile strted complaining about defined structure definition
that are not used. Remove the unused sturctures.

Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-01-20 15:38:04 -05:00
Lokesh Vutla 584a69cb5e ARM: OMAP4: Fix compiler warning
Latest gcc 6.2 compiler is throwing the below warning for omap4_panda_defconfig
arch/arm/mach-omap2/omap4/hw_data.c:136:3: warning: 'abe_dpll_params_sysclk_196608khz' defined but not used [-Wunused-const-variable=]
   abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {

Fix this by guarding it with CONFIG_SYS_OMAP_ABE_SYSCK

Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-01-20 15:38:03 -05:00
Tom Rini 40d5534cff ARM: Default to using optimized memset and memcpy routines
We have long had available optimized versions of the memset and memcpy
functions that are borrowed from the Linux kernel.  We should use these
in normal conditions as the speed wins in many workflows outweigh the
relatively minor size increase.  However, we have a number of places
where we're simply too close to size limits in SPL and must be able to
make the size vs performance trade-off in those cases.

Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Magnus Lilja <lilja.magnus@gmail.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-20 15:38:01 -05:00
Andrew F. Davis a4a35934c7 mach-omap2: Fix secure boot media generation
While moving OMAP related files to mach-omap2 the functionality
relating to generating secure boot files was modified. This change
prevents secure platforms other than AM33xx and OMAP54XX from
correctly building files for all needed media types.

Fixes: 983e37007d ("arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-01-20 15:38:00 -05:00
Heiko Schocher 17fa032671 serial, ns16550: bugfix: ns16550 fifo not enabled
commit: 65f83802b7 "serial: 16550: Add getfcr accessor"
breaks u-boot commandline working with long commands
sending to the board.

Since the above patch, you have to setup the fcr register.

For board/archs which enable OF_PLATDATA, the new field
fcr in struct ns16550_platdata is not filled with a
default value ...

This leads in not setting up the uarts fifo, which ends
in problems, when you send long commands to u-boots
commandline.

Detected this issue with automated tbot tests on am335x
based shc board.

The error does not popup, if you type commands. You need
to copy&paste a long command to u-boots commandshell
(or send a long command with tbot)

Possible boards/plattforms with problems:
./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
./arch/arm/mach-tegra/board.c
./board/overo/overo.c
./board/quipos/cairo/cairo.c
./board/logicpd/omap3som/omap3logic.c
./board/logicpd/zoom1/zoom1.c
./board/timll/devkit8000/devkit8000.c
./board/lg/sniper/sniper.c
./board/ti/beagle/beagle.c
./drivers/serial/serial_rockchip.c

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-20 09:15:19 -05:00
Tom Rini 0675f992db Merge git://git.denx.de/u-boot-fsl-qoriq 2017-01-19 12:22:23 -05:00
Hou Zhiqiang 0541527bde kconfig: fsl PPA: move CONFIG_* to Kconfig
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:43:25 -08:00
Hou Zhiqiang daa926448c ARMv8/sec_firmware: relocated and renamed the config FSL_PPA_ARMV8_PSCI
Moved the config FSL_PPA_ARMV8_PSCI from fsl-layerscape's Kconfig to
Kconfig under armv8 and renamed it to SEC_FIRMWARE_ARMV8_PSCI.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:39:51 -08:00
Hou Zhiqiang 0897eb2ced kconfig: armv8: move armv8 sec_firmware CONFIG_* to Kconfig
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[York S: clean up scripts/config_whitelist.txt]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:35:53 -08:00
Alison Wang 7c5e1feb1d armv8: aarch64: Fix the warning about x1-x3 nonzero issue
For 64-bit kernel, there is a warning about x1-x3 nonzero in violation
of boot protocol. To fix this issue, input argument 4 is added for
armv8_switch_to_el2 and armv8_switch_to_el1. The input argument 4 will
be set to the right value, such as zero.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:29:33 -08:00
Wenbin Song 2ca84bf7b2 armv8/fsl-layerscape: fdt: fixup LS1043A rev1 MSI node
The default MSI node in kernel tree is for LS1043A rev1.0 silicon, if
rev1.1 silicon used, need to fixup the MSI node to match it.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:29:27 -08:00