Commit graph

32 commits

Author SHA1 Message Date
Bin Meng
638a058941 x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).

Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-21 07:46:27 -06:00
Bin Meng
62716ebb75 x86: fsp: Make hob command a sub-command to fsp
Introduce a new fsp command and make the existing hob command a
sub-command to fsp for future extension. Also move cmd_hob.c to
the dedicated fsp sub-directory in arch/x86/lib.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-21 07:46:26 -06:00
Bin Meng
721e992a8a x86: Add SMBIOS table support
System Management BIOS (SMBIOS) is a specification for how
motherboard and system vendors present management information
about their products in a standard format by extending the BIOS
interface on Intel architecture systems. As of today the latest
spec is 3.0 and can be downloaded from DMTF website. This commit
adds a simple and minimum required implementation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-21 07:46:26 -06:00
Bin Meng
3619e94ad7 doc: Complement document about booting VxWorks
Current document about how to boot VxWorks is limited.
Add several chapters in README.vxworks to document this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-21 07:46:26 -06:00
Bin Meng
0993fc026b x86: doc: Add DMI to the TODO list
Desktop Management Interface (DMI) is not supported by U-Boot now.
Add it to the TODO list.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-09-16 19:53:53 -06:00
Bin Meng
448719c5e7 x86: doc: Document some porting hints about Intel Quark
Document porting considerations for Intel Quark based board,
including MRC parameters and PCIe initialization.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-09-16 19:53:53 -06:00
Bin Meng
7f72cdf94c x86: doc: Change to use CONFIG_VGA_BIOS_ADDR
CONFIG_X86_OPTION_ROM_ADDR has been renamed to CONFIG_VGA_BIOS_ADDR.
Update the doc to refer to the new name.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-09-09 07:48:03 -06:00
Simon Glass
03e3c31653 x86: Correct microcode documentation
This is incorrect since we require the -m parameter to the microcode tool.
Update the two examples to show this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-26 07:54:09 -07:00
Bin Meng
330728d711 x86: doc: Update coreboot payload entry point address
With recent EFI support, the entry point address of coreboot payload
was changed. Now we update the address to use _x86boot_start, which
is the same one for EFI.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-26 07:54:06 -07:00
Simon Glass
590870e7e8 x86: Add a simple interrupt script to the README
It is a bit tedious to figure out the interrupt configuration for a new
x86 platform. Add a script which can do this, based on the output of
'pci long'. This may be helpful in some cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-14 10:00:51 -06:00
Stoppa, Igor
28a85365f8 x86: Add clarifications to the x86 README
* Explicitly list the targets supported in each section of the
instructions from the x86 README.

* Drop references to 'raw mode', in favor of 'bare mode'.

Signed-off-by: Igor Stoppa <igor.stoppa@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-14 09:50:13 -06:00
Bin Meng
12c7510f17 x86: Document how to write PIRQ information in the device tree
Document the development flow on figuring out PIRQ information
during the U-Boot porting.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-05 10:49:32 -06:00
Simon Glass
7bea527160 x86: Update README to explain booting Ubuntu on Minnowmax
The steps required to boot a Linux distribution from U-Boot on x86 are not
very complicated, but it is a good idea to have these written down in an
accessible place.

Document how to examine the boot media from U-Boot, how to load a kernel,
load a ramdisk, set the kernel boot arguments and start the kernel. With
these instructions Ubuntu boots mostly normally on Minnowmax.

Note that the TSC timer does not operate correctly and gives warnings in
the boot log. I expect that ACPI support will solve this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:42 -06:00
Bin Meng
a2eb65fcad x86: qemu: Add MP initialization
Add a cpu1 node to the device tree and enable the MP initialization
on QEMU targets (i440fx and q35).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-08-05 08:42:38 -06:00
Simon Glass
df898678ab x86: Add binary blob checksums for Minnowboard MAX
To try to reduce the pain of confusion of binary blobs, add MD5 checksums
for the current versions. This may worsen the situation as new versions
appear, but it should still be possible to obtain these versions, and thus
get a working setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-07-14 18:03:19 -06:00
Simon Glass
537ccba2a4 x86: Add ROM image description for minnowmax
The layout of the ROM is a bit hard to discover by reading the code. Add
a table to make it easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-07-14 18:03:19 -06:00
Bin Meng
7aaff9bf81 x86: crownbay: Enable graphics support
Enable graphics support on Intel Crown Bay board With the help of
vgabios for Intel TunnelCreek IGD. Tested with an external LVDS
panel connected to X4 connector and SDVO adapter connected to X9
connector on the board.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-14 18:03:19 -06:00
Bin Meng
786a08e0dd x86: Move VGA option rom macros to Kconfig
Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig
and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on
HAVE_VGA_BIOS. The new names are consistent with other x86 binary
blob options like HAVE_FSP/FSP_FILE/FSP_ADDR.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-14 18:03:18 -06:00
Bin Meng
1281a1fc97 x86: Update README.x86 for SMP support
Document U-Boot multi-processor support as well as configuration
tables like SFI and MP tables for SMP OS kernel.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-14 18:03:17 -06:00
Bin Meng
683b09d783 x86: qemu: Create separate i440fx and q35 device trees
Although the two qemu-x86 targets (i440fx and q35) share a lot in
common, they still have something that cannot easily handled in one
single device tree). Split to create two dedicated device tree files
and make the i440fx be the default build target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04 03:03:18 -06:00
Bin Meng
9c4f541237 x86: qemu: Add graphics support
It turns out that QEMU x86 emulated graphic card has a built-in
option ROM which can be run perfectly with native mode by U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04 02:39:38 -06:00
Bin Meng
1ae5b78c45 x86: Update README.x86 for QEMU support
Document how to build and test U-Boot with QEMU.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04 02:39:38 -06:00
Simon Glass
8712af97e7 x86: Update chromebook_link instructions for binary blob
The MRC image is incorrect, or at least this one now does not seem to
work. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-29 18:51:50 -06:00
Simon Glass
685224815b x86: Correct Minnowboard instructions to use the right descriptor
The descriptor provided with the FSP does not seem to work. Update the
instructions to use the descriptor from the original Intel firmware.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-29 18:51:49 -06:00
Bin Meng
83d9712e70 x86: Add queensbay fsp patch information in README.x86
The FSP release version 001 for Intel Queensbay has a bug which
could cause random endless loop during the FspInit call. This bug
was published by Intel although Intel did not describe any details.
Describe this information in the x86 doc so that U-Boot Queensbay
support is invulnerable.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-24 21:22:37 -06:00
Bin Meng
67582c00d7 x86: Add Intel Galileo instructions in README.x86
Add some instructions about building U-Boot for Intel Galileo board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:46 -07:00
Simon Glass
3a1a18ff18 x86: Add support for Intel Minnowboard Max
This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.

This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).

Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-02-06 12:07:39 -07:00
Simon Glass
00bdd95278 x86: Add some documentation on how to port U-Boot on x86
Some information has been gleaned on tools and procedures for porting
U-Boot to different x86 platforms. Add a few notes to start things off.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-02-06 12:07:39 -07:00
Simon Glass
eea0f11278 x86: Add an option to enabling building a ROM file
Rather than requiring the Makefile to be modified, provide a build option to
enable the ROM to be built.

We cannot do this by default since it requires binary blobs. Without these
the build will fail.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-02-05 22:16:43 -07:00
Bin Meng
617b867fd7 x86: Update README.x86 for coreboot support
Update README.x86 to include new build instructions for U-Boot as
the coreboot payload and testing considerations with coreboot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-01-13 07:25:05 -08:00
Simon Glass
cb3b2e62ca x86: Add an 'mtrr' command to list and adjust MTRRs
It is useful to be able to see the MTRR setup in U-Boot. Add a command
to list the state of the variable MTRR registers and allow them to be
changed.

Update the documentation to list some of the available commands.

This does not support fixed MTRRs as yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-01-13 07:25:02 -08:00
Bin Meng
5dad97ed61 x86: Add a README.x86 for U-Boot on x86 support
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Use 'Link' as the name for the Chromebook Pixel consistently)

Change-Id: I158c88653978ff212334f6d4ffeaf49fa81baefe
2014-12-18 17:26:08 -07:00