Commit Graph

9651 Commits

Author SHA1 Message Date
Tom Rini e8009beff6 Merge git://git.denx.de/u-boot-arc 2016-07-04 11:46:21 -04:00
Alexey Brodkin c7dea6e259 arc: make global_data.h usable in assembly files
Currently on attempt to use global_data.h in an assembly file following
will happen:
-------------------->8-----------------
./arch/arc/include/asm/global_data.h: Assembler messages:
./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{'
./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}'
scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed
-------------------->8-----------------

In this change we disable struct arch_global_data in ASM which fixes
the issue above.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-07-04 11:43:41 +03:00
Alexey Brodkin 7a54f5177a arc: Use "-mcpu=archs" instead of deprecated "-marchs" for ARC HS
Newer ARC toolchains don't support "-marchs" option any longer.
Instead "-mcpu=archs" should be used. What's also important older
toiolchains that support ARC HS cores will also happily accept
"-mcpu=archs" so that's a very safe move.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-07-04 11:43:40 +03:00
Quentin Schulz d2a6af0528 sunxi: Add defconfig and DTS file for Allwinner R16 EVB (Parrot)
The Parrot Board is an evaluation board with an Allwinner R16 (assumed
to be close to an Allwinner A33), 4GB of eMMC, 512MB of RAM, USB host
and OTG, a WiFi/Bluetooth combo chip, a micro SD Card reader, 2
controllable buttons, an LVDS port with separated backlight and
capacitive touch panel ports, an audio/microphone jack, a camera CSI
port, 2 sets of 22 GPIOs and an accelerometer.

The DTS file is identical to the one submitted to the upstream kernel.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-02 13:53:15 +02:00
Olliver Schinagl 9acebe8a18 sunxi: Add missing boot_media fields in the SPL header
Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid
code corruption") Added defines for MMC0 and SPI as boot identification.
After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected
values have been confirmed and added to spl.h

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-02 13:53:03 +02:00
Masahiro Yamada e64a6b1141 ARM: uniphier: add external IRQ setup code
I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:30 +09:00
Masahiro Yamada 1013aef330 ARM: dts: uniphier: add AIDET nodes
The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of
syscon block related with the interrupt controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:30 +09:00
Masahiro Yamada c4adc50ea6 ARM: dts: uniphier: sync Device Trees with upstream Linux
I periodically sync Device Trees for better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:29 +09:00
Masahiro Yamada 4cb9399e9b ARM: uniphier: fix typo "talbe"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30 23:49:26 +09:00
Bin Meng ff6e156966 x86: coreboot: Remove the dummy pch driver
There is a dummy pch driver in the coreboot directory. This causes
drivers of its children fail to function due to empty ops. Remove
the whole file since it is no longer needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-29 10:08:15 +08:00
Tom Rini 44faff24f5 Merge git://git.denx.de/u-boot-fsl-qoriq 2016-06-28 15:59:05 -04:00
Abhimanyu Saini dee01e426b armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs
Currently layescape SoCs are not using cpu nodes. So removing
them in favour of compatibly with  similar SoCs that
have different cores like LS2080A and LS2088A.

This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:54 -07:00
Prabhakar Kushwaha 49cdce1635 armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCs
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.

So append "A" to SoC names.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:53 -07:00
Heiko Schocher 8e6e8221c7 arm: at91: taurus/axm: add DM and DTS support
add DM and DTS support for the at91 based siemens
boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher 13ee789074 arm: at91: smartweb: add DM and DTS support
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher ae21e964d8 arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260
Add this files from Linux v4.6-rc5

66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO]

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher 289f979cc9 corvus DTS / DM support
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebase on current ToT, don't delete gurnard DTB creation]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher ce9844ce17 arm: at91: add CONFIG_AT91SAM9M10G45
add support for CONFIG_AT91SAM9M10G45.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Marek Vasut 968ebdf1ef ARM: at91: Don't invoke spl_boot_device() twice
Since the spl_boot_mode() is now passed the boot device to boot from,
make use of it instead of inquiring for the boot device again. This
allows board_boot_order() to function correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Marek Vasut 2b1cdafa9f common: Pass the boot device into spl_boot_mode()
The SPL code already knows which boot device it calls the spl_boot_mode()
on, so pass that information into the function. This allows the code of
spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
board_boot_order() correctly alter the behavior of the boot process.

The later one is important, since in certain cases, it is desired that
spl_boot_device() return value be overriden using board_boot_order().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[add newly introduced zynq variant]
Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Hannes Schmelzer a4d799939f board/BuR: rename kwb board to brxre1
Rename B&R kwb board to brxre1

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24 17:24:40 -04:00
Hannes Schmelzer 2290fe0642 board/BuR: rename tseries board to brppt1
Rename B&R tseries board to brppt1

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24 17:24:39 -04:00
Steve Rae 8ada4e0ee6 arm: bcm235xx: update clock framework
The handling of the "usage counter" is incorrect, and the clock should
only be disabled when transitioning from 1 to 0.

Reported-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24 17:24:38 -04:00
Chris Brand 77a1a677a6 arm: bcm235xx: fix kps ccu
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8.

Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24 17:24:37 -04:00
Steve Rae 9d7f416ced arm: bcm235xx: implement the boot0 hook code
Choose the Kconfig boot0 hook option and implement the required code.

Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24 17:24:37 -04:00
Masahiro Yamada ec048369e2 ARM: armv7: refactor Makefile slightly
Use Kbuild standard style where possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24 17:24:34 -04:00
Masahiro Yamada 6441e3deb4 ARM: move #ifdef to match the error handling code
Match the #ifdef ... #endif and the code,

   ret = do_something();
   if (ret)
           return ret;

This will make it easier to add more #ifdef'ed code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24 17:23:13 -04:00
Masahiro Yamada afedf5488d arm64: optimize smp_kick_all_cpus
gic_kick_secondary_cpus can directly return to the caller of
smp_kick_all_cpus.  We do not have to use x29 register here.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-24 17:23:12 -04:00
Carlo Caione 1e23737df8 board: amlogic: Rename folder for Amlogic boards
s/hardkernel/amlogic/ to have a single place for all the amlogic-based
boards.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
2016-06-24 17:23:09 -04:00
Daniel Gorsulowski 85a2f772c2 omap3: bugfix in timer on rollover
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2016-06-24 17:21:55 -04:00
Hou Zhiqiang f3acaf438d armv8/fsl_lsch2: Correct the cores frequency initialization
The register CLKCNCSR controls the frequency of all cores in the same
cluster.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-24 08:33:08 -07:00
Hans de Goede 9f823615af Kconfig: Add a new DISTRO_DEFAULTS Kconfig option
DISTRO_DEFAULTS is intended to mirror / replace
include/config_distro_defaults.h.

The intend is for boards which include this file to select this from
their Kconfig files and when moving setting to Kconfig which are #define-ed
in config_distro_defaults.h to select this from DISTRO_DEFAULTS so that
boards which have selected DISTRO_DEFAULTS will keep the same configuration
as before without needing any defconfig file changes.

The initial list of selected things matches all settings recently removed
from config_distro_defaults.h because they have been converted to Kconfig,
with the exception of CMD_ELF and CMD_NET, which have a default of y, if
the default of these ever changes they should be selected by DISTRO_DEFAULTS
too.

For testing and example purposes this commit also converts ARCH_SUNXI
to use DISTRO_DEFAULT instead of selecting everything it needs itself.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 21:30:13 -04:00
Chen-Yu Tsai 4257f5f8f6 sunxi: Add PSCI implementation in C
To make the PSCI backend more maintainable and easier to port to newer
SoCs, rewrite the current PSCI implementation in C.

Some inline assembly bits are required to access coprocessor registers.
PSCI stack setup is the only part left completely in assembly. In theory
this part could be split out of psci_arch_init into a separate common
function, and psci_arch_init could be completely in C.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai 3424c3f299 sunxi: Add base address for GIC
Instead of hardcoding the GIC addresses in the PSCI implementation,
provide a base address in the cpu header.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai 7579a3ec8c sunxi: Add CPUCFG debug lock and sun7i cpu power controls
CPUCFG has an unlisted debug control register, which is used to disable
external debug access.

Also, sun7i secondary core power controls are in CPUCFG, as there's no
separate PRCM block.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai 20e3d05370 sunxi: Group cpu core related controls together
Instead of listing individual registers for controls to each processor
core, list them as an array of registers. This makes accessing controls
by core index easier.

Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic
"cpucfg.h", and add packed attribute to struct sunxi_cpucfg.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai 57c2a25572 sunxi: Add missing linux/types.h header for cpucfg_sun6i.h
cpucfg_sun6i.h includes a register definition for the CPUCFG register
block. The types used are u32 and u8, which are defined in linux/types.h.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai d7d4e5ccd6 sunxi: Add packed attribute to struct sunxi_prcm_reg
struct sunxi_prcm_reg is a representation of the PRCM registers. Add
the packed attribute to prevent the compiler from doing funny things.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai 0f3b894426 sunxi: Make CPUCFG_BASE macro names the same across families
Use SUNXI_CPUCFG_BASE across all families. This makes writing common
PSCI code easier.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai b56e06d343 ARM: allocate extra space for PSCI stack in secure section during link phase
The PSCI implementation expects at most 2 pages worth of space reserved
at the end of the secure section for its stacks. If PSCI is relocated to
secure SRAM, then everything is fine. If no secure SRAM is available,
and PSCI remains in main memory, the reserved memory space doesn't cover
the space used by the stack.

If one accesses PSCI after Linux has fully booted, the memory that should
have been reserved for the PSCI stacks may have been used by the kernel
or userspace, and would be corrupted. Observed after effects include the
system hanging or telinit core dumping when trying to reboot. It seems
the init process gets hit the most on my test bed.

This fix allocates the space used by the PSCI stacks in the secure
section by skipping pages in the linker script, but only when there is
no secure SRAM, to avoid bloating the binary.

This fix is only a stop gap. It would be better to rework the stack
allocation mechanism, maybe with proper usage of CONFIG_ macros and an
explicit symbol.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:43:59 +02:00
Chen-Yu Tsai cbeeb2aebf ARM: PSCI: export common PSCI function declarations for C code
Some common PSCI functions are written in assembly, but it should be
possible to use them from C code.

Add function declarations for C code to consume.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:43:59 +02:00
Chen-Yu Tsai 778dc5f43e ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_all
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:43:59 +02:00
Chen-Yu Tsai dae08d2281 ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top()
For psci_get_cpu_stack_top() to be usable in C code, it must adhere to
the ARM calling conventions. Since it could be called when the stack
is still unavailable, and the entry code to linux also expects r1 and
r2 to remain unchanged, stick to r0 and r3.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:43:59 +02:00
Hans de Goede 3551b24f53 sunxi: Add defconfig and dts file for inet86dz board
The inet86dz board is a board used in 7" tablets from various oems.

These tablets are a23 based 7" tablets featuring a 1024x600 LCD,
512MB RAM, 4G NAND, rtl8188etv usb wifi, gsl1680 touchschreen,
micro-sd slot, 3.5mm headphone jack and a micro-usb otg connector
which doubles as charging port.

The dts file this commit adds is identical to the one submitted to
the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-06-20 22:43:59 +02:00
Hans de Goede cd38e3d1b4 sunxi: Add defconfig and dts file for Polaroid MID2407PXE03 tablet
The Polaroid MID2407PXE03 is an a23 based 7" tablet based on a M86_MB V2.0
PCB, featuring a 800x480 LCD, 512MB RAM, 4G NAND, esp8089 wifi, gsl1680
touchschreen, micro-sd slot, 3.5mm headphone jack and a micro-usb otg
connector which doubles as charging port.

The dts file is identical to the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-06-20 22:43:59 +02:00
Hans de Goede 8c7d22965d sunxi: Select USE_TINY_PRINTF
This gives us a bit more breathing room wrt our SPL size.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-20 22:43:59 +02:00
Tom Rini 09849f4a77 Merge git://git.denx.de/u-boot-dm 2016-06-20 05:14:01 -04:00
Stephen Warren 135aa95002 clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
  provider now implements a single set of clocks. This provides a simpler
  conceptual interface to clients, and better aligns with device tree
  clock bindings.
* Clocks are now identified with a single "struct clk", rather than
  requiring clients to store the clock provider device and clock identity
  values separately. For simple clock consumers, this isolates clients
  from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
  clk-uclass.h contains the provider API. This aligns with the recently
  added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
  can customize these operations if needed. This also aligns with the
  recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
  clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.

Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.

test/py passes for sandbox (which invokes the dm clk test amongst
others).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Stephen Warren 4581b717b1 reset: implement a reset test
This adds a sandbox reset implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Stephen Warren 0f67e2395b mailbox: add Tegra186 HSP driver
Tegra186's HSP module implements doorbells, mailboxes, semaphores, and
shared interrupts. This patch provides a driver for HSP, and hooks it
into the mailbox API. Currently, only doorbells are supported.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00