Add support for loading splashimage from filesystem formatted sata
storage.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add support for loading splash image from USB drive formatted with a
filesystem.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add support for loading splash image from an SD card formatted with
a filesystem. Update boards to maintain original behavior where needed.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
commit c3c016c "sf: Add SPI NOR protection mechanism" introduced
flash_lock()/flash_unlock()/flash_is_locked() methods for SPI flash,
but not every flash driver supplies these. We should test these
methods against NULL before actually calling them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
CONFIG_SYS_EARLY_PCI_INIT is not needed any more since with driver
model, PCI enumeration is automatically triggered.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Move chipset-specific codes such as PAM init, PCIe ECAM and MP table
from pci.c to qemu.c, to prepare for DM PCI conversion.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Rename pcat_timer.c to i8254.c and pcat_interrupts.c to i8259.c,
to match their header file names (i8254.h and i8259.h).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
CONFIG_SYS_NUM_IRQS is actually not something we can configure,
but an architecture defined number of ISA IRQs. Move it from
x86-common.h to asm/interrupt.h and rename it to SYS_NUM_IRQS.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
wandboard and mx6cuboxi have warnings because BOOT_DELAY
is defined twice.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Vagrant Cascadian <vagrant@debian.org>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Add an initr function in the board_r.c file for the AMBA Plug&Play
command. Add a Kconfig entry for the ambapp command and remove all
CONFIG_CMD_AMBAPP defines from the board configuration headers.
Add a Kconfig entry to display the AMBA Plug&Play information
on startup. This option is off by default. Remove relevent define
from board configuration headers.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Update the GRSIM board with the memory settings for the evaluation
version of TSIM. This free version of TSIM is used for testing.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
Update the LEON2/3 serial driver to make use of the readl and writel
macros as well as the WATCHDOG_RESET() macro.
Add readl/writel and friends to the asm/io.h file.
Introduce the gd->arch.uart variable to store register address.
Lastly, remove baudrate scaler macro variables from board config. It
is now calculated in the serial driver using the global data variable.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
This adds support to update firmware on qspi flash present on
am437x-sk-evm and am43xx-epos-evm via DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D u-boot.bin -a u-boot.bin
Signed-off-by: Vignesh R <vigneshr@ti.com>
-> Add National instrument ethernet transceiver configuration used (DP83848)
-> Change cpsw slave phy address
-> modify nand configuration to use the correct ECC and correct nand features
CONFIG_BOOTDELAY is defined in config_distro_defaults.h
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
[trini: Drop omap3_logic.h settings which were a warning and no longer
correct usage].
Signed-off-by: Tom Rini <trini@konsulko.com>
The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
[trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now]
Signed-off-by: Tom Rini <trini@konsulko.com>
short strings can be used in type parameter of gpt command
to replace the guid string for the types known by u-boot
partitions = name=boot,size=0x6bc00,type=data; \
name=root,size=0x7538ba00,type=linux;
gpt write mmc 0 $partitions
and they are also used to display the type of partition
in "part list" command
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x0000037f "boot"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
type: data
guid: d117f98e-6f2c-d04b-a5b2-331a19f91cb2
2 0x00000380 0x003a9fdc "root"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
type: linux
guid: 25718777-d0ad-7443-9e60-02cb591c9737
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
code under flag CONFIG_PARTITION_TYPE_GUID
add parameter "type" to select partition type guid
example of use with gpt command :
partitions = uuid_disk=${uuid_gpt_disk}; \
name=boot,size=0x6bc00,uuid=${uuid_gpt_boot}; \
name=root,size=0x7538ba00,uuid=${uuid_gpt_root}, \
type=0fc63daf-8483-4772-8e79-3d69d8477de4;
gpt write mmc 0 $partitions
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Previously, Linux used the same GUID for the data partitions as Windows
(Basic data partition: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7).
This created problems when dual-booting Linux and Windows in UEFI-GPT
Setup, so a new GUID (Linux filesystem data:
0FC63DAF-8483-4772-8E79-3D69D8477DE4) was defined jointly by GPT fdisk
and GNU Parted developers.
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Condense these updates down to SPDX tags too while doing this. This is
a port of a1452a3771c4eb85bd779790b040efdc36f4274e from the Linux
Kernel.
Signed-off-by: Tom Rini <trini@konsulko.com>
The Android sparse image format is currently supported through a file
called aboot, which isn't really such a great name, since the sparse image
format is only used for transferring data with fastboot.
Rename the file and header to a file called "sparse", which also makes it
consistent with the header defining the image structures.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
So far the fastboot code was only supporting MMC-backed devices for its
flashing operations (flash and erase).
Add a storage backend for NAND-backed devices.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The fastboot flash command that writes an image to a partition works in
several steps:
1 - Retrieve the maximum size the device can download through the
"max-download-size" variable
2 - Retrieve the partition type through the "partition-type:%s" variable,
that indicates whether or not the partition needs to be erased (even
though the fastboot client has minimal support for that)
3a - If the image is smaller than what the device can handle, send the image
and flash it.
3b - If the image is larger than what the device can handle, create a
sparse image, and split it in several chunks that would fit. Send the
chunk, flash it, repeat until we have no more data to send.
However, in the 3b case, the subsequent transfers have no particular
identifiers, the protocol just assumes that you would resume the writes
where you left it.
While doing so works well, it also means that flashing two subsequent
images on the same partition (for example because the user made a mistake)
would not work withouth flashing another partition or rebooting the board,
which is not really intuitive.
Since we have always the same pattern, we can however maintain a counter
that will be reset every time the client will retrieve max-download-size,
and incremented after each buffer will be flashed, that will allow us to
tell whether we should simply resume the flashing where we were, or start
back at the beginning of the partition.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The current sparse image parser relies heavily on the MMC layer, and
doesn't allow any other kind of storage medium to be used.
Rework the parser to support any kind of storage medium, as long as there
is an implementation for it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The functions and a few define to generate a fastboot message to be sent
back to the host were so far duplicated among the users.
Move them all to a common place.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Since we don't have for sure a valid IP-setup during
board_late_init(...) because it maybe allready stored in environment or
not, we cannot form a proper vxWorks bootline at this place.
So we move to the way, forming the bootline just before
executing/launching vxWorks. To do this we use the bootvx command
instead go.
We only have to form the "othbootargs" environment variable, the rest is
done pretty good by the "bootvx" commannd.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Support LCDIF for mx7dsabresd board:
1. Add pinmux settings
2. Add VIDEO related macro definition and videomode env settings.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Support lcdif display:
1. Add pinmux and pad settings for LCDIF
2. Introduce setup_lcd to do the settings for LCDIF
3. Enable VIDEO related macros in board header files
4. Add a new env videomode which is needed by mxsfb.c. The
settings for videomode in this patch is for TFT43AB.
5. Tested on mx6ul 14x14/9x9 evk.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
The kernel_addr_r should be set to the same value as CONFIG_LOADADDR,
get rid of the duplication.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Stefano Babic <sbabic@denx.de>
Support PSCI and switch to non-secure mode when booting linux.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This allows for more flexible and standardized boot across multiple
platforms.
Remove redundant legacy boot environment.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
This allows for more flexible and standardized boot across multiple
platforms.
Remove redundant legacy boot environment.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Enable the GPU node in the system-wide ft_system_setup() hook instead of
the board-specific ft_board_hook(). This allows us to enable GPU per SoC
generation instead of per-board as we did initially.
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This
patch adds the relevant DT to enable the PCI controller and configure
the XUSB padctl pin muxing, and code to turn on the PCI power and enable
PCI features in U-Boot. I have only tested the x4 slot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This needs a separate compatible value from Tegra124 since the new HW
version has bugs that would prevent a driver for previous HW versions
from operating at all.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel, namely 3c120
and 10m50.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Add 10m50 devboard support. It is based on the Golden Hardware
Reference Design (GHRD), available at,
http://rocketboards.org/foswiki/view/Documentation/
AlteraMAX1010M50RevCDevelopmentKitLinuxSetup
Though we supported only one nios2-generic board in the past. Now,
with the removal of the nios2-generic board dir, adding new nios2
boards to u-boot is easier than before. It should be helpful to
add those boards supported in Linux mainline. There are only two
such nios2 boards, the 3c120 devboard and 10m50 devboard. The
nios2-generic is actually 3c120, and should restore the name. The
10m50 is this one.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Zap the altera_tse_initialize() prototypes, since it is converted
to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Do not allocate rx buf in net.c, because altera_tse allocates
its own rx buf in driver. This can save 6KB memory.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Implement a Memory Technology Device (MTD) uclass. It should
include most flash drivers in the future. Though no uclass ops
are defined yet, the MTD ops could be used.
The NAND flash driver is based on MTD. The CFI flash and SPI
flash support MTD, too. It should make sense to convert them
to MTD uclass.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Now that we have solved the problems that prevented this feature from
being enabled, enable it everywhere.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Revert commit 7a2c1b13 which dropped OpenRD boards.
Assume maintainership of OpenRD.
Remove OpenRD from scrapyard.
Switch OpenRD to generic board.
Switch to Thumb build.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
The tricorder and tricorder_flash boards have grown too big.
Reduce their size by building them with CONFIG_SYS_THUMB_BUILD.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
This target is ARMv7-M therefore can only build for Thumb,
but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot
code did not know it had to build for Thumb(2), not ARM.
This patch is binary-invariant: builds of stm32f429-discovery
with and without this patch were compared and found to differ
only by their U-Boot version strings.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
A number of headers define functions as "extern inline" which is
causing problems with gcc5. The reason is that starting with
version 5.1, gcc defaults to the standard C99 semantics for the
inline keyword.
Under the traditional GNU inline semantics, an "extern inline"
function would never create an external definition, the same
as inline *without* extern in C99. In C99, and "extern inline"
definition is simply an external definition with an inline hint.
In short, the meanings of inline with and without extern are
swapped between GNU and C99.
The upshot is that all these definitions in header files create
an external definition wherever those headers are included,
resulting in multiple definition errors at link time.
Changing all these functions to "static inline" fixes the problem
since this works as desired in all gcc versions. Although the
semantics are slightly different (a static inline definition may
result in an actual function being emitted), it works as intended
in practice.
This patch also removes extern prototype declarations for the
changed functions where they existed.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Trim CONFIG_SYS_MEMTEST_END location.
CONFIG_SYS_MONITOR_LEN
Reserving 256k for U-Boot at: d7fc0000
CONFIG_ENV_SIZE
CONFIG_SYS_MALLOC_LEN
Reserving 256k for malloc() at: d7f80000
0x10000 for the rest
Reserving 68 Bytes for Board Info at: d7f7ffbc
Reserving 208 Bytes for Global Data at: d7f7feec
Reserving 12000 Bytes for FDT at: d7f7d00c
Stack
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Trim CONFIG_SYS_MALLOC_LEN size, because CONFIG_ENV_SIZE
is included to total memory allocation in common.h,
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
Remove CONFIG_SYS_INIT_SP macro, as the initial stack is set to
below the u-boot code.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Remove CONFIG_SYS_MALLOC_BASE macro, as it is not used by
the generic board.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
Clean up macros that do not need a value as suggested by
Marek.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Use dram bank in board info, so that it displays correct
memory values in bdinfo command.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations,
making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB
=> sf protect lock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
offset 0x3f0000 is protected and cannot be erased
SF: 65536 bytes @ 0x3f0000 Erased: ERROR
=> sf protect unlock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
[re-worked to fit the lock common to dm and non-dm]
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Use the is_power_of_2() definition from log2.h to align with the
kernel implementation.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Commit: sandbox: add ADC driver
adds the driver without its main header file.
It causes build brake for sandbox_defonfig.
This commit adds a missing header:
- include/sandbox-adc.h
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Adding fdtdec_get_uint function which is the
unsigned version for fdtdec_get_int
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Heiko Schocher <hs@denx.de>
This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>
Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Update this driver to use driver model and change all users.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Production boards should not use CONFIG_OF_EMBED. Fix this for the Zybo
boards.
The image to use now becomes u-boot-dtb.bin.
For example, the .bif file should contain a line like:
[load = 0x04000000,startup=0x04000000]/path/to/u-boot-dtb.bin
instead of:
[load = 0x04000000,startup=0x04000000]/path/to/u-boot.bin
When device tree is enabled we need to load u-boot-dtb.img. Change the
settings so that SPL does the right thing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
At present in SPL we place the device tree immediately after BSS. This
avoids needing to copy it out of the way before BSS can be used. However on
some boards BSS is not placed with the image - e.g. it can be in RAM if
available.
Add an option to tell U-Boot that the device tree should be placed at the
end of the image binary (_image_binary_end) instead of at the end of BSS.
Note: A common reason to place BSS in RAM is to support the FAT filesystem.
We should update the code so that it does not use so much BSS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It is sometimes useful to find a property in the chosen node. Add a function
for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable CONFIG_SYS_I2C_ZYNQ only if it has either I2C0 or I2C1
enabled in a board config.This fixes the issue of i2c error
during board init if board specific doesnt have either I2C0
or I2C1.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This adds support to update firmware on qspi flash using DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D MLO -a MLO
$ sudo dfu-util -D u-boot.img -a u-boot.img
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to
the Ethernet PHY because the wrong PHY address is used. Also,
T1040D4RDB supports SGMII on one port only.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit adds additional file with implementation of board
detection code for Odroid-XU3/XU4.
The detection depends on compatible found in fdt:
- "samsung,exynos5" - uses Exynos5 generic code
- "samsung,odroidxu3" - try detect XU3 revision
There are few revisions of Odroid XU3/XU4, each can be detected
by checking the value of channel 9 of built-in ADC:
Rev ADC Board
0.1 0 XU3 0.1
0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT
0.3 1280 XU4 0.1
The detection code depends on the ADC+10% value.
Implementation of functions:
- set_board_type() - read ADC and set type
- get_board_rev() - returns board revision: 1..3
- get_board_type() - returns board type string
Additional functions with return values of bool:
- board_is_generic() - true if found compatible "samsung,exynos5"
but not "samsung,odroidxu3"
- board_is_odroidxu3() - true if found compatible "samsung,odroidxu3"
and one of XU3 revision.
- board_is_odroidxu4() - true if found compatible "samsung,odroidxu3"
and XU4 revision.
After I2C controller init, the get_board_type() can check
if the XU3 board is a "Lite" variant, by probing chip
0x40 on I2C0 (INA231 - exists only on non-lite).
This is useful for setting fdt file name at misc_init_r().
Enabled configs:
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- CONFIG_ODROID_REV_AIN
- CONFIG_REVISION_TAG
- CONFIG_BOARD_TYPES
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c
The new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit mask
ADC uclass's functions:
* single-channel:
- adc_start_channel() - start channel conversion
- adc_channel_data() - get conversion data
- adc_channel_single_shot() - start/get conversion data
* multi-channel:
- adc_start_channels() - start selected channels conversion
- adc_channels_data() - get conversion data
- adc_channels_single_shot() - start/get conversion data for channels
selected by bit mask
* general:
- adc_stop() - stop the conversion
- adc_vdd_value() - positive reference Voltage value with polarity [uV]
- adc_vss_value() - negative reference Voltage value with polarity [uV]
- adc_data_mask() - conversion data bit mask
The device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply: phandle to Vdd regulator's node
- vss-supply: phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
- vdd-microvolts: positive reference Voltage [uV]
- vss-microvolts: negative reference Voltage [uV]
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Some devices are supplied by configurable regulator's output.
But there was no function for getting it. This commit adds
function, that allows for getting the supply device by it's phandle.
The returned regulator device can be used with regulator uclass's API.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This driver allows I/O operations on the Samsung S2MPS11 PMIC,
which provides lots of LDO/BUCK outputs.
To enable it, update defconfig with:
- CONFIG_PMIC_S2MPS11
and additional, if were not defined:
- CONFIG_CMD_PMIC
- CONFIG_ERRNO_STR
The binding info: doc/device-tree-bindings/pmic/s2mps11.txt
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5
boards is bigger than 16k (0x4000). That will overlap the U-Boot
environment. So I move environment to 0x6000. And reduce its size as
well.
Following shows the size of the spl binaries (v2015.04 vs v2015.07):
% ls v2015.04/*spi*spl.bin -l | awk '{print $5,$(NF)}'
15540 v2015.04/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin
15704 v2015.04/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin
16064 v2015.04/sama5d3xek_spiflash_defconfig_u-boot-spl.bin
16304 v2015.04/sama5d4ek_spiflash_defconfig_u-boot-spl.bin
16304 v2015.04/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin
% ls v2015.07/*spi*spl.bin -l | awk '{print $5,$(NF)}'
16136 v2015.07/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin
16300 v2015.07/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin
16664 v2015.07/sama5d3xek_spiflash_defconfig_u-boot-spl.bin
16904 v2015.07/sama5d4ek_spiflash_defconfig_u-boot-spl.bin
16904 v2015.07/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin
The gcc version is: gcc 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1)
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Bo Shen <voice.shen@gmail.com>
As more features are added for SD boot on LS1021A QDS board,
the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
needs to be adjusted to a suitable value.
Starting address of the malloc pool used in SPL needs to be
adjusted too, or it will occupy the address u-boot loads.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
I2C1 can work on ls102xa rev2.0 SD boot, so add
ID EEPROM for SD boot.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
SR_IE(Self-refresh interrupt enable) is needed for
Hardware Based Self-Refresh. Make it configurable and let
board code handle the rest.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Reviewed-by: York Sun <yorksun@freescale.com>
Rework unified section macro select via Kconfig option
instead of macro definition in mx7_common header file.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Add i.MX6DQP-Sabresd board support:
1. set fdt_file according to board_rev which is set at runtime.
2. Add mx6dqp_ddr_ioregs and calibration value for this board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This macro is not needed, since gd->ram_size is assigned value using
function imx_ddr_size().
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Linux only boots IMX.51-based boards with device tree, so this board
would benefit from supporting it.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Cc: Stefano Babic <sbabic@denx.de>
Currently there is no API to uninitialize mdio. Add two APIs for this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The net_boot_file_name buffer is used as storage for the bootfilename
command line argument to network boot commands such as tftp and nfs.
Increase the size of this buffer to 1024 bytes as the current size of
128 bytes is restrictive for arbitrary paths on the server.
Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel
fails to access the device tree blob on boot. The reason is that u-boot
relocates the device tree blob into high memory when booting the kernel
and the kernel is unable to access the blob.
To avoid this issue, fdt_high is set to the value of 0xffffffff. The
device tree blob will not get relocated and is still in low memory to
make it accessible to the kernel.
For the same reason, initrd_high is set to the value of 0xffffffff too.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds esdhc support for ls1043ardb.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
LS1043ARDB Specification:
-------------------------
Memory subsystem:
* 2GByte DDR4 SDRAM (32bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 16 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* XFI 10G port
* QSGMII with 4x 1G ports
* Two RGMII ports
PCIe:
* PCIe2 (Lanes C) to mini-PCIe slot
* PCIe3 (Lanes D) to PCIe slot
USB 3.0: two super speed USB 3.0 type A ports
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
There are two LS series processors are built on ARMv8 Layersacpe
architecture currently, LS2085A and LS1043A. They are based on
ARMv8 core although use different chassis, so create fsl-layerscape
to refactor the common code for the LS series processors which also
paves the way for adding LS1043A platform.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
and PPC, move it out of ppc to include/, and change the path in
drivers accordingly.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch specific directory.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
For most PPC platforms, they will call the first get_clocks() in
init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is
then defined to call the second get_clocks(), which should be
redundant for PPC.
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
be depend on endianness of SEC block as 32 bit low and
high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
descriptor will vary depending on endianness of SEC.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
For the Chain of Trust, the esbc_validate command supports
32 bit fields for location of the image. In the header structure
definition, these were declared as pointers which made them
64 bit on a 64 bit core.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
As we don't modify the 'name' parameter, so change it to const.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: John Otken <jotken@softadvances.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the cword union to use specific length types that are
architecture indepented.
This patch also renames the members of the cword union to represent
their usage, i.e.:
c -> w8
s -> w16
l -> w32
ll -> w64
Where "w" stands for "width" in bits.
I discovered this problem when enabling CFI flash on vexpress64.
cword.l was an unsigned long int, but it was intended to be 32 bits wide.
Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a
64-bit system fails when attempting to use 32-bit wide CFI flash parts.
Similar problems also existed with the other cword sizes.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stefan Roese <sr@denx.de>
As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in
SD boot now. For the customer's demand, QSPI needs to be supported in SD
boot too.
This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This will allow OF-based earlycon to be used once the appropriate
aliases are added to the device tree and kernel support is fixed.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
sync with linux v4.2
commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun Aug 30 11:34:09 2015 -0700
Linux 4.2
This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
add missing definitions for the ubi/ubifs sync
with linux 4.2, also change "#define kfree ..."
into a static inline, so prevent ubi compile error:
CC drivers/mtd/ubi/fastmap.o
drivers/mtd/ubi/fastmap.c: In function 'scan_pool':
drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch adds flag status register reading support to
spi_flash_cmd_wait_ready.
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Hou Zhiqiang <B48286@freescale.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.
[Correct the spi flash flags detect logic]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE
and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL
spi mode. These macros defines the device tree offset, size
and the kernel image offset in flash respectively.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
This patch enabled CONFIG_SPI_FLASH_ISSI for qspi on zynq boards.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Enabled SPI flash Bank/Extended address register support.
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Nikita Kiryanov
Tom Rini
Bin Meng
Stefano Babic
Daniel Hellstrom
Francois Retief
Vignesh R
Vincent BENOIT
Matwey V. Kornilov
Dirk Eibach
Patrick Delaunay
Maxime Ripard
Hannes Petermaier
Peng Fan
Marek Vasut
Vagrant Cascadian
Alexandre Courbot
Stephen Warren
Tzu-Jung Lee
Thomas Chou
Albert ARIBAUD
Måns Rullgård
Fabio Estevam
Przemyslaw Marczak
Chin Liang See
Andy Fleming
Simon Glass
Siva Durga Prasad Paladugu
Daniel Gorsulowski
Codrin Ciubotariu
Yangbo Lu
Josh Wu
Alison Wang
Yao Yuan
Joakim Tjernlund
Adrian Alonso
Heiko Schocher
Damien Riegel
Jacob Stiffler
Hou Zhiqiang
Gong Qianyu
Shaohui Xie
Mingkai Hu
Aneesh Bansal
Ryan Harkin
Zhao Qiang
Scott Wood
Jagan Teki
Siva Durga Prasad Paladugu