Commit graph

10 commits

Author SHA1 Message Date
Kumar Gala
e99ccb4881 Introduce phys_size_t and move phys_addr_t into asm/types.h
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-13 17:13:46 -07:00
Yuri Tikhonov
b428f6a8c6 The patch introduces the CRITICAL feature of POST tests. If the test marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Shinya Kuribayashi
f8fa6368a6 Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit targets.
The previous patch was lacking of i386, microblaze, nios and nios2. This
patch tries to fix them.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-02 21:11:11 +01:00
Haavard Skinnemoen
4d7d6936eb Introduce map_physmem() and unmap_physmem()
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.

This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-12-13 13:15:16 +01:00
Haavard Skinnemoen
812711ce6b Implement __raw_{read,write}[bwl] on all architectures
This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
from Linux.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-12-13 13:15:04 +01:00
Haiying Wang
3a197b2fe4 [PATCH v3] Add sync to ensure flash_write_cmd is fully finished
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-02-21 16:52:31 +01:00
Scott McNutt
c2ced000f4 Nios II - Fix I/O Macros and mini-app stubs
-Fix asm/io.h macros
  -Eliminate use of CACHE_BYPASS in cpu code
  -Eliminate assembler warnings
  -Fix mini-app stubs and force no small data
  Patch by Scott McNutt, 08 Jun 2006
2006-06-08 11:59:57 -04:00
Wolfgang Denk
f08abe311b Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.h 2005-11-25 16:38:03 +01:00
wdenk
0c1c117cf1 * Patch by Scott McNutt, 21 Oct 2004:
Add support for Nios-II EPCS Controller core.

* Patch by Scott McNutt, 20 Oct 2004:
  Nios-II cleanups:
  - Add sysid command (Nios-II only).
  - Locate default exception trampoline at proper offset.
  - Implement I/O routines (readb, writeb, etc)
  - Implement do_bootm_linux
2005-03-30 23:28:18 +00:00
wdenk
5c952cf024 Patches by Scott McNutt, 24 Aug 2004:
- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
2004-10-10 21:27:30 +00:00