Commit graph

19 commits

Author SHA1 Message Date
Michael Schwingen
29161f47d0 IXP42x PCI rewrite
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead.  Move board-specific PCI
setup code (clock/reset) to board directory.

Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
Kumar Gala
3a0e3c27a5 powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixup
Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus.  Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.

Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
back by searching for it means we can do things like dynamically allocate
them or not have to expose the static structures to all users.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-14 01:32:19 -06:00
Peter Tyser
009884ae35 pci: Use intelligent indentation for CONFIG_PCI_SCAN_SHOW
When CONFIG_PCI_SCAN_SHOW is defined U-Boot prints out PCI devices as
they are found during bootup, eg:
  PCIE1: connected as Root Complex
        01:00.0 - 10b5:8518 - Bridge device
        02:01.0 - 10b5:8518 - Bridge device
        03:00.0 - 10b5:8112 - Bridge device
        04:01.0 - 8086:1010 - Network controller
        04:01.1 - 8086:1010 - Network controller
        02:02.0 - 10b5:8518 - Bridge device
        02:03.0 - 10b5:8518 - Bridge device
        06:00.0 - 10b5:8518 - Bridge device
        07:00.0 - 10b5:8518 - Bridge device
        08:00.0 - 1957:0040 - Processor
        07:01.0 - 10b5:8518 - Bridge device
        09:00.0 - 10b5:8112 - Bridge device
        07:02.0 - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
        0d:00.0 - 1957:0040 - Processor
  PCIE2: Bus 0c - 0d

This information is useful, but its difficult to determine the PCI bus
topology.  To things clearer, we can use indention to make it more
obvious how the PCI bus is organized.  For the example above, the
updated output with this change is:

  PCIE1: connected as Root Complex
    01:00.0     - 10b5:8518 - Bridge device
     02:01.0    - 10b5:8518 - Bridge device
      03:00.0   - 10b5:8112 - Bridge device
       04:01.0  - 8086:1010 - Network controller
       04:01.1  - 8086:1010 - Network controller
     02:02.0    - 10b5:8518 - Bridge device
     02:03.0    - 10b5:8518 - Bridge device
      06:00.0   - 10b5:8518 - Bridge device
       07:00.0  - 10b5:8518 - Bridge device
        08:00.0 - 1957:0040 - Processor
       07:01.0  - 10b5:8518 - Bridge device
        09:00.0 - 10b5:8112 - Bridge device
       07:02.0  - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
    0d:00.0     - 1957:0040 - Processor
  PCIE2: Bus 0c - 0d

In the examples above, an MPC8640 is connected to a PEX8518 PCIe switch
(01:00 and 02:0x), which is connected to another PEX8518 PCIe switch
(06:00 and 07:0x), which then connects to a MPC8572 processor (08:00).
Also, the MPC8640's PEX8518 PCIe switch is connected to a PCI ethernet
card (04:01) via a PEX8112 PCIe-to-PCI bridge (03:00).

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-11-14 23:46:48 +01:00
Peter Tyser
a38d216eeb pci: Fix ordering of devices when CONFIG_PCI_SCAN_SHOW
Move the printing of PCI device information to before the PCI device is
configured.  This prevents the case where recursive scanning results in
the deepest devices being printed first.

This change also makes PCI lockups during enumeration easier to
diagnose since the device that is being configured is printed out prior
to configuration.  Previously, it was not possible to determine which
device caused the PCI lockup.

Original example:
  PCIE1: connected as Root Complex
        04:01.0 - 8086:1010 - Network controller
        04:01.1 - 8086:1010 - Network controller
        03:00.0 - 10b5:8112 - Bridge device
        02:01.0 - 10b5:8518 - Bridge device
        02:02.0 - 10b5:8518 - Bridge device
        08:00.0 - 1957:0040 - Processor
        07:00.0 - 10b5:8518 - Bridge device
        09:00.0 - 10b5:8112 - Bridge device
        07:01.0 - 10b5:8518 - Bridge device
        07:02.0 - 10b5:8518 - Bridge device
        06:00.0 - 10b5:8518 - Bridge device
        02:03.0 - 10b5:8518 - Bridge device
        01:00.0 - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b

Updated example:
  PCIE1: connected as Root Complex
        01:00.0 - 10b5:8518 - Bridge device
        02:01.0 - 10b5:8518 - Bridge device
        03:00.0 - 10b5:8112 - Bridge device
        04:01.0 - 8086:1010 - Network controller
        04:01.1 - 8086:1010 - Network controller
        02:02.0 - 10b5:8518 - Bridge device
        02:03.0 - 10b5:8518 - Bridge device
        06:00.0 - 10b5:8518 - Bridge device
        07:00.0 - 10b5:8518 - Bridge device
        08:00.0 - 1957:0040 - Processor
        07:01.0 - 10b5:8518 - Bridge device
        09:00.0 - 10b5:8112 - Bridge device
        07:02.0 - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-11-14 23:46:47 +01:00
Peter Tyser
983eb9d162 pci: Clean up PCI info when CONFIG_PCI_SCAN_SHOW
This change does the following:
- Removes the printing of the PCI interrupt line value.  This is
  normally set to 0 by U-Boot on bootup and is rarely used during
  everyday operation.

- Prints out the PCI function number of a device.  Previously a device
  with multiple functions would be printed identically 2 times, which is
  generally confusing.  For example, on an Intel 2 port gigabit Ethernet
  card the following was displayed:
    ...
    04  01  8086  1010  0200  00
    04  01  8086  1010  0200  00
    ...

- Prints a text description of each device's PCI class instead of the
  raw PCI class code.  The textual description makes it much easier to
  determine what devices are installed on a PCI bus.

- Changes the general formatting of the PCI device output.

Previous output:
  PCIE1: connected as Root Complex
          04  01  8086  1010  0200  00
          04  01  8086  1010  0200  00
          03  00  10b5  8112  0604  00
          02  01  10b5  8518  0604  00
          02  02  10b5  8518  0604  00
          08  00  1957  0040  0b20  00
          07  00  10b5  8518  0604  00
          09  00  10b5  8112  0604  00
          07  01  10b5  8518  0604  00
          07  02  10b5  8518  0604  00
          06  00  10b5  8518  0604  00
          02  03  10b5  8518  0604  00
          01  00  10b5  8518  0604  00
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
          0d  00  1957  0040  0b20  00
  PCIE2: Bus 0c - 0d

Updated output:
  PCIE1: connected as Root Complex
          04:01.0 - 8086:1010 - Network controller
          04:01.1 - 8086:1010 - Network controller
          03:00.0 - 10b5:8112 - Bridge device
          02:01.0 - 10b5:8518 - Bridge device
          02:02.0 - 10b5:8518 - Bridge device
          08:00.0 - 1957:0040 - Processor
          07:00.0 - 10b5:8518 - Bridge device
          09:00.0 - 10b5:8112 - Bridge device
          07:01.0 - 10b5:8518 - Bridge device
          07:02.0 - 10b5:8518 - Bridge device
          06:00.0 - 10b5:8518 - Bridge device
          02:03.0 - 10b5:8518 - Bridge device
          01:00.0 - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
          0d:00.0 - 1957:0040 - Processor
  PCIE2: Bus 0c - 0d

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-11-14 23:46:46 +01:00
John Schmoller
96d6160324 pci: Add ability to re-enumerate PCI buses
Add a new 'pci enum' command which re-enumerates the PCI buses.  This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.

Also enable the 'pci enum' command for X-ES's Freescale-based boards.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-10-22 02:17:12 -05:00
Wolfgang Denk
252b404d95 Fix PCI_BASE_ADDRESS_5 handling in pci_hose_config_device()
Signed-off-by: FUJITA Kazutoshi <fujita@soum.co.jp>
Signed-off-by: <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-03-21 17:58:07 +01:00
Anton Vorontsov
cc2a8c7751 PCI: Add pci_last_busno() helper
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.

Will be used by PCI/PCIe initialization code.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:51:10 -06:00
Becky Bruce
6e61fae4d3 drivers/pci: Create pci_map_bar function
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses.  pci_map_bar()
is created to return the virtual address for a pci region.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-10 00:27:13 +01:00
Kumar Gala
2d43e873a2 pci: give preference to non-PCI_REGION_SYS_MEMORY regions when matching
When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys}
we should give preference to memory regions that aren't system memory.

Its possible that we have over mapped system memory in the regions and
we want to avoid depending on the order of the regions.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-07 23:50:08 +01:00
Kumar Gala
30e76d5e3b pci: Allow for PCI addresses to be 64-bit
PCI bus is inherently 64-bit.  While not all system require access to
the full 64-bit PCI address range some do.  This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2008-10-24 17:32:49 -05:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ab6878c7bc drivers/pci: Move conditional compilation to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:40 +02:00
Stefan Roese
dc1da42f81 pci: Move PCI device configuration check into a separate weak function
This patch moves the check, if a device should be skipped in PCI PNP
configuration into the function pci_skip_dev(). This function is defined
as weak so that it can be overwritten by a platform specific one if
needed. The check if the device should get printed in the PCI summary upon
bootup (when CONFIG_PCI_SCAN_SHOW is defined) is moved to the function
pci_print_dev() which is also defined as weak too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 10:10:32 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Wolfgang Denk
65dcfa7920 Revert "pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option"
This reverts commit 55774b512f
which broke many PowerPC boards.
2008-05-12 01:11:21 +02:00
Becky Bruce
36f32675f4 Update pci code to use phys_addr_t
Physical addrs need to be represented by phys_addr_t, not
unsigned long.  Otherwise, systems that use CONFIG_PHYS_64BIT
are going to fail mightily.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-05-10 00:59:57 +02:00
Nobuhiro Iwamatsu
55774b512f pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.

When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-23 01:38:22 +01:00
Jean-Christophe PLAGNIOL-VILLARD
93a686ee9c drivers/pci : move pci drivers to drivers/pci
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-24 20:35:55 +01:00
Renamed from drivers/pci.c (Browse further)