Commit graph

40 commits

Author SHA1 Message Date
Stefan Roese
ea9f6bce38 ppc4xx: Update 440EPx lwmon5 board support
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 08:37:01 +02:00
Sergei Poselenov
b44896215a Merged POST framework with the current TOT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2007-07-05 08:17:37 +02:00
Niklaus Giger
f780b83316 resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
2007-07-04 10:14:07 +02:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Igor Lisitsin
a11e06965e Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:21:01 +02:00
Stefan Roese
b7c3e93105 Merge with /home/stefan/git/u-boot/denx-440-exceptions 2007-06-15 11:20:13 +02:00
Grzegorz Bernacki
efa35cf12d ppc4xx: Clean up 440 exceptions handling
- Introduced dedicated switches for building 440 and 405 images required
  for 440-specific machine instructions like 'rfmci' etc.

- Exception vectors moved to the proper location (_start moved away from
  the critical exception handler space, which it occupied)

- CriticalInput now serviced (with default handler)

- MachineCheck properly serviced (added a dedicated handler and return
  subroutine)

- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
  unhandled and those not relevant for 4xx were eliminated)

- Eliminated Linux leftovers, removed dead code

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 11:19:28 +02:00
Stefan Roese
b765ffb773 [ppc4xx] Add initial lwmon5 board support
This patch adds initial support for the Liebherr lwmon5 board euqipped
with an AMCC 440EPx PowerPC.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 08:18:01 +02:00
Stefan Roese
61936667e8 ppc4xx: Add mtcpr/mfcpr access macros
Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-11 12:01:49 +02:00
Stefan Roese
90e6f41cf0 ppc4xx: Add output for bootrom location to 405EZ ports
Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:

U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)

CPU:   AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
       Bootstrap Option E - Boot ROM Location EBC (32 bits)
       16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board

Signed-off-by: Stefan Roese <sr@denx.de>
2007-04-18 12:05:59 +02:00
Stefan Roese
e50b791b3f Merge with /home/stefan/git/u-boot/acadia 2007-03-24 15:59:23 +01:00
Stefan Roese
0d974d5297 [PATCH] Add 4xx GPIO functions
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24 15:57:09 +01:00
Wolfgang Denk
35ded29fd9 Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-03-08 11:38:58 +01:00
Stefan Roese
df29449747 ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08 10:06:09 +01:00
Stefan Roese
07b7b0037a [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.

For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-06 07:47:04 +01:00
Stefan Roese
ba58e4c9a9 [PATCH] Update AMCC Katmai 440SPe eval board support
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.

Please note, that still some problems are left with some memory
configurations. See the driver for more details.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-01 21:11:36 +01:00
Stefan Roese
4745acaa1a [PATCH] Add support for the AMCC Katmai (440SPe) eval board
Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:57:08 +01:00
Stefan Roese
a78bc443ae [PATCH] Clear PLB4A0_ACR[WRP] on Sequoia (440EPx)
This fix will make the MAL burst disabling patch for the Linux
EMAC driver obsolete.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05 10:40:36 +01:00
Stefan Roese
4e26f1074c [PATCH] include/ppc440.h minor error affecting interrupts
Fixed include/ppc440.c for UIC address Bug

Corrects bug affecting the addresses for the universal interrupt
controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.

Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-29 12:03:57 +01:00
Stefan Roese
dfc8a9ee00 Merge with /home/stefan/git/u-boot/denx 2006-11-10 07:48:47 +01:00
Wolfgang Denk
ac611700e5 Fix comments in include/ppc440.h
Patch by Martin Hicks, 16 Jun 2006
2006-09-20 23:47:49 +02:00
Stefan Roese
64cd52efd1 Merge with /home/stefan/git/u-boot/denx 2006-09-18 10:48:03 +02:00
Stefan Roese
887e2ec9ec Add support for AMCC Sequoia PPC440EPx eval board
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
  in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
  please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
  in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
2006-09-07 11:51:23 +02:00
Stefan Roese
899620c2d6 Add initial support for the ALPR board from Prodrive
NAND needs some additional testing
Patch by Heiko Schocher, 15 Aug 2006
2006-08-15 14:22:35 +02:00
Marian Balakowicz
bba6837732 Fix CONFIG_440_GX define usage. 2006-06-30 18:35:04 +02:00
Marian Balakowicz
f6e5739a68 Merge: Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 18:19:42 +02:00
Marian Balakowicz
6c5879f380 Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 16:30:46 +02:00
Stefan Roese
a4c8d1389f Add support for PCS440EP board
Patch by Stefan Roese, 02 Jun 2006
2006-06-02 16:20:36 +02:00
Stefan Roese
6e7fb6eaa5 Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.
Patch by John Otken, 23 Nov 2005
2005-11-29 18:18:21 +01:00
Stefan Roese
5568e613ee Add support for Prodrive P3P440 board:
- Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c
- CFG_FLASH_QUIET_TEST added to use the common CFI driver
  for bank autodetection
Patch by Stefan Roese, 22 Nov 2005
2005-11-22 13:20:42 +01:00
Wolfgang Denk
6ed6ce62be Fix typos in include/ppc440.h
Patch by Andrew E Mileski, 04 Feb 2005
2005-09-25 16:01:42 +02:00
Stefan Roese
b79316f2a2 Add Sandburst Metrobox and Sandburst Karef board support packages.
Second serial port on 440GX now defined as a system device.
Add 'Short Etch' code for Cicada PHY within 440gx_enet.c
Patch by Travis B. Sawyer, 12 Jul 2005

Check return value of malloc in 440gx_enet.c
Patch by Travis B. Sawyer, 18 Jul 2005
2005-08-15 12:31:23 +02:00
Stefan Roese
846b0dd2dc Changed CONFIG_440_xx to CONFIG_440xx for a consistent design (405 and linux)
Patch by Stefan Roese, 08 Aug 2005
2005-08-08 12:42:22 +02:00
Stefan Roese
17f50f22bc Add support for AMCC Bamboo PPC440EP eval board
Patch by Stefan Roese, 04 Aug 2005
2005-08-04 17:09:16 +02:00
Stefan Roese
c157d8e219 Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
Patch by Steven Blakeslee, 27 Jul 2005
2005-08-01 16:41:48 +02:00
wdenk
6315349202 Patch by David Adair, 27 Oct 2004:
Add missing 440GX SDRAM Controller reset
2005-04-03 20:55:38 +00:00
wdenk
0e6d798cb3 * Patch by Travis Sawyer, 01 Mar 2004:
Ocotea:
  - Add IBM PPC440GX Ref Platform support (Ocotea)
    Original code by Paul Reynolds <PaulReynolds@lhsolutions.com>
    Adapted to U-Boot and 440GX port
  440gx_enet.c:
  - Add gracious handling of all Ethernet Pin Selections for 440GX
  - Add RGMII selection for Cicada CIS8201 Gigabit PHY
  ppc440.h:
  - Add needed bit definitions
  - Fix formatting

* Patch by Carl Riechers, 1 Mar 2004:
  Add PPC440GX prbdv0 divider to fix memory clock calculation.

* Patch by Stephan Linz, 27 Feb 2004
  - avoid problems for targets without NFS download support
2004-03-14 00:07:33 +00:00
wdenk
ba56f62576 Patch by Travis Sawyer, 30 Dec 2003:
Add support for IBM PPC440GX. Multiple EMAC Ethernet devices,
select MDI port based on enabled EMAC device.
Add support for XES Inc <http://www.xes-inc.com> XPedite1000 440GX
base PrPMC board.
2004-02-06 23:19:44 +00:00
wdenk
8bde7f776c * Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)
2003-06-27 21:31:46 +00:00
wdenk
c00b5f85ea Initial revision 2002-11-03 11:12:02 +00:00