Commit graph

7 commits

Author SHA1 Message Date
York Sun
ed77b7045e boards: ls2080: Fix default bootargs
A white space is missing in multiple-line string for bootargs.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-03-21 12:42:12 -07:00
Shaohui Xie
abc7d0f75c armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY
To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins
polarity by setting IRQCR register, because AQR405 interrupt is low
active but GIC accepts high active.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21 12:42:10 -07:00
Prabhakar Kushwaha
16ed856019 armv8: ls2080: Add mcinitcmd env variable in default env
Define mcinitcmd env variable to load Management complex during
u-boot boot sequence.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:40:56 -08:00
Ashish Kumar
9e71bb9ca2 armv8: ls2080a: Increase default hugepage count
Increase default hugepage count to 256 from 16

Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:40:55 -08:00
Tang Yuantian
989c5f0a8f armv8: Add sata support on Layerscape ARMv8 board
Freescale ARM-based Layerscape contains a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls2080aqds, ls2080ardb and
ls1043aqds boards.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-15 08:57:35 +08:00
Pratiyush Mohan Srivastava
b22b1dc6b7 Enable console log from earlyconsole in Linux bootargs
Remove 115200 from "earlycon" to avoid loss of initial
log messages during linux kernel 4.1  bootup

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:29 -08:00
Prabhakar Kushwaha
449372148f armv8: LS2080A: Rename LS2085A to reflect LS2080A
LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
So renaming existing LS2085A code base to reflect LS2080A (Prime personality)

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Dropped #ifdef in cpu.c for cpu_type_list]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30 08:53:04 -08:00
Renamed from include/configs/ls2085ardb.h (Browse further)