Create a Kconfig entry for DISPLAY_CPUINFO and make it be the default
in certain architectures. Migrate all config files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
At present only chromebook boards are converted to DM video. Other
x86 boards are still using the legacy cfb_console driver. This
switches to use DM version drivers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These two options go together and it is best to do the conversion in one
step. So enable DM_MMC_OPS by default if DM_MMC is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the configuration to use the new driver. Drop the existing plumbing
code and unused header files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We have a number of OlinuXino Lime2 boards (both NAND and eMMC versions)
which were experiencing sporadic hangs. After testing with some heavy
benchmarking and help from the Armbian forum, it was pinned down as the
DRAM settings for the board. The default is 480MHz, but this is unstable,
and even the build instructions from the vendor Olimex themselves say to
set the DRAM clock to 384. See line 96 at:
https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.103-release-2/BUILD_DESCRIPTION_A20_Olimex_kernel_3.4.103%2B_Jessie_rel_2.txt
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Synology DS109 is based on MV88F6281. The code
is based on Dreamplug code with modificatons
from Synologys open source repository.
Signed-off-by: Walter Schweizer <swwa@users.sourceforge.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Add DTS support for dra72 evm Rev C which has the following
changes
* Two ethernet ports now instead of the single one in rev B.
* DP83867 ethernet phy instead of DP838865.
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enables driver model flag CONFIG_DM_USB for LS2080A
platform defconfigs.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Commit f225d39d30 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2 is
configured appropriately before booting in nonsec/hyp mode.
However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.
Cc: Jon Medhurst <tixy@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>
Tested-by: Jon Medhurst <tixy@linaro.org>
Now that fastboot options are available in Kconfig, we can migrate them
from DRA7 header to corresponding DRA7 defconfigs.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable Linear Physical Address Extension mode which is a
prerequisite for hypervisor mode.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable Linear Physical Address Extension mode which is a
prerequisite for hypervisor mode.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move DDR3, DDR4 and related config options to Kconfig and clean up
existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move DDR3, DDR4 and realted options to Kconfig and clean up existing
uses.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enables driver model flag CONFIG_DM_USB for LS1043A
platform defconfigs.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add i.MX6ULL EVK board support:
Add device tree file, which is copied from NXP Linux.
Enabled DM_MMC, DM_GPIO, DM_I2C, DM_SPI, PINCTRL, DM_REGULATOR.
The uart iomux settings are still keeped in board file.
Boot Log:
U-Boot 2016.09-rc1-00366-gbb419ef-dirty (Aug 11 2016 - 13:08:58 +0800)
CPU: Freescale i.MX6ULL rev1.0 at 396MHz
CPU: Commercial temperature grade (0C to 95C) at 15C
Reset cause: POR
Model: Freescale i.MX6 ULL 14x14 EVK Board
Board: MX6ULL 14x14 EVK
DRAM: 512 MiB
MMC: initialized IMX pinctrl driver
FSL_SDHC: 0, FSL_SDHC: 1
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The config option AM33XX is used in several boards and should be
defined as a stand-alone option for this SOC. We break this out
from target boards that use this SoC and common headers then enable
AM33XX on in all the boards that used these targets to eliminate any
functional change with this patch.
This is similar to what has already been done in
9de852642cae ("arm: Kconfig: Add support for AM43xx SoC specific Kconfig")
and is done for the same reasons.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rock2 has been tested with back to brom feature. The tricky part is that
with this feature the default environment is inside u-boot, and it's
defined for every rk3288 board independetly. So I just changed it for
rock2 here if ROCKCHIP_SPL_BACK_TO_BROM.
Solve by moving environment after u-boot before 1M boundary
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>
Commit ce02a71c23 "tegra: dts: Sync tegra20 device tree files with
Linux" enabled the ULPI USB port on Ventana, but made no attempt to ensure
that U-Boot code could handle this. In practice, various code is missing,
and various configuration options are not enabled, which causes U-Boot to
hang when attempting to initialize this USB port. This patch enables ULPI
PHY support on Ventana, and adds the required pinmux setup for the port to
operate. Note that Ventana is so similar to Seaboard that this change is
made in the Seaboard board file, which is shared with Ventana.
Seaboard also has the ULPI USB port wired up in hardware, although to an
internal port that often doesn't have anything attached to it. However,
the DT nodes for the USB controller and PHY had different status property
values, so the port was not initialized by U-Boot. Fix this inconsistency,
and enable the ULPI port, just like in the Linux kernel DT. This likewise
requires enabling ULPI support in the Seaboard defconfig.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This patch adds basic support for the Marvell Armada 7K DB-88F7040
development board. Supported are the following interfaces:
- UART
- SPI (incl. SPI NOR)
- I2C
- USB
- SATA / AHCI
Support for other interfaces will follow.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
This patch adds basic support for the Marvell Armada 3700 DB-88F3720
development board. Supported are the following interfaces:
- UART
- SPI (incl. SPI NOR)
- I2C
- Ethernet
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Introduce a hidden USB_FUNCTION_DFU Kconfig option and select it for
CMD_DFU (as we must have the DFU command enabled to do anything DFU).
Make all of the entries in drivers/dfu/Kconfig depend on CMD_DFU and add
options for all of the back end choices that DFU can make use of.
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
move the UBI config options into Kconfig.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andrew F. Davis <afd@ti.com>
Reviewed by: Evgeni Dobrev <evgeni at studio-punkt.com>
It should be EMMC_BOOT instead of CONFIG_EMMC_BOOT.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This board is a plug in card for Marvell's switch system development
kits. Form-factor aside it is similar to the DB-88F6820-GP with the
following differences.
- TCLK is 200MHz
- SPI1 is used
- No SATA
- No MMC
- NAND flash
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
As I repeated in the ML, I am unhappy with config entries with bare
defaults. Kick them out of arch/arm/mach-uniphier/Kconfig.
Currently, CONFIG_SPL_SERIAL_SUPPORT is not user-configurable
(build fails without it), but it should be fixed later anyway,
so I am moving CONFIG_SPL_SERIAL_SUPPORT to defconfigs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch enable fixed regulator driver for rk3399 evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch to enable configs for usb module
- xhci
- ehci
- usb storage
- usb net
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Squashed in patch to move to Kconfig:
https://patchwork.ozlabs.org/patch/672543/
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
This patch enable rk3399 pinctrl driver and gpio driver which is sub-node
of pinctrl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Moved FSL_QSPI/SPI/SPI-FLASH configs from include/configs
into respective used defconfigs.
- CONFIG_FSL_QSPI
- CONFIG_SPI_FLASH
- CONFIG_SPI_FLASH_BAR
- CONFIG_SPI_FLASH_STMICRO
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch introduces support for building U-Boot to run on the MIPS
Boston development board. This is a board built around an FPGA & an
Intel EG20T Platform Controller Hub, used largely as part of the
development of new CPUs and their software support. It is essentially
the successor to the older MIPS Malta board.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
MIPSfpga is an FPGA based dev platform.
In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks
The FPGA dev board used is the Nexys4DDR board by Digilent.
For more information, check the Readme file in board/imgtec/xilfpga
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config
There are two boards, MIP405 and MIP405T that have a few differences.
Start by checking for CONFIG_TARGET_MIP405. Then introduce
CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert
also convert the usage of CONFIG_ISO_STRING to be based on Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the config IDENT_STRING to Kconfig and migrate all boards
[sivadur: Migrate zynq boards]
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[trini: Update configs, add some default to sunxi Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
This reverts commit 90c08d9e08.
I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is
actually too big for some boards. Perhaps 0x800 is enough, but the
situation varies board by board.
Let's postpone our decision until we come up with a better idea.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now all UniPhier SoCs support a pinctrl driver. Select (SPL_)PINCTRL
since it is mandatory even for base use.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Sinlinx SinA33 has a USB OTG port, but VBUS is controlled manually from
a jumper pad.
Enable OTG in gadget mode, as well as the download gadget and related
functions.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Sinlinx SinA33 has 1 USB host port. Enable EHCI_HCD support for it.
Also enable USB mass storage support so we can access USB sticks.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Sinlinx SinA33 uses PB4 for mmc0 card detect.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The NanoPi NEO is a simple h3 board with 512MB RAM, ethernet, one usb
and one usb OTG connector.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
There are a few options which use lower case. We should use upper case for
all CONFIG options.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add usbtty/nand hunk to include/configs/spear3xx_evb.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
A few boards define this in a header file which is incorrect. It means that
Kconfig options that rely on this cannot be used. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few boards define this in a header file which is incorrect. It means that
Kconfig options that rely on this cannot be used. Move it.
Note that quite a few boards defined this options but do not appear to
actually use SPL:
BSC9132QDS_NOR_DDRCLK100_SECURE
BSC9132QDS_NOR_DDRCLK133_SECURE
BSC9132QDS_SDCARD_DDRCLK100_SECURE
BSC9132QDS_SDCARD_DDRCLK133_SECURE
BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
BSC9132QDS_SPIFLASH_DDRCLK133_SECURE
C29XPCIE_NOR_SECBOOT
P1010RDB-PA_36BIT_NAND_SECBOOT
P1010RDB-PA_36BIT_SPIFLASH_SECBOOT
P1010RDB-PA_NAND_SECBOOT
P1010RDB-PA_NOR_SECBOOT
P1010RDB-PB_36BIT_NOR_SECBOOT
P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
P1010RDB-PB_NAND_SECBOOT
P1010RDB-PB_NOR_SECBOOT
P3041DS_SECURE_BOOT
P4080DS_SECURE_BOOT
P5020DS_NAND_SECURE_BOOT
P5040DS_SECURE_BOOT
T1023RDB_SECURE_BOOT
T1024QDS_DDR4_SECURE_BOOT
T1024QDS_SECURE_BOOT
T1024RDB_SECURE_BOOT
T1040RDB_SECURE_BOOT
T1042D4RDB_SECURE_BOOT
T1042RDB_SECURE_BOOT
T2080QDS_SECURE_BOOT
T2080RDB_SECURE_BOOT
T4160QDS_SECURE_BOOT
T4240QDS_SECURE_BOOT
ls1021aqds_nor_SECURE_BOOT
ls1021atwr_nor_SECURE_BOOT
ls1043ardb_SECURE_BOOT
For these boards CONFIG_SPL_DM will no-longer be defined in SPL. But since
they apparently don't have an SPL, this should not matter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the defconfig files to match their canonical form, as produced by
'make safedefconfig'.
This is the result of running 'tools/moveconfig.py -s' on the tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
LS1046AQDS Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe: supports Gen 1 and Gen 2
SATA 3.0: one SATA 3.0 port
USB 3.0: two micro AB connector and one type A connector
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS1046ARDB Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 512 Mbyte NAND flash
* Two 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
* On-board 4G eMMC
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe:
* PCIe1 (SerDes2 Lane0) to miniPCIe slot
* PCIe2 (SerDes2 Lane1) to x2 PCIe slot
* PCIe3 (SerDes2 Lane2) to x4 PCIe slot
SATA:
* SerDes2 Lane3 to SATA port
USB 3.0: one super speed USB 3.0 type A port
one Micro-AB port
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This SoC is equipped with two EHCI cores and two xHCI cores.
Enable the generic EHCI driver for the former.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This driver has not been converted to Driver Model, and it is an
obstacle to migrate other block device drivers. Remove it for now.
The UniPhier SoCs already use a DM-based EHCI driver, so now
ARCH_UNIPHIER can select DM_USB.
These two changes must be done atomically because removing the
legacy driver causes a build error.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
In some cases we were missing CONFIG_USB=y so enable that when needed.
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
If both SPL_DM and SPL_OF_CONTROL are enabled, SPL needs to bind
several devices, but CONFIG_SYS_MALLOC_F_LEN=0x400 is apparently
not enough. Increase the default to 0x2000 for the case. This
will be helpful for shorter defconfigs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
An issue in the TI secure image generation tool causes the ROM to
load the SPL at a different load address than what is specified by
CONFIG_ISW_ENTRY_ADDR while doing a peripheral boot on HS devices.
This causes the SPL to fail on secure devices during peripheral
boot.
The TI secure image generation tool has been fixed so that the SPL
will always be loaded at 0x403018E0 by the ROM code for both
peripheral and memory boot modes.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI AM57xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI DRA7xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI AM43xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Remove the device definition from board file, update the driver with
the new compatible property and update config with necessary options.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the raspberry pi, you can disable the serial port to gain dynamic frequency
scaling which can get handy at times.
However, in such a configuration the serial controller gets its rx queue filled
up with zero bytes which then happily get transmitted on to whoever calls
getc() today.
This patch adds detection logic for that case by checking whether the RX pin is
mapped to GPIO15 and disables the mini uart if it is not mapped properly.
That way we can leave the driver enabled in the tree and can determine during
runtime whether serial is usable or not, having a single binary that allows for
uart and non-uart operation.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
NXP kernel expects to boot in secure mode, so introduce
warp7_secure_defconfig target which selects CONFIG_ARMV7_BOOT_SEC_DEFAULT.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Since commit a13d3757f7 ("warp: Use imx_ddr_size() for calculating the
DDR size") warp board no longer boots.
The reason for the breakage is that the warp board is using the DDR
configuration from mx6slevk. A fundamental difference between warp and
mx6slevk is that warp only uses one DDR chip select while mx6slevk uses two.
The imx_ddr() function calculates the RAM size in runtime by reading the
values of registers MDCTL and MDMISC.
So in order to fix this warp boot issue, create a imximage DDR file specific
to warp, where the MDCTL register is configured to only activates a single
chip select.
Reported-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Add support for Advantech DMS-BA16 board. The board is based on Advantech
BA16 module which has a i.MX6D processor. The board supports:
- FEC Ethernet
- USB Ports
- SDHC and MMC boot
- SPI NOR
- LVDS and HDMI display
Basic information about the module:
- Module manufacturer: Advantech
- CPU: Freescale ARM Cortex-A9 i.MX6D
- SPECS:
Up to 2GB Onboard DDR3 Memory;
Up to 16GB Onboard eMMC NAND Flash
Supports OpenGL ES 2.0 and OpenVG 1.1
HDMI, 24-bit LVDS
1x UART, 2x I2C, 8x GPIO,
4x Host USB 2.0 port, 1x USB OTG port,
1x micro SD (SDHC),1x SDIO, 1x SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sbabic@denx.de
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.
The dts file is identical to the one submitted to the upstream kernel,
except that it has the pending patch to enable the ethernet controller
squashed in, as u-boot already has sun8i-emac support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
A33-OLinuXino is A33 development board designed by Olimex LTD.
It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector,
headphone and mic jacks, connector for LiPo battery and optional
4GB NAND Flash.
It has two 40-pin headers. One for LCD panel, and one for
additional modules. Also there is CSI/DSI connector.
The dts files are identical to the ones submitted to the upstream kernel.
Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The iNet D978 rev2 is a tablet board designed by iNet, which is intended to
use on 10" tablets with a appearance like Apple iPad. It has A33 SoC, 1GB
RAM, 8GB/16GB NAND, SDIO Wi-Fi, a MicroUSB port and a MicroSD slot.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1. The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.
The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts. The spreadsheet
was converted from v09 to v11 by me.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The board ID EEPROM and board ID stickers on p2771-0000 will use a numeric
versioning scheme, with version numbers such as 000/100/200/300/400/500.
Within NVIDIA, these versions are also known as A00/A01/A02/A03/A04/B00.
However, that numbering scheme is not easily visible outside of NVIDIA,
and so does not make much sense to use. Convert U-Boot to use the readily
visible numeric scheme.
Also, it turns out that the current A02 DT actually applies to board
versions 000/100/200 (A00..A02). Consequently rename this to 000 not 200
so that all U-Boot builds are named after the first version of the HW they
support.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This introduces two board defconfig files for generating EFI 32-bit
and 64-bit payloads, to run on QEMU x86 target.
With these in place, hopefully buildman will catch any build error
with EFI payload support on x86.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This will be useful, for example, to load firmware to DRAM and make
it visible to other agents.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is very likely to be necessary for normal use cases.
Set its default to 'y' for shorter defconfig files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 76c52ce29f ("ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN
to bind all nodes") missed to increase this config for sLD3.
This change is needed to add "u-boot,dm-pre-reloc" to some nodes;
more devices are bound, more malloc memory is needed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add a defconfig and dts file for the Empire Electronix M712 tablet, this
is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on
the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
wifi chip and a DMART06 (1238a4) accelerometer.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Sync dts files with the current (Aug 18th 2016) state of Maxime's
linux/sunxi/for-next repo.
Note this commit also updates configs/MSI_Primo81_defconfig,
adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary
because the tablet does not have a reachable uart so the dts sync
drops its serial0 alias.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add a defconfig and dts file for tablets using the generic inet-q972 PCB.
Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
(mini) power-barrel and an usb wifi module.
This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.
The dts files are identical to the ones submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
BLANCHE is development board based on R-Car V2H SoC (R8A7792)
This commit supports the following periherals:
- SCIF, Ethernet, QSPI, MMC
Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Salvator-x is an entry level development board based on
R-Car H3 SoC (R8A7795). This commit supports SCIF only.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch adds support for the BayTrail based theadorable-x86-dfi-bt700
board which uses the DFI BT700 BayTrail Qseven SoM on a custom baseboard.
The main difference to the DFI baseboard is, that it isn't equipped
with a Super IO chip and uses the internal HS SIO UART (memory mapped
PCI based) as the console UART.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds support for the DFI BayTrail BT700 QSeven SoM installed
on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton
NCT6102D Super IO chip providing the UART as console.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch includes the following changes:
- Remove Designware I2C support from dts as its not used
- Configure SMBus PADs in dts
- Enable I2C commands and I2C support
- Configure SMSC2513 USB hub via SMBus upon startup
- Move environment location to match Minnowmax example
- Enhancement of the default environment
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
K2G can benefit from driver model support in the
MMC/SD driver it uses: omap_hsmmc
Enable driver model MMC support for K2G.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.
- Avnet Xilinx LX60
- Avnet Xilinx LX110
- Avnet Xilinx LX200
- Xilinx ML605
- Xilinx KC705
These boards share the same components (open-ethernet, ns16550 serial,
lcd display, flash, etc.).
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the
only board configuration that uses it and put it into that board's
defconfig.
Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI
connector (which may run at x2 electrically, depending on the board
version and configuration) and a x1 connection to the M.2 slot (which may
not be active, depending on the board version and configuration). This
change enables those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Now that clock and reset drivers exist for Tegra186, we can enable the SD
card controller. Now that a BPMP I2C driver exists for Tegra186, we can
communicate with the PMIC to enable power to the SD card. Hook up the DT
content and board code required to make the SD card work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Enable eth driver model for am43xx_evm as cpsw supports
driver model.
This was already added with the commit bc705ea1cf but with
commit 4c4e3b3775 to add fit support CONFIG_DM_ETH was missed.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable eth driver model for dra7xx_evm as cpsw supports
driver model.
This was already added with the commit 641b936fa5 but with
commit bd7245849f to add fit support CONFIG_DM_ETH was missed.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable DM based regulator framework and also fixed regulator support as
some IPs like mmc use regulators for there functioning.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is only one ethernet mac address in e-fuse, but there are
multiple slaves in keystone net, so enable random mac address
support.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is only one ethernet mac address in e-fuse, but there are
multiple slaves in keystone net, so enable random mac address
support.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is only one ethernet mac address in e-fuse, but there are
multiple slaves in keystone net, so enable random mac address
support.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On DRA7, pcf chip present at address 0x21 on i2c1, is used to
switch between cpsw slave0 and slave1. Hence, enable PCF
driver for the same.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add this option as a common config for all OHCI controllers. Its
help message was copied from Linux. Also, I moved it below EHCI
to respect the order in Linux's Kconfig.
Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only
user of OHCI_GENERIC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This option controls how long it should be paused before entering
the auto-boot mode. The default value from Kconfig should be fine
except socfpga_vining_fpga_defconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These config targets were added well before the Kconfig migration began
as a way to demonstrate how to make these platforms work with cut down
features. At this point in time they no longer serve a good purpose so
remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable the rockchip dwmmc driver for rk3399 and its evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Miniarm is a rockchip rk3288 based development board, which has lots of
interface such as HDMI, USB, micro-SD card, Audio etc.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so
that it is always available to the build system. Otherwise we can run
into cases where we have inconsistent sizes of certain attributes.
Ravi Babu reported offset mismatch of struct dwc3 across files since
commit 95ebc253e6 ("types.h: move and redefine resource_size_t").
Since the commit, resource_addr_t points to phys_addr_t, whose size
is dependent on CONFIG_PHYS_64BIT for ARM architecture.
I tried my best to use "select" where possible (for example, ARMv8
architecture) because I think this kind of option is generally user-
unconfigurable. However, I see some of PowerPC boards have 36BIT
defconfigs as well as 32BIT ones. I moved CONFIG_PHYS_64BIT to the
defconfigs for such boards.
CONFIG_36BIT is no longer referenced, so all of the defines were
removed from CONFIG_SYS_EXTRA_OPTIONS.
Fixes: 95ebc253e6 ("types.h: move and redefine resource_size_t")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Ravi Babu <ravibabu@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
As of now we have 2 flavors of ARC SDP boards:
1) AXS101 - with ARC770 in ASIC
2) AXS103 - with ARC HS38 in FPGA
Both options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.
While at it:
* Recreated defconfigs with savedefconfig
* In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.
But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.
Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi
And while at it:
* Finally switch hex numerical values in nsim.h to defines from
include/linux/sizes.h
* Add defconfigs with ARC HS38 cores
* Recreated all defconfigs with savedefconfig
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
The patch:
"dm: mmc: zynq: Convert zynq to use driver model for MMC"
(sha1: 329a449f2c)
added dependency on enabling some MMC options by default.
There are minimal ZynqMP configurations which require
only minimal configurations to be enabled to keep u-boot size
as lower as possible.
Move options to defconfig instead.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
With the recent bug fixes for the sun8i_emac driver all known issues
are resolved, so we can re-enable the driver.
While at it, also enable the emac on the Orange Pi One.
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Jagan Teki <jteki@openedev.com>
MACPWR was used to bring the Ethernet PHY out of reset. The designware
driver now supports the phy reset gpio binding, so this is no longer
needed. In fact in requesting the same GPIO, it makes the designware
driver fail to probe.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has
many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and
Gigabit Ethernet.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fennec is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes
on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access
to display pins, I2C, SPI, UART and GPIOs.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
AM571x IDK and AM572x IDK EVMs have spansion s25fl256s QSPI flash on the
board connected to TI QSPI IP over CS0. Therefore enable QSPI support.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
AM437x SK and AM437x IDK EVMs have 64MB flash, therefore enable
CONFIG_SPI_FLASH_BAR to access flash regions above 16MB.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Currently it's recommended to move some configuration options to the
defconfig file.
Move some USB related options to the defconfig file.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
This commit adds support for the Toradex Computer on Modules
Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
can be easily supported by one board. The board code detects RAM
size at runtime which is one of the differences between the two
boards. The board also uses the UART's in DTE mode, hence making
use of the new DTE support via serial DM.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
There is no need for introducing MX7_SEC, as there is the
CONFIG_ARMV7_BOOT_SEC_DEFAULT option for this purpose.
Switch to CONFIG_ARMV7_BOOT_SEC_DEFAULT and get rid of
MX7_SEC.
Tested by booting a 4.1.15 NXP kernel with mx7dsabresd_secure_defconfig
target.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
After moving CONFIG_USB_EHCI_MX7 to Kconfig,
the flag must be set in defconfig for mx7dsabresd.
It is already for the not secure config, it is
missing in the secure configuration.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Disable the sun8i emac driver for now, there are 2 issues with it:
1) It is causing issues with network connectivity under the kernel driver,
when booting the kernel with v2 of Corentin's sun8i-h3 emac driver, I get
the connection status bouncing between connected at 100mbps full-duplex
and being down every second.
The second issue is that when trying to use it from u-boot
I get a number of unaligned cache flush errors:
=> dhcp
BOOTP broadcast 1
BOOTP broadcast 2
CACHE: Misaligned operation at range [7bf594a8, 7bf59628]
BOOTP broadcast 3
CACHE: Misaligned operation at range [7bf59c90, 7bf59e10]
CACHE: Misaligned operation at range [7bf5a478, 7bf5a5f8]
DHCP client bound to address 10.42.43.80 (1009 ms)
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
There is a new Orange Pi PC *Plus* version available now,
this is an extended version of the regular Orange Pi PC
with sdio wifi and an eMMC.
The upstream kernel devs have decided that they want a separate
dts for the PC Plus rather then sharing a single dts between the
regular PC and the PC Plus. So add a new orangepi_pc_plus_defconfig
to match.
The added dts file matches the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Add SD secure boot target for ls1021atwr.
Implement board specific spl_board_init() to setup CAAM stream ID and
corresponding stream ID in SMMU. Change the u-boot size defined by a
macro for copying the main U-Boot by SPL to also include the u-boot
Secure Boot header size as header is appended to u-boot image. So header
will also be copied from SD to DDR.
Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable i2c driver model for am57xx_evm as omap i2c
supports driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable i2c driver model for dra7xx_hs_evm as omap i2c
supports driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable i2c driver model for dra7xx_evm as omap i2c
supports driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable i2c driver model for am43xx_hs_evm as omap i2c
supports driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable i2c driver model for am43xx_evm as omap i2c
supports driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable i2c driver model for am335x_evm as omap i2c
supports driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable i2c driver model for am335x_boneblack_vboot as omap i2c
supports driver model. Also enable CONFIG_DM_I2C_COMPAT for
legacy drivers of i2c devices.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch add basic config option for evb-rk3399 board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Rockchip socs are always named rkxxxx in all places, as also shown
by the naming of the rk3036 pinctrl file itself.
Therefore also name the config symbol according to this scheme.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
The rk3288 pinctrl is very specific to this soc, so should
not hog the generic rockchip naming.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
evb-3288 board RK3288-based development board with 2 USB ports, HDMI,
VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes
on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to
display pins, I2C, SPI, UART and GPIOs. This add some basic files
required to allow the board to output serial messaged and can run
command(mmc info etc).
evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Most users of CONFIG_I2C_EEPROM were migrated to defconfig a while ago,
but sandbox was skipped. Leave it off for sandbox_spl where it does not
build, but does not need to be either.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
ARM64 is correctly select'ed in arch/arm/Kconfig, so this line in
the defconfig is unneeded.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC boot
ROM whole (One)NAND is UBI managed.
Also merge NAND and OneNAND defconfigs as now one binary can serve
both flashes.
As code is too big now, drop CONFIG_SPL_EXT_SUPPORT to make it fit.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Remove unnecessary board specifc config files for
zynq boards(microzed, picozed, ZC770(all), zed) and point
to zynq common config file.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable config CONFIG_SYS_NO_FLASH through defconfig
for all zynq boards.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Define config USB_STORAGE through defconfig for all
respective zynq boards
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Kconfig entry config option for USB_EHCI_ZYNQ
and update the same to enable for all zynq boards
which supports USB
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Compile SPL for all boards even psu_init.c/h files are not in the tree
yet. But this change enables covering SPL issues in mainline.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Based on:
"ARM: uniphier: use the default CONFIG_BOOTDELAY=2"
(sha1: 7c8ef0feb9)
"I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig,
CONFIG_BOOTDELAY=2, is just fine for these boards."
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
In non-secure boot scenario from NAND, this address will map to CPC
configured as SRAM. But in case of secure boot, this default address
always maps to IBR (Internal Boot ROM).
The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G
address space i.e. 0x0 - 0xDFFFFFFF.
For secure boot target from NAND, the text base for SPL is kept same as
non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will
be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000)
As a the virtual and physical address of CPC would be different. The
virtual address 0xFFFx_xxxx needs to be mapped to physical address
0xBFFx_xxxx.
Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000
and update DCFG SCRTACH1 register with location of Header required for
secure boot.
The changes are similar to
commit 467a40dfe3
powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041
While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC
is only 256K and thus SPL framework is used.
The changes are only applicable for SPL U-Boot running out of CPC SRAM
and not the next level U-Boot loaded on DDR.
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
There are multiple versions of p2771-0000 board. There are SW visible
incompatible differences between the versions, and they are relevant to
U-Boot. Create separate "A02" and "B00" defconfigs (named after the first
and/or only board rev the defconfig supports) so that users can select
which build they want.
With the minimal set of HW currently enabled in U-Boot, the differences
are irrelevant, hence the DT files aren't different. However, that will
change in a future patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Use existing Kconfig symbols to let the user configure whether to
build a U-Boot with non-secure mode support or not. This also allows
to enable virtualization extension easily.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affected configuration register, hence the config option
is named by the non-reset configuration.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
It's not necessary anymore to declare the CONFIG_BOOTDELAY variable,
it's already set by default as 2 seconds.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM,
micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector,
sdio attached rtl8189ftv wifi and an ir receiver.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The Plus variant of the Orange Pi PC has an eMMC, add support for this.
Note we are using the same u-boot defconfig / dts for both the regular
Orange Pi PC as well as the Orange Pi PC Plus.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This patch add EMAC driver support for H3/A83T/A64 SoCs.
Tested on Pine64(A64-External PHY) and Orangepipc(H3-Internal PHY).
BIG Thanks to Andre for providing some of the DT code.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
As an experiment, move this board over to use of-platdata. This means that
its SPL configuration will come from C structures generated at build-time
from the device tree, instead of coming from the device tree at run-time.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to build SPL for sandbox. It provides additional
build coverage and allows SPL features to be tested in sandbox. However
it does not need worthwhile to always create an SPL build. It nearly
doubles the build time and the feature is (so far) seldom used.
So for now, create a separate build target for sandbox SPL. This allows
experimentation with this new feature without impacting existing workflows.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable bootz command on Texas Instruments DA850 EVM
board. This helps it boot zImage with device-tree
blob passed.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Modify the SPL build procedure for AM437x high-security (HS) device
variants to create a secure u-boot_HS.img FIT blob that contains U-Boot
and DTB artifacts signed (and optionally encrypted) with a TI-specific
process based on the CONFIG_TI_SECURE_DEVICE config option and the
externally-provided image signing tool.
Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS)
device variants to create a secure u-boot_HS.img FIT blob that contains
U-Boot and DTB artifacts signed with a TI-specific process based on the
CONFIG_TI_SECURE_DEVICE config option and the externally-provided image
signing tool.
Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
DFU is a convenient way to program U-boot binary into the eMMC.
Add support for it.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Booting a NXP kernel with mainline U-boot leads to the following kernel
crash:
caam: probe of 30900000.caam failed with error -11
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = 80004000
[00000004] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT SMP ARM
This happens because NXP kernel expects MX7 to boot in secure mode,
so introduce mx7dsabresd_secure_defconfig that selects CONFIG_MX7_SEC
and allows booting a NXP provided kernel successfully.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Custom Board based on MX6 Dual, 1GB RAM and eMMC.
There are two variants of the board with and without
PCIe (ZC5202 and ZC5601).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.
Currently supported:
- 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on
SOM-DB5800.
- 4x USB 2.0 (EHCI)
- Video
- SATA
- Ethernet
- PCIe
- Realtek ALC892 HD Audio
Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO
HDA_SDI0 is set in DT to enable HD Audio codec.
Pin defaults for codec pin complexs are not changed.
Not supported:
- Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500)
- USB 3.0 (XHCI)
- TPM
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.
This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are quite a number of BayTrail boards that uses an external
SuperIO chipset to provide the legacy UART. For such cases, it's
better to have a Kconfig option to enable the internal UART.
So far BayleyBay and MinnowMax boards are using internal UART as
the U-Boot console, enable this on these two boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla
Bin Meng
Keerthy
Simon Glass
Josh Marshall
Walter Schweizer
Tom Rini
Mugunthan V N
Sriram Dash
Sudeep Holla
Semen Protsenko
Stefan Agner
York Sun
Albert ARIBAUD \(3ADEV\)
Peng Fan
Andrew F. Davis
Kever Yang
Sandy Patterson
Sanchayan Maity
Stephen Warren
Stefan Roese
Heiko Schocher
Angelo Dureghello
Chris Packham
Masahiro Yamada
MengDongyang
Jagan Teki
Siva Durga Prasad Paladugu
Michal Simek
Paul Burton
Zubair Lutfullah Kakakhel
Chen-Yu Tsai
Jelle van der Waa
Shaohui Xie
Mingkai Hu
Madan Srinivas
Andreas Dannenberg
Beniamino Galvani
Alexander Graf
Fabio Estevam
Akshay Bhat
Hans de Goede
Stefan Mavrodiev
Icenowy Zheng
Peter Chubb
Steve Rae
Nobuhiro Iwamatsu
masakazu.mochizuki.wd@hitachi.com
Sekhar Nori
Chris Zankel
Max Filippov
Vignesh R
Rajesh Bhagat
Xu Ziyuan
Alexey Brodkin
jk.kernel@gmail.com
Breno Lima
Stefano Babic
Sumit Garg
Heiko Stübner
Ladislav Michl
Amit Singh Tomar
Vanessa Maegima
George McCollister