Commit Graph

21247 Commits

Author SHA1 Message Date
ken kuo c54fd3efa4 nds32: Enable FPU if the version of CPU supported
Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25 16:54:19 +08:00
Tom Rini 99ca91b6d7 nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiers
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25 16:54:18 +08:00
ken kuo 951344b778 nds32: Convert Makefiles to use COBJS-y style
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25 16:54:18 +08:00
Rob Herring 76116f29ee highbank: enable keyed autoboot stop
Restrict autoboot interruption to "s" or "d" keys. This will prevent some
unwanted stopping and also allow disabling the reset on command timeout.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:16:37 +02:00
Rob Herring 953950234d ARM: highbank: compile misc_init_r only if CONFIG_MISC_INIT_R
Compile misc_init_r only if CONFIG_MISC_INIT_R is enabled.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:16:21 +02:00
Rob Herring 76c3999db4 ARM: highbank: setup peripherals based on power domain status
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:16:07 +02:00
Rob Herring e1df283c26 ARM: highbank: enable reset on command timeout
Enable resetting on command timeout. The timeout is set with environment
setting bootretry.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:57 +02:00
Rob Herring 0f7cf3803f ARM: highbank: avoid bss write in timer_init
The timer_init function is called before relocation and writes to bss data
were corrupting relocation data. Fix this by removing the call to
reset_timer_masked. The initial timer count should be 0 or near 0 anyway,
so initializing the variables are not needed.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:44 +02:00
Rob Herring 714d1f5da5 ARM: highbank: set timer prescaler to 256
The 150MHz clock rate gives u-boot time functions problems and there's no
benefit to a fast clock, so lower the rate.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:33 +02:00
Rob Herring ec0e413f93 ARM: highbank: fix get_tbclk value to timer rate
get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:25 +02:00
Rob Herring 185a5bb0f5 ARM: highbank: update config options
Various changes to highbank config:

Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:02 +02:00
Rob Herring 393ee7f342 net: calxedaxgmac: enable rx cut-thru
There is no reason to wait for the entire frame to start DMA on receive,
so enable rx cut-thru for better performance.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:14:44 +02:00
Rob Herring 0f5141e9c5 ARM: move interrupt_init to before relocation
interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:14:28 +02:00
Gabor Juhos db2c86d7d7 MIPS: mips32/cache.S: use v1 register for indirect function calls
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:07 -04:00
Gabor Juhos ee8b1e2959 MIPS: mips32/cache.S: store cache line size in t8 register
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:07 -04:00
Gabor Juhos c325916563 MIPS: mips32/cache.S: save return address in t9 register
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos d707e5b713 MIPS: xburst/start.S: rework relocation info check
Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos e5c868a208 MIPS: xburst/start.S: use t8 register for dynamic relocation
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos f01d693535 MIPS: xburst/start.S: save gd in s0 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos ba9cf07122 MIPS: xburst/start.S: save relocation offset in s1 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos 9a28e0d177 MIPS: xburst/start.S: save relocation address in s2 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:05 -04:00
Gabor Juhos 691995f9ab MIPS: mips32/start.S: rework relocation info check
Make it similar to the code in mips64/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:05 -04:00
Gabor Juhos 680cb2dc3a MIPS: mips32/start.S: use t8 register for dynamic relocation
Synchronize the code with mips64/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:05 -04:00
Gabor Juhos da84f33b04 MIPS: mips32/cache.S: remove superfluous register assignment
The t4 register already holds the cache
line size, and the value of the register
is not changed in mips_init_icache.

Get the cache line size value from t4 for
mips_init_dcache as well and remove the
superfluous assignment of t5 register.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
2013-07-24 09:51:05 -04:00
Gabor Juhos b1a14c471c MIPS: remove obsolete TODO items
The MIPS  code uses centralized u-boot.lds script already,
and dynamic relocation is supported as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:05 -04:00
Gabor Juhos b1591ec246 MIPS: mips64/interrupt.c: remove superfluous include
Nothing is used from asm/mipsregs.h.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:05 -04:00
Gabor Juhos c3e4901fc6 MIPS: mips32/time.c: fix checkpatch errors/warnings
Checking mips32/time.c with checkpatch.pl shows this:

  arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
  arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
  total: 1 errors, 1 warnings, 0 checks, 85 lines checked

Fix the code to make checkpatch.pl happy.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos f1957499ea MIPS: qemu-malta: bring up ethernet
Qemu emulates a PCNET PCI card for the Malta CoreLV board.
Enable the pcnet driver and add board specific ethernet
initialization function to bring it up. Also enable the
CONFIG_CMD_NET and CONFIG_CMD_PING options.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos feaa606627 MIPS: qemu-malta: add PCI support
Qemu emulates the Galileo GT64120 System Controller
which provides a CPU bus to PCI bus bridge.

The patch adds driver for this bridge and enables
PCI support for the emulated Malta board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos ac12984de8 MIPS: qemu-malta: setup GT64120 registers as done by YAMON
Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.

This is needed for running Linux kernel.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos 52caee0f36 MIPS: qemu-malta: enable flash support
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:04 -04:00
Gabor Juhos 015643152a MIPS: qemu-malta: add reset support
The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.

Use this feature to implement reset support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Gabor Juhos 5a4dcfac1e MIPS: qemu-malta: add support for emulated MIPS Malta board
Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.

This is enough to boot U-Boot to the command prompt
both in little and big endian mode.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Gabor Juhos 843a76b66b MIPS: start.S: emulate REVISION register for qemu-malta
On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.

This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Gabor Juhos a79b5e6848 MIPS: import gt64120.h header from Linux
The Linux specific register access macros, the
extern function declarations and the UL suffixes
has been removed.

The header file will be used for the qemu-malta
board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Gabor Juhos 54fbcb0c04 net: pcnet: use pci_virt_to_mem to obtain buffer addresses
The pcnet driver uses the pci_phys_to_mem function
to get the memory address of the DMA buffers. This
This assumes an 1:1 mapping between the PCI and
physical memory which is not true on all platforms.

On MIPS platform U-Boot is running within a mapped
memory region, and the pci_phys_to_mem macro can't
be used to obtain the memory address of the buffers.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Tom Rini 518d438537 MIPS: mips64: fix typos in copyright text of start.S
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Conflicts:

	arch/mips/cpu/mips64/start.S

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:52 -04:00
Tom Rini c2120fbfbc Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.

Conflicts:
	board/sandburst/common/ppc440gx_i2c.c
	board/sandburst/common/ppc440gx_i2c.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:24 -04:00
Wolfgang Denk e85427fd66 Add eCos-2.0 SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24 09:45:01 -04:00
Wolfgang Denk a53002f4fa Add LGPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24 09:45:01 -04:00
Wolfgang Denk eee479cf6a Add LGPL-2.1+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24 09:45:01 -04:00
Wolfgang Denk 1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Wolfgang Denk eca3aeb352 Licenses: introduce SPDX Unique Lincense Identifiers
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files.  This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports.  An additional problem
is that even the same lincenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.

To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique Lincense Identifiers
as defined by the Linux Foundation's SPDX project [1].  For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:

        SPDX-License-Identifier:        GPL-2.0+

We use the SPDX Unique Lincense Identifiers here; these are available
at [2].

Note: From the legal point of view, this patch is supposed to be only
a change to the textual representation of the license information,
but in no way any change to the actual license terms. With this patch
applied, all files will still be licensed under the same terms they
were before.

Note 2: The apparent difference between the old "COPYING" and the new
"Licenses/gpl-2.0.txt" only results from switching to the upstream
version of the license which is differently formatted; there are not
any actual changes to the content.

Note 3: There are some recurring questions about linense issues, such
as:
    - Is a "All Rights Reserved" clause a problem in GPL code?
    - Are files without any license header a problem?
    - Do we need license headers at all?

The following excerpt from an e-mail by Daniel B. Ravicher should help
with these:

| Message-ID: <4ADF8CAA.5030808@softwarefreedom.org>
| Date: Wed, 21 Oct 2009 18:35:22 -0400
| From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org>
| To: Wolfgang Denk <wd@denx.de>
| Subject: Re: GPL and license cleanup questions
|
| Mr. Denk,
|
| Wolfgang Denk wrote:
| > - There are a number of files which do not include any specific
| > license information at all. Is it correct to assume that these files
| > are automatically covered by the "GPL v2 or later" clause as
| > specified by the COPYING file in the top level directory of the
| > U-Boot source tree?
|
| That is a very fact specific analysis and could be different across the
| various files.  However, if the contributor could reasonably be expected
| to have known that the project was licensed GPLv2 or later at the time
| she made her contribution, then a reasonably implication is that she
| consented to her contributions being distributed under those terms.
|
| > - Do such files need any clean up, for example should we add GPL
| > headers to them, or is this not needed?
|
| If the project as a whole is licensed under clear terms, you need not
| identify those same terms in each file, although there is no harm in
| doing so.
|
| > - There are other files, which include both a GPL license header
| > _plus_ some copyright note with an "All Rights Reserved" clause. It
| > has been my understanding that this is a conflict, and me must ask
| > the copyright holders to remove such "All Rights Reserved" clauses.
| > But then, some people claim that "All Rights Reserved" is a no-op
| > nowadays. License checking tools (like OSLC) seem to indicate this is
| > a problem, but then we see quite a lot of "All rights reserved" in
| > BSD-licensed files in gcc and glibc. So what is the correct way to
| > deal with such files?
|
| It is not a conflict to grant a license and also reserve all rights, as
| implicit in that language is that you are reserving all "other" rights
| not granted in the license.  Thus, a file with "Licensed under GPL, All
| Rights Reserved" would mean that it is licensed under the GPL, but no
| other rights are given to copy, modify or redistribute it.
|
| Warm regards,
| --Dan
|
| Daniel B. Ravicher, Legal Director
| Software Freedom Law Center (SFLC) and Moglen Ravicher LLC
| 1995 Broadway, 17th Fl., New York, NY 10023
| (212) 461-1902 direct  (212) 580-0800 main  (212) 580-0898 fax
| ravicher@softwarefreedom.org   www.softwarefreedom.org

[1] http://spdx.org/
[2] http://spdx.org/licenses/

Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24 09:44:16 -04:00
Otavio Salvador d727ab3c6a wandboard: Use splash image at screen center by default
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-07-24 14:36:17 +02:00
Dirk Behme 04c79cbd5f mxc_gpio: Correct the GPIO handling in gpio_direction_output()
Setting the direction and an output value should be done by

First, set the desired output value.

Then, switch to output.

If this is done in the inverse order, like at the moment,
there can be a glitch on the GPIO line while switching first
the old output value and aftwards the new one.

Fix this by inverting the order of the direction/set_value
calls.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-07-24 13:01:18 +02:00
Marek Vasut 5434caf5ba ARM: mxs: Consolidate configuration options
Pull all the duplicate configuration options into configs/mxs.h
from the board configuration files. This reduces the files greatly
and makes them somewhat more readable. Besides, we do no longer
have such a horrible duplication of code.

Note that the mx23evk grew in size slightly. This is due to the
CONFIG_SYS_CBSIZE now being set to 1024 as it is on the rest of
MXS systems.

This patch also fixes the OCRAM size for i.MX23. The i.MX23 has
only 32kB of OCRAM, while i.MX28 has 128kB of OCRAM.

I verified the configuration didn't change for each of the boards,
but I didn't boot-test it on the boards I do not have. I configured
U-Boot for each board using the "make ... <board>_config" command
and then ran "cpp -I include -dM include/config.h" , which dumped
all the configuration options. I did this both before and after this
patch and finally compared the results for each MXS board. Actually,
the results do differ slightly, since the configs/mxs.h file now
properly includes the correct iomux-mx23.h or iomux-mx28.h , so
while comparing, I had to ignore these new defines. These have no
impact on U-Boot configuration though.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-07-24 12:59:57 +02:00
Axel Lin 4fc9670513 nds32: ag101/ag102: Fix setting lastdec and now values
The timer3 counter unit for lastdesc and now values are inconsistent in current
code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is
second. However, CONFIG_SYS_HZ is defined as 1000 in board config file.
This means the accuracy of "lastdec" and "now" should be in millisecond,
thus fix the equation to set lastdec and now variables accordingly.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
2013-07-24 11:50:28 +08:00
ken kuo e3c58b0292 nds32: Enable the function of passing parameters to Linux
Add a header file, setup.h, which copy from Linux source code,
this file contain structures are used to pass initialisation parameters
to Linux. Enable this function on adp-ag101/adp-ag101p target

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-24 11:50:28 +08:00
ken kuo 61ccf082e7 nds32: Enable SDIO and EXT2 command support for Andes board
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-24 11:50:28 +08:00
ken kuo 3c016704d9 nds32: Enable two banks of SDRAM on Andes board
The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-24 11:50:28 +08:00