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Author SHA1 Message Date
Albert ARIBAUD 0a16ea5933 mv88e61xx: refactor PHY and SWITCH level-code 
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
 2013-01-09 04:12:10 +05:30
Prafulla Wadaskar 443ce4ac9d net: phy: bugfixes: mv88E61xx multichip addressing support 
With these fixes, this driver works properly for multi chip
addressging mode

Bugfixes:
1. Build error fixed for function mv88e61xx_busychk_multic-fixed
2. PHY dev address error detection- fixed
3. wrong busy bit was refered in function mv88e61xx_busychk -fixed
4. invalid data read ptr was refered for RD_PHY in case of
	multichip addressing mode -fixed

The Multichip Address mode is tested with RD6281A board having
MV88E6165 switch on it

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
 2009-07-22 22:53:45 -07:00
Prafulla Wadaskar 6f51deb7f2 Marvell MV88E61XX Switch Driver support 
Chips supported:-
1. 88E6161 6 port gbe swtich with 5 integrated PHYs
2. 88E6165 6 port gbe swtich with 5 integrated PHYs
2. 88E6132 3 port gbe swtich with 2 integrated PHYs
Platform specific configuration supported for:-
default or router port vlan configuration
led_init configuration
mdip/n polarity reversal configuration

Note: This driver is supported and tested against
kirkwood egiga interface

Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com

Reviewed by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
 2009-06-15 00:13:54 -07:00