Commit graph

4 commits

Author SHA1 Message Date
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Wojtek Skulski
3bbed7f88a Blackfin: blackvme: new board port
The board includes:
 * ADSP-BF561 rev. 0.5
 * 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG)
 * Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell)
 * SPI  boot flash on PF2 (M25P64 8MB, or M25P128 16 MB)
 * FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB)
 * Spartan6-LX150 (memory-mapped; both PPIs also connected)
 * See http://www.skutek.com/

Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00