Commit Graph

8 Commits

Author SHA1 Message Date
Albert ARIBAUD 79f3877794 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
2013-01-08 13:15:45 +01:00
Ilya Yanok 8eb16b7f73 am33xx: NAND support
TI AM33XX has the same GPMC controller as OMAP3 so we could just use the
existing omap_gpmc driver. This patch adds adds required
definitions/intialization.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:01 -07:00
Ilya Yanok 7df5cf35de am33xx: init OTG hardware and new musb gadget driver
AM33xx has support for dual port MUSB OTG controller. This patch
adds initialization for the controller using new MUSB gadget
driver and ether gadget.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:07 +01:00
Vaibhav Hiremath 000820b583 am335x: Enable RTC 32K OSC clock
In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume.  In case of
AM335x device, the only source we have is, RTC32K, available in
wakeup/always-on domain.  Having said that, during validation it has
been observed that, RTC clock need couple of seconds delay to stabilize
the RTC OSC clock; and such a huge delay is not acceptable in kernel
especially during early init and also it will impact quick/fast boot
use-cases.

So, RTC32k OSC enable dependency has been shifted to
SPL/first-bootloader.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-25 11:30:22 -07:00
Tom Rini 41aebf8106 omap4/5/am33xx: Make lowlevel_init available to all armv7 platforms
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms.  As part of this we change some of the macros that are used
to be more clear.  Previously (except for am335x evm) we had been
setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
equivalent to simply referencing NON_SECURE_SRAM_END.  On am335x evm we
should have been doing this initially and do now.

Cc: Sricharan R <r.sricharan@ti.com>
Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:19 +02:00
Tom Rini 79b3e6b75b am33xx: Remove DMM_BASE define
The am33xx does not have a DMM, so don't define the base.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:11 +02:00
Chandan Nath e79cd8eb9b am33xx: CPSW init and definitions
This patch adds platform-specific initialization for CPSW
switch on TI AM33XX SoCs.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split init out of original patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01 14:58:11 +02:00
Chandan Nath 5655108a82 ARM:AM33XX: Added support for AM33xx
This patch adds basic support for AM33xx which is based on ARMV7
Cortex A8 CPU.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00